Revision d537cf6c hw/openpic.c
| b/hw/openpic.c | ||
|---|---|---|
| 162 | 162 |
CPUState *env; |
| 163 | 163 |
} IRQ_dst_t; |
| 164 | 164 |
|
| 165 |
struct openpic_t {
|
|
| 165 |
typedef struct openpic_t {
|
|
| 166 | 166 |
PCIDevice pci_dev; |
| 167 | 167 |
SetIRQFunc *set_irq; |
| 168 | 168 |
int mem_index; |
| ... | ... | |
| 196 | 196 |
uint32_t mbr; /* Mailbox register */ |
| 197 | 197 |
} mailboxes[MAX_MAILBOXES]; |
| 198 | 198 |
#endif |
| 199 |
}; |
|
| 199 |
} openpic_t;
|
|
| 200 | 200 |
|
| 201 | 201 |
static inline void IRQ_setbit (IRQ_queue_t *q, int n_IRQ) |
| 202 | 202 |
{
|
| ... | ... | |
| 321 | 321 |
} |
| 322 | 322 |
} |
| 323 | 323 |
|
| 324 |
void openpic_set_irq(void *opaque, int n_IRQ, int level) |
|
| 324 |
static void openpic_set_irq(void *opaque, int n_IRQ, int level)
|
|
| 325 | 325 |
{
|
| 326 | 326 |
openpic_t *opp = opaque; |
| 327 | 327 |
IRQ_src_t *src; |
| ... | ... | |
| 964 | 964 |
#endif |
| 965 | 965 |
} |
| 966 | 966 |
|
| 967 |
openpic_t *openpic_init (PCIBus *bus, SetIRQFunc *set_irq,
|
|
| 967 |
qemu_irq *openpic_init (PCIBus *bus, SetIRQFunc *set_irq,
|
|
| 968 | 968 |
int *pmem_index, int nb_cpus, CPUState **envp) |
| 969 | 969 |
{
|
| 970 | 970 |
openpic_t *opp; |
| ... | ... | |
| 1024 | 1024 |
openpic_reset(opp); |
| 1025 | 1025 |
if (pmem_index) |
| 1026 | 1026 |
*pmem_index = opp->mem_index; |
| 1027 |
return opp;
|
|
| 1027 |
return qemu_allocate_irqs(openpic_set_irq, opp, MAX_IRQ);
|
|
| 1028 | 1028 |
} |
Also available in: Unified diff