Revision d537cf6c hw/pcnet.c
| b/hw/pcnet.c | ||
|---|---|---|
| 69 | 69 |
int xmit_pos, recv_pos; |
| 70 | 70 |
uint8_t buffer[4096]; |
| 71 | 71 |
int tx_busy; |
| 72 |
void (*set_irq_cb)(void *s, int isr);
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|
| 72 |
qemu_irq irq;
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|
| 73 | 73 |
void (*phys_mem_read)(void *dma_opaque, target_phys_addr_t addr, |
| 74 | 74 |
uint8_t *buf, int len, int do_bswap); |
| 75 | 75 |
void (*phys_mem_write)(void *dma_opaque, target_phys_addr_t addr, |
| ... | ... | |
| 823 | 823 |
printf("pcnet: INTA=%d\n", isr);
|
| 824 | 824 |
#endif |
| 825 | 825 |
} |
| 826 |
s->set_irq_cb(s, isr);
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|
| 826 |
qemu_set_irq(s->irq, isr);
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|
| 827 | 827 |
s->isr = isr; |
| 828 | 828 |
} |
| 829 | 829 |
|
| ... | ... | |
| 1940 | 1940 |
cpu_register_physical_memory(addr, PCNET_PNPMMIO_SIZE, d->mmio_index); |
| 1941 | 1941 |
} |
| 1942 | 1942 |
|
| 1943 |
static void pcnet_pci_set_irq_cb(void *opaque, int isr) |
|
| 1944 |
{
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|
| 1945 |
PCNetState *s = opaque; |
|
| 1946 |
|
|
| 1947 |
pci_set_irq(&s->dev, 0, isr); |
|
| 1948 |
} |
|
| 1949 |
|
|
| 1950 | 1943 |
static void pci_physical_memory_write(void *dma_opaque, target_phys_addr_t addr, |
| 1951 | 1944 |
uint8_t *buf, int len, int do_bswap) |
| 1952 | 1945 |
{
|
| ... | ... | |
| 2001 | 1994 |
pci_register_io_region((PCIDevice *)d, 1, PCNET_PNPMMIO_SIZE, |
| 2002 | 1995 |
PCI_ADDRESS_SPACE_MEM, pcnet_mmio_map); |
| 2003 | 1996 |
|
| 2004 |
d->set_irq_cb = pcnet_pci_set_irq_cb;
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|
| 1997 |
d->irq = d->dev.irq[0];
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|
| 2005 | 1998 |
d->phys_mem_read = pci_physical_memory_read; |
| 2006 | 1999 |
d->phys_mem_write = pci_physical_memory_write; |
| 2007 | 2000 |
d->pci_dev = &d->dev; |
| ... | ... | |
| 2025 | 2018 |
(CPUWriteMemoryFunc *)&pcnet_ioport_writew, |
| 2026 | 2019 |
}; |
| 2027 | 2020 |
|
| 2028 |
static void pcnet_sparc_set_irq_cb(void *opaque, int isr) |
|
| 2029 |
{
|
|
| 2030 |
PCNetState *s = opaque; |
|
| 2031 |
|
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| 2032 |
ledma_set_irq(s->dma_opaque, isr); |
|
| 2033 |
} |
|
| 2034 |
|
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| 2035 |
void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque) |
|
| 2021 |
void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque, qemu_irq irq) |
|
| 2036 | 2022 |
{
|
| 2037 | 2023 |
PCNetState *d; |
| 2038 | 2024 |
int lance_io_memory; |
| ... | ... | |
| 2047 | 2033 |
d->dma_opaque = dma_opaque; |
| 2048 | 2034 |
cpu_register_physical_memory(leaddr, 4, lance_io_memory); |
| 2049 | 2035 |
|
| 2050 |
d->set_irq_cb = pcnet_sparc_set_irq_cb;
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| 2036 |
d->irq = irq;
|
|
| 2051 | 2037 |
d->phys_mem_read = ledma_memory_read; |
| 2052 | 2038 |
d->phys_mem_write = ledma_memory_write; |
| 2053 | 2039 |
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