Revision d5bfda33 target-i386/helper.c
| b/target-i386/helper.c | ||
|---|---|---|
| 1067 | 1067 |
prev_debug_excp_handler(env); |
| 1068 | 1068 |
} |
| 1069 | 1069 |
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| 1070 |
static void |
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| 1071 |
qemu_inject_x86_mce(Monitor *mon, CPUState *cenv, int bank, uint64_t status, |
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| 1072 |
uint64_t mcg_status, uint64_t addr, uint64_t misc, |
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| 1073 |
int flags) |
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typedef struct MCEInjectionParams {
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Monitor *mon; |
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CPUState *env; |
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int bank; |
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uint64_t status; |
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uint64_t mcg_status; |
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uint64_t addr; |
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uint64_t misc; |
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int flags; |
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} MCEInjectionParams; |
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|
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static void do_inject_x86_mce(void *data) |
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{
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uint64_t mcg_cap = cenv->mcg_cap; |
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uint64_t *banks = cenv->mce_banks + 4 * bank; |
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MCEInjectionParams *params = data; |
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CPUState *cenv = params->env; |
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uint64_t *banks = cenv->mce_banks + 4 * params->bank; |
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|
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cpu_synchronize_state(cenv); |
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| 1077 | 1088 |
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/* |
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* If there is an MCE exception being processed, ignore this SRAO MCE |
| 1080 | 1091 |
* unless unconditional injection was requested. |
| 1081 | 1092 |
*/ |
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if (!(flags & MCE_INJECT_UNCOND_AO) && !(status & MCI_STATUS_AR) |
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if (!(params->flags & MCE_INJECT_UNCOND_AO) |
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&& !(params->status & MCI_STATUS_AR) |
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| 1083 | 1095 |
&& (cenv->mcg_status & MCG_STATUS_MCIP)) {
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| 1084 | 1096 |
return; |
| 1085 | 1097 |
} |
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if (status & MCI_STATUS_UC) {
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if (params->status & MCI_STATUS_UC) {
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/* |
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* if MSR_MCG_CTL is not all 1s, the uncorrected error |
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* reporting is disabled |
| 1090 | 1103 |
*/ |
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if ((mcg_cap & MCG_CTL_P) && cenv->mcg_ctl != ~(uint64_t)0) {
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monitor_printf(mon, |
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if ((cenv->mcg_cap & MCG_CTL_P) && cenv->mcg_ctl != ~(uint64_t)0) {
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monitor_printf(params->mon,
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"CPU %d: Uncorrected error reporting disabled\n", |
| 1094 | 1107 |
cenv->cpu_index); |
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return; |
| ... | ... | |
| 1100 | 1113 |
* reporting is disabled for the bank |
| 1101 | 1114 |
*/ |
| 1102 | 1115 |
if (banks[0] != ~(uint64_t)0) {
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monitor_printf(mon, "CPU %d: Uncorrected error reporting disabled " |
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"for bank %d\n", cenv->cpu_index, bank); |
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monitor_printf(params->mon, |
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"CPU %d: Uncorrected error reporting disabled for" |
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" bank %d\n", |
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cenv->cpu_index, params->bank); |
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return; |
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} |
| 1107 | 1122 |
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if ((cenv->mcg_status & MCG_STATUS_MCIP) || |
| 1109 | 1124 |
!(cenv->cr[4] & CR4_MCE_MASK)) {
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monitor_printf(mon, "CPU %d: Previous MCE still in progress, " |
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"raising triple fault\n", cenv->cpu_index); |
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monitor_printf(params->mon, |
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"CPU %d: Previous MCE still in progress, raising" |
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" triple fault\n", |
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cenv->cpu_index); |
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| 1112 | 1129 |
qemu_log_mask(CPU_LOG_RESET, "Triple fault\n"); |
| 1113 | 1130 |
qemu_system_reset_request(); |
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return; |
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} |
| 1116 | 1133 |
if (banks[1] & MCI_STATUS_VAL) {
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status |= MCI_STATUS_OVER; |
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params->status |= MCI_STATUS_OVER;
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} |
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banks[2] = addr; |
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banks[3] = misc; |
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cenv->mcg_status = mcg_status; |
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banks[1] = status; |
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banks[2] = params->addr;
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banks[3] = params->misc;
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cenv->mcg_status = params->mcg_status;
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banks[1] = params->status;
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| 1123 | 1140 |
cpu_interrupt(cenv, CPU_INTERRUPT_MCE); |
| 1124 | 1141 |
} else if (!(banks[1] & MCI_STATUS_VAL) |
| 1125 | 1142 |
|| !(banks[1] & MCI_STATUS_UC)) {
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| 1126 | 1143 |
if (banks[1] & MCI_STATUS_VAL) {
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status |= MCI_STATUS_OVER; |
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params->status |= MCI_STATUS_OVER;
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} |
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banks[2] = addr; |
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banks[3] = misc; |
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banks[1] = status; |
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banks[2] = params->addr;
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banks[3] = params->misc;
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banks[1] = params->status;
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| 1132 | 1149 |
} else {
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banks[1] |= MCI_STATUS_OVER; |
| 1134 | 1151 |
} |
| ... | ... | |
| 1138 | 1155 |
uint64_t status, uint64_t mcg_status, uint64_t addr, |
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uint64_t misc, int flags) |
| 1140 | 1157 |
{
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| 1158 |
MCEInjectionParams params = {
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.mon = mon, |
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.env = cenv, |
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.bank = bank, |
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.status = status, |
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.mcg_status = mcg_status, |
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.addr = addr, |
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.misc = misc, |
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.flags = flags, |
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| 1167 |
}; |
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| 1141 | 1168 |
unsigned bank_num = cenv->mcg_cap & 0xff; |
| 1142 | 1169 |
CPUState *env; |
| 1143 | 1170 |
int flag = 0; |
| ... | ... | |
| 1167 | 1194 |
|
| 1168 | 1195 |
kvm_inject_x86_mce(cenv, bank, status, mcg_status, addr, misc, flag); |
| 1169 | 1196 |
} else {
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qemu_inject_x86_mce(mon, cenv, bank, status, mcg_status, addr, misc, |
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| 1171 |
flags); |
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run_on_cpu(cenv, do_inject_x86_mce, ¶ms); |
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| 1172 | 1198 |
if (flags & MCE_INJECT_BROADCAST) {
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| 1199 |
params.bank = 1; |
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params.status = MCI_STATUS_VAL | MCI_STATUS_UC; |
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params.mcg_status = MCG_STATUS_MCIP | MCG_STATUS_RIPV; |
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params.addr = 0; |
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params.misc = 0; |
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| 1173 | 1204 |
for (env = first_cpu; env != NULL; env = env->next_cpu) {
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| 1174 | 1205 |
if (cenv == env) {
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| 1175 | 1206 |
continue; |
| 1176 | 1207 |
} |
| 1177 |
qemu_inject_x86_mce(mon, env, 1, |
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MCI_STATUS_VAL | MCI_STATUS_UC, |
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| 1179 |
MCG_STATUS_MCIP | MCG_STATUS_RIPV, 0, 0, |
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| 1180 |
flags); |
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params.env = env; |
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run_on_cpu(cenv, do_inject_x86_mce, ¶ms); |
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| 1181 | 1210 |
} |
| 1182 | 1211 |
} |
| 1183 | 1212 |
} |
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