Revision d60efc6b

b/cpu-common.h
36 36
/* This should not be used by devices.  */
37 37
ram_addr_t qemu_ram_addr_from_host(void *ptr);
38 38

  
39
int cpu_register_io_memory(CPUReadMemoryFunc **mem_read,
40
                           CPUWriteMemoryFunc **mem_write,
39
int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read,
40
                           CPUWriteMemoryFunc * const *mem_write,
41 41
                           void *opaque);
42 42
void cpu_unregister_io_memory(int table_address);
43 43

  
b/exec.c
205 205
#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
206 206
typedef struct subpage_t {
207 207
    target_phys_addr_t base;
208
    CPUReadMemoryFunc **mem_read[TARGET_PAGE_SIZE][4];
209
    CPUWriteMemoryFunc **mem_write[TARGET_PAGE_SIZE][4];
208
    CPUReadMemoryFunc * const *mem_read[TARGET_PAGE_SIZE][4];
209
    CPUWriteMemoryFunc * const *mem_write[TARGET_PAGE_SIZE][4];
210 210
    void *opaque[TARGET_PAGE_SIZE][2][4];
211 211
    ram_addr_t region_offset[TARGET_PAGE_SIZE][2][4];
212 212
} subpage_t;
......
2550 2550
#endif
2551 2551
}
2552 2552

  
2553
static CPUReadMemoryFunc *unassigned_mem_read[3] = {
2553
static CPUReadMemoryFunc * const unassigned_mem_read[3] = {
2554 2554
    unassigned_mem_readb,
2555 2555
    unassigned_mem_readw,
2556 2556
    unassigned_mem_readl,
2557 2557
};
2558 2558

  
2559
static CPUWriteMemoryFunc *unassigned_mem_write[3] = {
2559
static CPUWriteMemoryFunc * const unassigned_mem_write[3] = {
2560 2560
    unassigned_mem_writeb,
2561 2561
    unassigned_mem_writew,
2562 2562
    unassigned_mem_writel,
......
2622 2622
        tlb_set_dirty(cpu_single_env, cpu_single_env->mem_io_vaddr);
2623 2623
}
2624 2624

  
2625
static CPUReadMemoryFunc *error_mem_read[3] = {
2625
static CPUReadMemoryFunc * const error_mem_read[3] = {
2626 2626
    NULL, /* never used */
2627 2627
    NULL, /* never used */
2628 2628
    NULL, /* never used */
2629 2629
};
2630 2630

  
2631
static CPUWriteMemoryFunc *notdirty_mem_write[3] = {
2631
static CPUWriteMemoryFunc * const notdirty_mem_write[3] = {
2632 2632
    notdirty_mem_writeb,
2633 2633
    notdirty_mem_writew,
2634 2634
    notdirty_mem_writel,
......
2721 2721
    stl_phys(addr, val);
2722 2722
}
2723 2723

  
2724
static CPUReadMemoryFunc *watch_mem_read[3] = {
2724
static CPUReadMemoryFunc * const watch_mem_read[3] = {
2725 2725
    watch_mem_readb,
2726 2726
    watch_mem_readw,
2727 2727
    watch_mem_readl,
2728 2728
};
2729 2729

  
2730
static CPUWriteMemoryFunc *watch_mem_write[3] = {
2730
static CPUWriteMemoryFunc * const watch_mem_write[3] = {
2731 2731
    watch_mem_writeb,
2732 2732
    watch_mem_writew,
2733 2733
    watch_mem_writel,
......
2819 2819
    subpage_writelen(opaque, addr, value, 2);
2820 2820
}
2821 2821

  
2822
static CPUReadMemoryFunc *subpage_read[] = {
2822
static CPUReadMemoryFunc * const subpage_read[] = {
2823 2823
    &subpage_readb,
2824 2824
    &subpage_readw,
2825 2825
    &subpage_readl,
2826 2826
};
2827 2827

  
2828
static CPUWriteMemoryFunc *subpage_write[] = {
2828
static CPUWriteMemoryFunc * const subpage_write[] = {
2829 2829
    &subpage_writeb,
2830 2830
    &subpage_writew,
2831 2831
    &subpage_writel,
......
2906 2906
   value can be used with cpu_register_physical_memory(). (-1) is
2907 2907
   returned if error. */
2908 2908
static int cpu_register_io_memory_fixed(int io_index,
2909
                                        CPUReadMemoryFunc **mem_read,
2910
                                        CPUWriteMemoryFunc **mem_write,
2909
                                        CPUReadMemoryFunc * const *mem_read,
2910
                                        CPUWriteMemoryFunc * const *mem_write,
2911 2911
                                        void *opaque)
2912 2912
{
2913 2913
    int i, subwidth = 0;
......
2932 2932
    return (io_index << IO_MEM_SHIFT) | subwidth;
2933 2933
}
2934 2934

  
2935
int cpu_register_io_memory(CPUReadMemoryFunc **mem_read,
2936
                           CPUWriteMemoryFunc **mem_write,
2935
int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read,
2936
                           CPUWriteMemoryFunc * const *mem_write,
2937 2937
                           void *opaque)
2938 2938
{
2939 2939
    return cpu_register_io_memory_fixed(0, mem_read, mem_write, opaque);
b/hw/apb_pci.c
75 75
    return val;
76 76
}
77 77

  
78
static CPUWriteMemoryFunc *pci_apb_config_write[] = {
78
static CPUWriteMemoryFunc * const pci_apb_config_write[] = {
79 79
    &pci_apb_config_writel,
80 80
    &pci_apb_config_writel,
81 81
    &pci_apb_config_writel,
82 82
};
83 83

  
84
static CPUReadMemoryFunc *pci_apb_config_read[] = {
84
static CPUReadMemoryFunc * const pci_apb_config_read[] = {
85 85
    &pci_apb_config_readl,
86 86
    &pci_apb_config_readl,
87 87
    &pci_apb_config_readl,
......
124 124
    return val;
125 125
}
126 126

  
127
static CPUWriteMemoryFunc *apb_config_write[] = {
127
static CPUWriteMemoryFunc * const apb_config_write[] = {
128 128
    &apb_config_writel,
129 129
    &apb_config_writel,
130 130
    &apb_config_writel,
131 131
};
132 132

  
133
static CPUReadMemoryFunc *apb_config_read[] = {
133
static CPUReadMemoryFunc * const apb_config_read[] = {
134 134
    &apb_config_readl,
135 135
    &apb_config_readl,
136 136
    &apb_config_readl,
137 137
};
138 138

  
139
static CPUWriteMemoryFunc *pci_apb_write[] = {
139
static CPUWriteMemoryFunc * const pci_apb_write[] = {
140 140
    &pci_host_data_writeb,
141 141
    &pci_host_data_writew,
142 142
    &pci_host_data_writel,
143 143
};
144 144

  
145
static CPUReadMemoryFunc *pci_apb_read[] = {
145
static CPUReadMemoryFunc * const pci_apb_read[] = {
146 146
    &pci_host_data_readb,
147 147
    &pci_host_data_readw,
148 148
    &pci_host_data_readl,
......
190 190
    return val;
191 191
}
192 192

  
193
static CPUWriteMemoryFunc *pci_apb_iowrite[] = {
193
static CPUWriteMemoryFunc * const pci_apb_iowrite[] = {
194 194
    &pci_apb_iowriteb,
195 195
    &pci_apb_iowritew,
196 196
    &pci_apb_iowritel,
197 197
};
198 198

  
199
static CPUReadMemoryFunc *pci_apb_ioread[] = {
199
static CPUReadMemoryFunc * const pci_apb_ioread[] = {
200 200
    &pci_apb_ioreadb,
201 201
    &pci_apb_ioreadw,
202 202
    &pci_apb_ioreadl,
b/hw/apic.c
957 957
    cpu_synchronize_state(s->cpu_env, 1);
958 958
}
959 959

  
960
static CPUReadMemoryFunc *apic_mem_read[3] = {
960
static CPUReadMemoryFunc * const apic_mem_read[3] = {
961 961
    apic_mem_readb,
962 962
    apic_mem_readw,
963 963
    apic_mem_readl,
964 964
};
965 965

  
966
static CPUWriteMemoryFunc *apic_mem_write[3] = {
966
static CPUWriteMemoryFunc * const apic_mem_write[3] = {
967 967
    apic_mem_writeb,
968 968
    apic_mem_writew,
969 969
    apic_mem_writel,
b/hw/arm_gic.c
558 558
    gic_dist_writew(opaque, offset + 2, value >> 16);
559 559
}
560 560

  
561
static CPUReadMemoryFunc *gic_dist_readfn[] = {
561
static CPUReadMemoryFunc * const gic_dist_readfn[] = {
562 562
   gic_dist_readb,
563 563
   gic_dist_readw,
564 564
   gic_dist_readl
565 565
};
566 566

  
567
static CPUWriteMemoryFunc *gic_dist_writefn[] = {
567
static CPUWriteMemoryFunc * const gic_dist_writefn[] = {
568 568
   gic_dist_writeb,
569 569
   gic_dist_writew,
570 570
   gic_dist_writel
b/hw/arm_sysctl.c
177 177
    }
178 178
}
179 179

  
180
static CPUReadMemoryFunc *arm_sysctl_readfn[] = {
180
static CPUReadMemoryFunc * const arm_sysctl_readfn[] = {
181 181
   arm_sysctl_read,
182 182
   arm_sysctl_read,
183 183
   arm_sysctl_read
184 184
};
185 185

  
186
static CPUWriteMemoryFunc *arm_sysctl_writefn[] = {
186
static CPUWriteMemoryFunc * const arm_sysctl_writefn[] = {
187 187
   arm_sysctl_write,
188 188
   arm_sysctl_write,
189 189
   arm_sysctl_write
b/hw/arm_timer.c
223 223
    }
224 224
}
225 225

  
226
static CPUReadMemoryFunc *sp804_readfn[] = {
226
static CPUReadMemoryFunc * const sp804_readfn[] = {
227 227
   sp804_read,
228 228
   sp804_read,
229 229
   sp804_read
230 230
};
231 231

  
232
static CPUWriteMemoryFunc *sp804_writefn[] = {
232
static CPUWriteMemoryFunc * const sp804_writefn[] = {
233 233
   sp804_write,
234 234
   sp804_write,
235 235
   sp804_write
......
311 311
}
312 312

  
313 313

  
314
static CPUReadMemoryFunc *icp_pit_readfn[] = {
314
static CPUReadMemoryFunc * const icp_pit_readfn[] = {
315 315
   icp_pit_read,
316 316
   icp_pit_read,
317 317
   icp_pit_read
318 318
};
319 319

  
320
static CPUWriteMemoryFunc *icp_pit_writefn[] = {
320
static CPUWriteMemoryFunc * const icp_pit_writefn[] = {
321 321
   icp_pit_write,
322 322
   icp_pit_write,
323 323
   icp_pit_write
b/hw/armv7m.c
105 105
    cpu_physical_memory_write(addr, (uint8_t *)&v, 4);
106 106
}
107 107

  
108
static CPUReadMemoryFunc *bitband_readfn[] = {
108
static CPUReadMemoryFunc * const bitband_readfn[] = {
109 109
   bitband_readb,
110 110
   bitband_readw,
111 111
   bitband_readl
112 112
};
113 113

  
114
static CPUWriteMemoryFunc *bitband_writefn[] = {
114
static CPUWriteMemoryFunc * const bitband_writefn[] = {
115 115
   bitband_writeb,
116 116
   bitband_writew,
117 117
   bitband_writel
b/hw/axis_dev88.c
69 69
    s->rdy = rdy;
70 70
}
71 71

  
72
static CPUReadMemoryFunc *nand_read[] = {
72
static CPUReadMemoryFunc * const nand_read[] = {
73 73
    &nand_readl,
74 74
    &nand_readl,
75 75
    &nand_readl,
76 76
};
77 77

  
78
static CPUWriteMemoryFunc *nand_write[] = {
78
static CPUWriteMemoryFunc * const nand_write[] = {
79 79
    &nand_writel,
80 80
    &nand_writel,
81 81
    &nand_writel,
......
226 226
    }
227 227
}
228 228

  
229
static CPUReadMemoryFunc *gpio_read[] = {
229
static CPUReadMemoryFunc * const gpio_read[] = {
230 230
    NULL, NULL,
231 231
    &gpio_readl,
232 232
};
233 233

  
234
static CPUWriteMemoryFunc *gpio_write[] = {
234
static CPUWriteMemoryFunc * const gpio_write[] = {
235 235
    NULL, NULL,
236 236
    &gpio_writel,
237 237
};
b/hw/cirrus_vga.c
2156 2156
#endif
2157 2157
}
2158 2158

  
2159
static CPUReadMemoryFunc *cirrus_vga_mem_read[3] = {
2159
static CPUReadMemoryFunc * const cirrus_vga_mem_read[3] = {
2160 2160
    cirrus_vga_mem_readb,
2161 2161
    cirrus_vga_mem_readw,
2162 2162
    cirrus_vga_mem_readl,
2163 2163
};
2164 2164

  
2165
static CPUWriteMemoryFunc *cirrus_vga_mem_write[3] = {
2165
static CPUWriteMemoryFunc * const cirrus_vga_mem_write[3] = {
2166 2166
    cirrus_vga_mem_writeb,
2167 2167
    cirrus_vga_mem_writew,
2168 2168
    cirrus_vga_mem_writel,
......
2472 2472
}
2473 2473

  
2474 2474

  
2475
static CPUReadMemoryFunc *cirrus_linear_read[3] = {
2475
static CPUReadMemoryFunc * const cirrus_linear_read[3] = {
2476 2476
    cirrus_linear_readb,
2477 2477
    cirrus_linear_readw,
2478 2478
    cirrus_linear_readl,
2479 2479
};
2480 2480

  
2481
static CPUWriteMemoryFunc *cirrus_linear_write[3] = {
2481
static CPUWriteMemoryFunc * const cirrus_linear_write[3] = {
2482 2482
    cirrus_linear_writeb,
2483 2483
    cirrus_linear_writew,
2484 2484
    cirrus_linear_writel,
......
2573 2573
}
2574 2574

  
2575 2575

  
2576
static CPUReadMemoryFunc *cirrus_linear_bitblt_read[3] = {
2576
static CPUReadMemoryFunc * const cirrus_linear_bitblt_read[3] = {
2577 2577
    cirrus_linear_bitblt_readb,
2578 2578
    cirrus_linear_bitblt_readw,
2579 2579
    cirrus_linear_bitblt_readl,
2580 2580
};
2581 2581

  
2582
static CPUWriteMemoryFunc *cirrus_linear_bitblt_write[3] = {
2582
static CPUWriteMemoryFunc * const cirrus_linear_bitblt_write[3] = {
2583 2583
    cirrus_linear_bitblt_writeb,
2584 2584
    cirrus_linear_bitblt_writew,
2585 2585
    cirrus_linear_bitblt_writel,
......
3003 3003
}
3004 3004

  
3005 3005

  
3006
static CPUReadMemoryFunc *cirrus_mmio_read[3] = {
3006
static CPUReadMemoryFunc * const cirrus_mmio_read[3] = {
3007 3007
    cirrus_mmio_readb,
3008 3008
    cirrus_mmio_readw,
3009 3009
    cirrus_mmio_readl,
3010 3010
};
3011 3011

  
3012
static CPUWriteMemoryFunc *cirrus_mmio_write[3] = {
3012
static CPUWriteMemoryFunc * const cirrus_mmio_write[3] = {
3013 3013
    cirrus_mmio_writeb,
3014 3014
    cirrus_mmio_writew,
3015 3015
    cirrus_mmio_writel,
b/hw/cs4231.c
129 129
    }
130 130
}
131 131

  
132
static CPUReadMemoryFunc *cs_mem_read[3] = {
132
static CPUReadMemoryFunc * const cs_mem_read[3] = {
133 133
    cs_mem_readl,
134 134
    cs_mem_readl,
135 135
    cs_mem_readl,
136 136
};
137 137

  
138
static CPUWriteMemoryFunc *cs_mem_write[3] = {
138
static CPUWriteMemoryFunc * const cs_mem_write[3] = {
139 139
    cs_mem_writel,
140 140
    cs_mem_writel,
141 141
    cs_mem_writel,
b/hw/cuda.c
630 630
    return 0;
631 631
}
632 632

  
633
static CPUWriteMemoryFunc *cuda_write[] = {
633
static CPUWriteMemoryFunc * const cuda_write[] = {
634 634
    &cuda_writeb,
635 635
    &cuda_writew,
636 636
    &cuda_writel,
637 637
};
638 638

  
639
static CPUReadMemoryFunc *cuda_read[] = {
639
static CPUReadMemoryFunc * const cuda_read[] = {
640 640
    &cuda_readb,
641 641
    &cuda_readw,
642 642
    &cuda_readl,
b/hw/dp8393x.c
663 663
    dp8393x_writew(opaque, addr + 2, (val >> 16) & 0xffff);
664 664
}
665 665

  
666
static CPUReadMemoryFunc *dp8393x_read[3] = {
666
static CPUReadMemoryFunc * const dp8393x_read[3] = {
667 667
    dp8393x_readb,
668 668
    dp8393x_readw,
669 669
    dp8393x_readl,
670 670
};
671 671

  
672
static CPUWriteMemoryFunc *dp8393x_write[3] = {
672
static CPUWriteMemoryFunc * const dp8393x_write[3] = {
673 673
    dp8393x_writeb,
674 674
    dp8393x_writew,
675 675
    dp8393x_writel,
b/hw/ds1225y.c
126 126
    nvram_writeb_protected(opaque, addr + 3, (val >> 24) & 0xff);
127 127
}
128 128

  
129
static CPUReadMemoryFunc *nvram_read[] = {
129
static CPUReadMemoryFunc * const nvram_read[] = {
130 130
    &nvram_readb,
131 131
    &nvram_readw,
132 132
    &nvram_readl,
133 133
};
134 134

  
135
static CPUWriteMemoryFunc *nvram_write[] = {
135
static CPUWriteMemoryFunc * const nvram_write[] = {
136 136
    &nvram_writeb,
137 137
    &nvram_writew,
138 138
    &nvram_writel,
139 139
};
140 140

  
141
static CPUWriteMemoryFunc *nvram_write_protected[] = {
141
static CPUWriteMemoryFunc * const nvram_write_protected[] = {
142 142
    &nvram_writeb_protected,
143 143
    &nvram_writew_protected,
144 144
    &nvram_writel_protected,
b/hw/e1000.c
1020 1020

  
1021 1021
/* PCI interface */
1022 1022

  
1023
static CPUWriteMemoryFunc *e1000_mmio_write[] = {
1023
static CPUWriteMemoryFunc * const e1000_mmio_write[] = {
1024 1024
    e1000_mmio_writeb,	e1000_mmio_writew,	e1000_mmio_writel
1025 1025
};
1026 1026

  
1027
static CPUReadMemoryFunc *e1000_mmio_read[] = {
1027
static CPUReadMemoryFunc * const e1000_mmio_read[] = {
1028 1028
    e1000_mmio_readb,	e1000_mmio_readw,	e1000_mmio_readl
1029 1029
};
1030 1030

  
b/hw/eccmemctl.c
221 221
    return ret;
222 222
}
223 223

  
224
static CPUReadMemoryFunc *ecc_mem_read[3] = {
224
static CPUReadMemoryFunc * const ecc_mem_read[3] = {
225 225
    NULL,
226 226
    NULL,
227 227
    ecc_mem_readl,
228 228
};
229 229

  
230
static CPUWriteMemoryFunc *ecc_mem_write[3] = {
230
static CPUWriteMemoryFunc * const ecc_mem_write[3] = {
231 231
    NULL,
232 232
    NULL,
233 233
    ecc_mem_writel,
......
251 251
    return ret;
252 252
}
253 253

  
254
static CPUReadMemoryFunc *ecc_diag_mem_read[3] = {
254
static CPUReadMemoryFunc * const ecc_diag_mem_read[3] = {
255 255
    ecc_diag_mem_readb,
256 256
    NULL,
257 257
    NULL,
258 258
};
259 259

  
260
static CPUWriteMemoryFunc *ecc_diag_mem_write[3] = {
260
static CPUWriteMemoryFunc * const ecc_diag_mem_write[3] = {
261 261
    ecc_diag_mem_writeb,
262 262
    NULL,
263 263
    NULL,
b/hw/eepro100.c
1405 1405
    return eepro100_read4(s, addr);
1406 1406
}
1407 1407

  
1408
static CPUWriteMemoryFunc *pci_mmio_write[] = {
1408
static CPUWriteMemoryFunc * const pci_mmio_write[] = {
1409 1409
    pci_mmio_writeb,
1410 1410
    pci_mmio_writew,
1411 1411
    pci_mmio_writel
1412 1412
};
1413 1413

  
1414
static CPUReadMemoryFunc *pci_mmio_read[] = {
1414
static CPUReadMemoryFunc * const pci_mmio_read[] = {
1415 1415
    pci_mmio_readb,
1416 1416
    pci_mmio_readw,
1417 1417
    pci_mmio_readl
b/hw/escc.c
654 654
        serial_receive_break(s);
655 655
}
656 656

  
657
static CPUReadMemoryFunc *escc_mem_read[3] = {
657
static CPUReadMemoryFunc * const escc_mem_read[3] = {
658 658
    escc_mem_readb,
659 659
    NULL,
660 660
    NULL,
661 661
};
662 662

  
663
static CPUWriteMemoryFunc *escc_mem_write[3] = {
663
static CPUWriteMemoryFunc * const escc_mem_write[3] = {
664 664
    escc_mem_writeb,
665 665
    NULL,
666 666
    NULL,
b/hw/esp.c
579 579
    s->wregs[saddr] = val;
580 580
}
581 581

  
582
static CPUReadMemoryFunc *esp_mem_read[3] = {
582
static CPUReadMemoryFunc * const esp_mem_read[3] = {
583 583
    esp_mem_readb,
584 584
    NULL,
585 585
    NULL,
586 586
};
587 587

  
588
static CPUWriteMemoryFunc *esp_mem_write[3] = {
588
static CPUWriteMemoryFunc * const esp_mem_write[3] = {
589 589
    esp_mem_writeb,
590 590
    NULL,
591 591
    esp_mem_writeb,
b/hw/etraxfs_dma.c
668 668
        }
669 669
}
670 670

  
671
static CPUReadMemoryFunc *dma_read[] = {
671
static CPUReadMemoryFunc * const dma_read[] = {
672 672
	&dma_rinvalid,
673 673
	&dma_rinvalid,
674 674
	&dma_readl,
675 675
};
676 676

  
677
static CPUWriteMemoryFunc *dma_write[] = {
677
static CPUWriteMemoryFunc * const dma_write[] = {
678 678
	&dma_winvalid,
679 679
	&dma_winvalid,
680 680
	&dma_writel,
b/hw/etraxfs_eth.c
544 544
	eth->phy.link = !vc->link_down;
545 545
}
546 546

  
547
static CPUReadMemoryFunc *eth_read[] = {
547
static CPUReadMemoryFunc * const eth_read[] = {
548 548
	NULL, NULL,
549 549
	&eth_readl,
550 550
};
551 551

  
552
static CPUWriteMemoryFunc *eth_write[] = {
552
static CPUWriteMemoryFunc * const eth_write[] = {
553 553
	NULL, NULL,
554 554
	&eth_writel,
555 555
};
b/hw/etraxfs_pic.c
99 99
    }
100 100
}
101 101

  
102
static CPUReadMemoryFunc *pic_read[] = {
102
static CPUReadMemoryFunc * const pic_read[] = {
103 103
    NULL, NULL,
104 104
    &pic_readl,
105 105
};
106 106

  
107
static CPUWriteMemoryFunc *pic_write[] = {
107
static CPUWriteMemoryFunc * const pic_write[] = {
108 108
    NULL, NULL,
109 109
    &pic_writel,
110 110
};
b/hw/etraxfs_ser.c
122 122
    ser_update_irq(s);
123 123
}
124 124

  
125
static CPUReadMemoryFunc *ser_read[] = {
125
static CPUReadMemoryFunc * const ser_read[] = {
126 126
    NULL, NULL,
127 127
    &ser_readl,
128 128
};
129 129

  
130
static CPUWriteMemoryFunc *ser_write[] = {
130
static CPUWriteMemoryFunc * const ser_write[] = {
131 131
    NULL, NULL,
132 132
    &ser_writel,
133 133
};
b/hw/etraxfs_timer.c
285 285
    }
286 286
}
287 287

  
288
static CPUReadMemoryFunc *timer_read[] = {
288
static CPUReadMemoryFunc * const timer_read[] = {
289 289
    NULL, NULL,
290 290
    &timer_readl,
291 291
};
292 292

  
293
static CPUWriteMemoryFunc *timer_write[] = {
293
static CPUWriteMemoryFunc * const timer_write[] = {
294 294
    NULL, NULL,
295 295
    &timer_writel,
296 296
};
b/hw/fdc.c
603 603
    fdctrl_write(opaque, (uint32_t)reg, value);
604 604
}
605 605

  
606
static CPUReadMemoryFunc *fdctrl_mem_read[3] = {
606
static CPUReadMemoryFunc * const fdctrl_mem_read[3] = {
607 607
    fdctrl_read_mem,
608 608
    fdctrl_read_mem,
609 609
    fdctrl_read_mem,
610 610
};
611 611

  
612
static CPUWriteMemoryFunc *fdctrl_mem_write[3] = {
612
static CPUWriteMemoryFunc * const fdctrl_mem_write[3] = {
613 613
    fdctrl_write_mem,
614 614
    fdctrl_write_mem,
615 615
    fdctrl_write_mem,
616 616
};
617 617

  
618
static CPUReadMemoryFunc *fdctrl_mem_read_strict[3] = {
618
static CPUReadMemoryFunc * const fdctrl_mem_read_strict[3] = {
619 619
    fdctrl_read_mem,
620 620
    NULL,
621 621
    NULL,
622 622
};
623 623

  
624
static CPUWriteMemoryFunc *fdctrl_mem_write_strict[3] = {
624
static CPUWriteMemoryFunc * const fdctrl_mem_write_strict[3] = {
625 625
    fdctrl_write_mem,
626 626
    NULL,
627 627
    NULL,
b/hw/fw_cfg.c
133 133
    fw_cfg_select(opaque, (uint16_t)value);
134 134
}
135 135

  
136
static CPUReadMemoryFunc *fw_cfg_ctl_mem_read[3] = {
136
static CPUReadMemoryFunc * const fw_cfg_ctl_mem_read[3] = {
137 137
    NULL,
138 138
    NULL,
139 139
    NULL,
140 140
};
141 141

  
142
static CPUWriteMemoryFunc *fw_cfg_ctl_mem_write[3] = {
142
static CPUWriteMemoryFunc * const fw_cfg_ctl_mem_write[3] = {
143 143
    NULL,
144 144
    fw_cfg_mem_writew,
145 145
    NULL,
146 146
};
147 147

  
148
static CPUReadMemoryFunc *fw_cfg_data_mem_read[3] = {
148
static CPUReadMemoryFunc * const fw_cfg_data_mem_read[3] = {
149 149
    fw_cfg_mem_readb,
150 150
    NULL,
151 151
    NULL,
152 152
};
153 153

  
154
static CPUWriteMemoryFunc *fw_cfg_data_mem_write[3] = {
154
static CPUWriteMemoryFunc * const fw_cfg_data_mem_write[3] = {
155 155
    fw_cfg_mem_writeb,
156 156
    NULL,
157 157
    NULL,
b/hw/g364fb.c
522 522
    g364fb_ctrl_writel(opaque, addr & ~0x3, val);
523 523
}
524 524

  
525
static CPUReadMemoryFunc *g364fb_ctrl_read[3] = {
525
static CPUReadMemoryFunc * const g364fb_ctrl_read[3] = {
526 526
    g364fb_ctrl_readb,
527 527
    g364fb_ctrl_readw,
528 528
    g364fb_ctrl_readl,
529 529
};
530 530

  
531
static CPUWriteMemoryFunc *g364fb_ctrl_write[3] = {
531
static CPUWriteMemoryFunc * const g364fb_ctrl_write[3] = {
532 532
    g364fb_ctrl_writeb,
533 533
    g364fb_ctrl_writew,
534 534
    g364fb_ctrl_writel,
b/hw/grackle_pci.c
72 72
    return val;
73 73
}
74 74

  
75
static CPUWriteMemoryFunc *pci_grackle_config_write[] = {
75
static CPUWriteMemoryFunc * const pci_grackle_config_write[] = {
76 76
    &pci_grackle_config_writel,
77 77
    &pci_grackle_config_writel,
78 78
    &pci_grackle_config_writel,
79 79
};
80 80

  
81
static CPUReadMemoryFunc *pci_grackle_config_read[] = {
81
static CPUReadMemoryFunc * const pci_grackle_config_read[] = {
82 82
    &pci_grackle_config_readl,
83 83
    &pci_grackle_config_readl,
84 84
    &pci_grackle_config_readl,
85 85
};
86 86

  
87
static CPUWriteMemoryFunc *pci_grackle_write[] = {
87
static CPUWriteMemoryFunc * const pci_grackle_write[] = {
88 88
    &pci_host_data_writeb,
89 89
    &pci_host_data_writew,
90 90
    &pci_host_data_writel,
91 91
};
92 92

  
93
static CPUReadMemoryFunc *pci_grackle_read[] = {
93
static CPUReadMemoryFunc * const pci_grackle_read[] = {
94 94
    &pci_host_data_readb,
95 95
    &pci_host_data_readw,
96 96
    &pci_host_data_readl,
b/hw/gt64xxx.c
854 854
    return val;
855 855
}
856 856

  
857
static CPUWriteMemoryFunc *gt64120_write[] = {
857
static CPUWriteMemoryFunc * const gt64120_write[] = {
858 858
    &gt64120_writel,
859 859
    &gt64120_writel,
860 860
    &gt64120_writel,
861 861
};
862 862

  
863
static CPUReadMemoryFunc *gt64120_read[] = {
863
static CPUReadMemoryFunc * const gt64120_read[] = {
864 864
    &gt64120_readl,
865 865
    &gt64120_readl,
866 866
    &gt64120_readl,
b/hw/heathrow_pic.c
126 126
    return value;
127 127
}
128 128

  
129
static CPUWriteMemoryFunc *pic_write[] = {
129
static CPUWriteMemoryFunc * const pic_write[] = {
130 130
    &pic_writel,
131 131
    &pic_writel,
132 132
    &pic_writel,
133 133
};
134 134

  
135
static CPUReadMemoryFunc *pic_read[] = {
135
static CPUReadMemoryFunc * const pic_read[] = {
136 136
    &pic_readl,
137 137
    &pic_readl,
138 138
    &pic_readl,
b/hw/hpet.c
508 508
    }
509 509
}
510 510

  
511
static CPUReadMemoryFunc *hpet_ram_read[] = {
511
static CPUReadMemoryFunc * const hpet_ram_read[] = {
512 512
#ifdef HPET_DEBUG
513 513
    hpet_ram_readb,
514 514
    hpet_ram_readw,
......
519 519
    hpet_ram_readl,
520 520
};
521 521

  
522
static CPUWriteMemoryFunc *hpet_ram_write[] = {
522
static CPUWriteMemoryFunc * const hpet_ram_write[] = {
523 523
#ifdef HPET_DEBUG
524 524
    hpet_ram_writeb,
525 525
    hpet_ram_writew,
b/hw/ide.c
3906 3906
    return retval;
3907 3907
}
3908 3908

  
3909
static CPUWriteMemoryFunc *pmac_ide_write[] = {
3909
static CPUWriteMemoryFunc * const pmac_ide_write[] = {
3910 3910
    pmac_ide_writeb,
3911 3911
    pmac_ide_writew,
3912 3912
    pmac_ide_writel,
3913 3913
};
3914 3914

  
3915
static CPUReadMemoryFunc *pmac_ide_read[] = {
3915
static CPUReadMemoryFunc * const pmac_ide_read[] = {
3916 3916
    pmac_ide_readb,
3917 3917
    pmac_ide_readw,
3918 3918
    pmac_ide_readl,
......
4026 4026
        ide_data_writew(ide, 0, val);
4027 4027
}
4028 4028

  
4029
static CPUReadMemoryFunc *mmio_ide_reads[] = {
4029
static CPUReadMemoryFunc * const mmio_ide_reads[] = {
4030 4030
    mmio_ide_read,
4031 4031
    mmio_ide_read,
4032 4032
    mmio_ide_read,
4033 4033
};
4034 4034

  
4035
static CPUWriteMemoryFunc *mmio_ide_writes[] = {
4035
static CPUWriteMemoryFunc * const mmio_ide_writes[] = {
4036 4036
    mmio_ide_write,
4037 4037
    mmio_ide_write,
4038 4038
    mmio_ide_write,
......
4053 4053
    ide_cmd_write(ide, 0, val);
4054 4054
}
4055 4055

  
4056
static CPUReadMemoryFunc *mmio_ide_status[] = {
4056
static CPUReadMemoryFunc * const mmio_ide_status[] = {
4057 4057
    mmio_ide_status_read,
4058 4058
    mmio_ide_status_read,
4059 4059
    mmio_ide_status_read,
4060 4060
};
4061 4061

  
4062
static CPUWriteMemoryFunc *mmio_ide_cmd[] = {
4062
static CPUWriteMemoryFunc * const mmio_ide_cmd[] = {
4063 4063
    mmio_ide_cmd_write,
4064 4064
    mmio_ide_cmd_write,
4065 4065
    mmio_ide_cmd_write,
b/hw/integratorcp.c
215 215

  
216 216
/* Integrator/CM control registers.  */
217 217

  
218
static CPUReadMemoryFunc *integratorcm_readfn[] = {
218
static CPUReadMemoryFunc * const integratorcm_readfn[] = {
219 219
   integratorcm_read,
220 220
   integratorcm_read,
221 221
   integratorcm_read
222 222
};
223 223

  
224
static CPUWriteMemoryFunc *integratorcm_writefn[] = {
224
static CPUWriteMemoryFunc * const integratorcm_writefn[] = {
225 225
   integratorcm_write,
226 226
   integratorcm_write,
227 227
   integratorcm_write
......
360 360
    icp_pic_update(s);
361 361
}
362 362

  
363
static CPUReadMemoryFunc *icp_pic_readfn[] = {
363
static CPUReadMemoryFunc * const icp_pic_readfn[] = {
364 364
   icp_pic_read,
365 365
   icp_pic_read,
366 366
   icp_pic_read
367 367
};
368 368

  
369
static CPUWriteMemoryFunc *icp_pic_writefn[] = {
369
static CPUWriteMemoryFunc * const icp_pic_writefn[] = {
370 370
   icp_pic_write,
371 371
   icp_pic_write,
372 372
   icp_pic_write
......
416 416
        hw_error("icp_control_write: Bad offset %x\n", (int)offset);
417 417
    }
418 418
}
419
static CPUReadMemoryFunc *icp_control_readfn[] = {
419
static CPUReadMemoryFunc * const icp_control_readfn[] = {
420 420
   icp_control_read,
421 421
   icp_control_read,
422 422
   icp_control_read
423 423
};
424 424

  
425
static CPUWriteMemoryFunc *icp_control_writefn[] = {
425
static CPUWriteMemoryFunc * const icp_control_writefn[] = {
426 426
   icp_control_write,
427 427
   icp_control_write,
428 428
   icp_control_write
b/hw/ioapic.c
229 229
        s->ioredtbl[i] = 1 << 16; /* mask LVT */
230 230
}
231 231

  
232
static CPUReadMemoryFunc *ioapic_mem_read[3] = {
232
static CPUReadMemoryFunc * const ioapic_mem_read[3] = {
233 233
    ioapic_mem_readl,
234 234
    ioapic_mem_readl,
235 235
    ioapic_mem_readl,
236 236
};
237 237

  
238
static CPUWriteMemoryFunc *ioapic_mem_write[3] = {
238
static CPUWriteMemoryFunc * const ioapic_mem_write[3] = {
239 239
    ioapic_mem_writel,
240 240
    ioapic_mem_writel,
241 241
    ioapic_mem_writel,
b/hw/iommu.c
238 238
    }
239 239
}
240 240

  
241
static CPUReadMemoryFunc *iommu_mem_read[3] = {
241
static CPUReadMemoryFunc * const iommu_mem_read[3] = {
242 242
    NULL,
243 243
    NULL,
244 244
    iommu_mem_readl,
245 245
};
246 246

  
247
static CPUWriteMemoryFunc *iommu_mem_write[3] = {
247
static CPUWriteMemoryFunc * const iommu_mem_write[3] = {
248 248
    NULL,
249 249
    NULL,
250 250
    iommu_mem_writel,
b/hw/isa_mmio.c
79 79
    return val;
80 80
}
81 81

  
82
static CPUWriteMemoryFunc *isa_mmio_write[] = {
82
static CPUWriteMemoryFunc * const isa_mmio_write[] = {
83 83
    &isa_mmio_writeb,
84 84
    &isa_mmio_writew,
85 85
    &isa_mmio_writel,
86 86
};
87 87

  
88
static CPUReadMemoryFunc *isa_mmio_read[] = {
88
static CPUReadMemoryFunc * const isa_mmio_read[] = {
89 89
    &isa_mmio_readb,
90 90
    &isa_mmio_readw,
91 91
    &isa_mmio_readl,
b/hw/jazz_led.c
131 131
#endif
132 132
}
133 133

  
134
static CPUReadMemoryFunc *led_read[3] = {
134
static CPUReadMemoryFunc * const led_read[3] = {
135 135
    led_readb,
136 136
    led_readw,
137 137
    led_readl,
138 138
};
139 139

  
140
static CPUWriteMemoryFunc *led_write[3] = {
140
static CPUWriteMemoryFunc * const led_write[3] = {
141 141
    led_writeb,
142 142
    led_writew,
143 143
    led_writel,
b/hw/lsi53c895a.c
1779 1779
    return val;
1780 1780
}
1781 1781

  
1782
static CPUReadMemoryFunc *lsi_mmio_readfn[3] = {
1782
static CPUReadMemoryFunc * const lsi_mmio_readfn[3] = {
1783 1783
    lsi_mmio_readb,
1784 1784
    lsi_mmio_readw,
1785 1785
    lsi_mmio_readl,
1786 1786
};
1787 1787

  
1788
static CPUWriteMemoryFunc *lsi_mmio_writefn[3] = {
1788
static CPUWriteMemoryFunc * const lsi_mmio_writefn[3] = {
1789 1789
    lsi_mmio_writeb,
1790 1790
    lsi_mmio_writew,
1791 1791
    lsi_mmio_writel,
......
1860 1860
    return le32_to_cpu(s->script_ram[addr >> 2]);
1861 1861
}
1862 1862

  
1863
static CPUReadMemoryFunc *lsi_ram_readfn[3] = {
1863
static CPUReadMemoryFunc * const lsi_ram_readfn[3] = {
1864 1864
    lsi_ram_readb,
1865 1865
    lsi_ram_readw,
1866 1866
    lsi_ram_readl,
1867 1867
};
1868 1868

  
1869
static CPUWriteMemoryFunc *lsi_ram_writefn[3] = {
1869
static CPUWriteMemoryFunc * const lsi_ram_writefn[3] = {
1870 1870
    lsi_ram_writeb,
1871 1871
    lsi_ram_writew,
1872 1872
    lsi_ram_writel,
b/hw/m48t59.c
565 565
    return retval;
566 566
}
567 567

  
568
static CPUWriteMemoryFunc *nvram_write[] = {
568
static CPUWriteMemoryFunc * const nvram_write[] = {
569 569
    &nvram_writeb,
570 570
    &nvram_writew,
571 571
    &nvram_writel,
572 572
};
573 573

  
574
static CPUReadMemoryFunc *nvram_read[] = {
574
static CPUReadMemoryFunc * const nvram_read[] = {
575 575
    &nvram_readb,
576 576
    &nvram_readw,
577 577
    &nvram_readl,
b/hw/mac_dbdma.c
785 785
    return value;
786 786
}
787 787

  
788
static CPUWriteMemoryFunc *dbdma_write[] = {
788
static CPUWriteMemoryFunc * const dbdma_write[] = {
789 789
    NULL,
790 790
    NULL,
791 791
    dbdma_writel,
792 792
};
793 793

  
794
static CPUReadMemoryFunc *dbdma_read[] = {
794
static CPUReadMemoryFunc * const dbdma_read[] = {
795 795
    NULL,
796 796
    NULL,
797 797
    dbdma_readl,
b/hw/mac_nvram.c
93 93
    return value;
94 94
}
95 95

  
96
static CPUWriteMemoryFunc *nvram_write[] = {
96
static CPUWriteMemoryFunc * const nvram_write[] = {
97 97
    &macio_nvram_writeb,
98 98
    &macio_nvram_writeb,
99 99
    &macio_nvram_writeb,
100 100
};
101 101

  
102
static CPUReadMemoryFunc *nvram_read[] = {
102
static CPUReadMemoryFunc * const nvram_read[] = {
103 103
    &macio_nvram_readb,
104 104
    &macio_nvram_readb,
105 105
    &macio_nvram_readb,
b/hw/marvell_88w8618_audio.c
221 221
    s->irq_enable = 0;
222 222
}
223 223

  
224
static CPUReadMemoryFunc *mv88w8618_audio_readfn[] = {
224
static CPUReadMemoryFunc * const mv88w8618_audio_readfn[] = {
225 225
    mv88w8618_audio_read,
226 226
    mv88w8618_audio_read,
227 227
    mv88w8618_audio_read
228 228
};
229 229

  
230
static CPUWriteMemoryFunc *mv88w8618_audio_writefn[] = {
230
static CPUWriteMemoryFunc * const mv88w8618_audio_writefn[] = {
231 231
    mv88w8618_audio_write,
232 232
    mv88w8618_audio_write,
233 233
    mv88w8618_audio_write
b/hw/mc146818rtc.c
696 696
    cmos_ioport_write(s, addr >> s->it_shift, value);
697 697
}
698 698

  
699
static CPUReadMemoryFunc *rtc_mm_read[] = {
699
static CPUReadMemoryFunc * const rtc_mm_read[] = {
700 700
    &cmos_mm_readb,
701 701
    &cmos_mm_readw,
702 702
    &cmos_mm_readl,
703 703
};
704 704

  
705
static CPUWriteMemoryFunc *rtc_mm_write[] = {
705
static CPUWriteMemoryFunc * const rtc_mm_write[] = {
706 706
    &cmos_mm_writeb,
707 707
    &cmos_mm_writew,
708 708
    &cmos_mm_writel,
b/hw/mcf5206.c
505 505
    m5206_mbar_write(s, offset, value);
506 506
}
507 507

  
508
static CPUReadMemoryFunc *m5206_mbar_readfn[] = {
508
static CPUReadMemoryFunc * const m5206_mbar_readfn[] = {
509 509
   m5206_mbar_readb,
510 510
   m5206_mbar_readw,
511 511
   m5206_mbar_readl
512 512
};
513 513

  
514
static CPUWriteMemoryFunc *m5206_mbar_writefn[] = {
514
static CPUWriteMemoryFunc * const m5206_mbar_writefn[] = {
515 515
   m5206_mbar_writeb,
516 516
   m5206_mbar_writew,
517 517
   m5206_mbar_writel
b/hw/mcf5208.c
118 118
    }
119 119
}
120 120

  
121
static CPUReadMemoryFunc *m5208_timer_readfn[] = {
121
static CPUReadMemoryFunc * const m5208_timer_readfn[] = {
122 122
   m5208_timer_read,
123 123
   m5208_timer_read,
124 124
   m5208_timer_read
125 125
};
126 126

  
127
static CPUWriteMemoryFunc *m5208_timer_writefn[] = {
127
static CPUWriteMemoryFunc * const m5208_timer_writefn[] = {
128 128
   m5208_timer_write,
129 129
   m5208_timer_write,
130 130
   m5208_timer_write
......
157 157
    hw_error("m5208_sys_write: Bad offset 0x%x\n", (int)addr);
158 158
}
159 159

  
160
static CPUReadMemoryFunc *m5208_sys_readfn[] = {
160
static CPUReadMemoryFunc * const m5208_sys_readfn[] = {
161 161
   m5208_sys_read,
162 162
   m5208_sys_read,
163 163
   m5208_sys_read
164 164
};
165 165

  
166
static CPUWriteMemoryFunc *m5208_sys_writefn[] = {
166
static CPUWriteMemoryFunc * const m5208_sys_writefn[] = {
167 167
   m5208_sys_write,
168 168
   m5208_sys_write,
169 169
   m5208_sys_write
b/hw/mcf_fec.c
429 429
    return size;
430 430
}
431 431

  
432
static CPUReadMemoryFunc *mcf_fec_readfn[] = {
432
static CPUReadMemoryFunc * const mcf_fec_readfn[] = {
433 433
   mcf_fec_read,
434 434
   mcf_fec_read,
435 435
   mcf_fec_read
436 436
};
437 437

  
438
static CPUWriteMemoryFunc *mcf_fec_writefn[] = {
438
static CPUWriteMemoryFunc * const mcf_fec_writefn[] = {
439 439
   mcf_fec_write,
440 440
   mcf_fec_write,
441 441
   mcf_fec_write
b/hw/mcf_intc.c
127 127
    s->active_vector = 24;
128 128
}
129 129

  
130
static CPUReadMemoryFunc *mcf_intc_readfn[] = {
130
static CPUReadMemoryFunc * const mcf_intc_readfn[] = {
131 131
   mcf_intc_read,
132 132
   mcf_intc_read,
133 133
   mcf_intc_read
134 134
};
135 135

  
136
static CPUWriteMemoryFunc *mcf_intc_writefn[] = {
136
static CPUWriteMemoryFunc * const mcf_intc_writefn[] = {
137 137
   mcf_intc_write,
138 138
   mcf_intc_write,
139 139
   mcf_intc_write
b/hw/mcf_uart.c
284 284
}
285 285

  
286 286

  
287
static CPUReadMemoryFunc *mcf_uart_readfn[] = {
287
static CPUReadMemoryFunc * const mcf_uart_readfn[] = {
288 288
   mcf_uart_read,
289 289
   mcf_uart_read,
290 290
   mcf_uart_read
291 291
};
292 292

  
293
static CPUWriteMemoryFunc *mcf_uart_writefn[] = {
293
static CPUWriteMemoryFunc * const mcf_uart_writefn[] = {
294 294
   mcf_uart_write,
295 295
   mcf_uart_write,
296 296
   mcf_uart_write
b/hw/mips_jazz.c
58 58
    cpu_outw(env, 0x71, val & 0xff);
59 59
}
60 60

  
61
static CPUReadMemoryFunc *rtc_read[3] = {
61
static CPUReadMemoryFunc * const rtc_read[3] = {
62 62
    rtc_readb,
63 63
    rtc_readb,
64 64
    rtc_readb,
65 65
};
66 66

  
67
static CPUWriteMemoryFunc *rtc_write[3] = {
67
static CPUWriteMemoryFunc * const rtc_write[3] = {
68 68
    rtc_writeb,
69 69
    rtc_writeb,
70 70
    rtc_writeb,
......
76 76
     * the current DMA acknowledge cycle is completed. */
77 77
}
78 78

  
79
static CPUReadMemoryFunc *dma_dummy_read[3] = {
79
static CPUReadMemoryFunc * const dma_dummy_read[3] = {
80 80
    NULL,
81 81
    NULL,
82 82
    NULL,
83 83
};
84 84

  
85
static CPUWriteMemoryFunc *dma_dummy_write[3] = {
85
static CPUWriteMemoryFunc * const dma_dummy_write[3] = {
86 86
    dma_dummy_writeb,
87 87
    dma_dummy_writeb,
88 88
    dma_dummy_writeb,
b/hw/mips_malta.c
387 387
    }
388 388
}
389 389

  
390
static CPUReadMemoryFunc *malta_fpga_read[] = {
390
static CPUReadMemoryFunc * const malta_fpga_read[] = {
391 391
   malta_fpga_readl,
392 392
   malta_fpga_readl,
393 393
   malta_fpga_readl
394 394
};
395 395

  
396
static CPUWriteMemoryFunc *malta_fpga_write[] = {
396
static CPUWriteMemoryFunc * const malta_fpga_write[] = {
397 397
   malta_fpga_writel,
398 398
   malta_fpga_writel,
399 399
   malta_fpga_writel
b/hw/mips_r4k.c
56 56
    return 0;
57 57
}
58 58

  
59
static CPUWriteMemoryFunc *mips_qemu_write[] = {
59
static CPUWriteMemoryFunc * const mips_qemu_write[] = {
60 60
    &mips_qemu_writel,
61 61
    &mips_qemu_writel,
62 62
    &mips_qemu_writel,
63 63
};
64 64

  
65
static CPUReadMemoryFunc *mips_qemu_read[] = {
65
static CPUReadMemoryFunc * const mips_qemu_read[] = {
66 66
    &mips_qemu_readl,
67 67
    &mips_qemu_readl,
68 68
    &mips_qemu_readl,
b/hw/mpcore.c
243 243
    hw_error("mpcore_priv_read: Bad offset %x\n", (int)offset);
244 244
}
245 245

  
246
static CPUReadMemoryFunc *mpcore_priv_readfn[] = {
246
static CPUReadMemoryFunc * const mpcore_priv_readfn[] = {
247 247
   mpcore_priv_read,
248 248
   mpcore_priv_read,
249 249
   mpcore_priv_read
250 250
};
251 251

  
252
static CPUWriteMemoryFunc *mpcore_priv_writefn[] = {
252
static CPUWriteMemoryFunc * const mpcore_priv_writefn[] = {
253 253
   mpcore_priv_write,
254 254
   mpcore_priv_write,
255 255
   mpcore_priv_write
b/hw/msix.c
194 194
    fprintf(stderr, "MSI-X: only dword write is allowed!\n");
195 195
}
196 196

  
197
static CPUWriteMemoryFunc *msix_mmio_write[] = {
197
static CPUWriteMemoryFunc * const msix_mmio_write[] = {
198 198
    msix_mmio_write_unallowed, msix_mmio_write_unallowed, msix_mmio_writel
199 199
};
200 200

  
201
static CPUReadMemoryFunc *msix_mmio_read[] = {
201
static CPUReadMemoryFunc * const msix_mmio_read[] = {
202 202
    msix_mmio_read_unallowed, msix_mmio_read_unallowed, msix_mmio_readl
203 203
};
204 204

  
b/hw/mst_fpga.c
164 164
	}
165 165
}
166 166

  
167
static CPUReadMemoryFunc *mst_fpga_readfn[] = {
167
static CPUReadMemoryFunc * const mst_fpga_readfn[] = {
168 168
	mst_fpga_readb,
169 169
	mst_fpga_readb,
170 170
	mst_fpga_readb,
171 171
};
172
static CPUWriteMemoryFunc *mst_fpga_writefn[] = {
172
static CPUWriteMemoryFunc * const mst_fpga_writefn[] = {
173 173
	mst_fpga_writeb,
174 174
	mst_fpga_writeb,
175 175
	mst_fpga_writeb,
b/hw/musicpal.c
344 344
    }
345 345
}
346 346

  
347
static CPUReadMemoryFunc *mv88w8618_eth_readfn[] = {
347
static CPUReadMemoryFunc * const mv88w8618_eth_readfn[] = {
348 348
    mv88w8618_eth_read,
349 349
    mv88w8618_eth_read,
350 350
    mv88w8618_eth_read
351 351
};
352 352

  
353
static CPUWriteMemoryFunc *mv88w8618_eth_writefn[] = {
353
static CPUWriteMemoryFunc * const mv88w8618_eth_writefn[] = {
354 354
    mv88w8618_eth_write,
355 355
    mv88w8618_eth_write,
356 356
    mv88w8618_eth_write
......
532 532
    }
533 533
}
534 534

  
535
static CPUReadMemoryFunc *musicpal_lcd_readfn[] = {
535
static CPUReadMemoryFunc * const musicpal_lcd_readfn[] = {
536 536
    musicpal_lcd_read,
537 537
    musicpal_lcd_read,
538 538
    musicpal_lcd_read
539 539
};
540 540

  
541
static CPUWriteMemoryFunc *musicpal_lcd_writefn[] = {
541
static CPUWriteMemoryFunc * const musicpal_lcd_writefn[] = {
542 542
    musicpal_lcd_write,
543 543
    musicpal_lcd_write,
544 544
    musicpal_lcd_write
......
630 630
    s->enabled = 0;
631 631
}
632 632

  
633
static CPUReadMemoryFunc *mv88w8618_pic_readfn[] = {
633
static CPUReadMemoryFunc * const mv88w8618_pic_readfn[] = {
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