Revision d65f0831

b/tests/Makefile
142 142
test-cris:
143 143
	$(MAKE) -C cris check
144 144

  
145
# testsuite for the LM32 port.
146
test-lm32:
147
	$(MAKE) -C lm32 check
148

  
145 149
clean:
146 150
	rm -f *~ *.o test-i386.out test-i386.ref \
147 151
           test-x86_64.log test-x86_64.ref qruncom $(TESTS)
b/tests/lm32/Makefile
1
-include ../../config-host.mak
2

  
3
CROSS=lm32-elf-
4

  
5
SIM = qemu-system-lm32
6
SIMFLAGS = -M lm32-evr -nographic -device lm32-sys -net none -kernel
7

  
8
CC      = $(CROSS)gcc
9
AS      = $(CROSS)as
10
AS      = $(CC) -x assembler
11
SIZE    = $(CROSS)size
12
LD      = $(CC)
13
OBJCOPY = $(CROSS)objcopy
14

  
15
LDFLAGS = -Tlinker.ld
16

  
17
CRT        = crt.o
18
TESTCASES += test_add.tst
19
TESTCASES += test_addi.tst
20
TESTCASES += test_and.tst
21
TESTCASES += test_andhi.tst
22
TESTCASES += test_andi.tst
23
TESTCASES += test_b.tst
24
TESTCASES += test_be.tst
25
TESTCASES += test_bg.tst
26
TESTCASES += test_bge.tst
27
TESTCASES += test_bgeu.tst
28
TESTCASES += test_bgu.tst
29
TESTCASES += test_bi.tst
30
TESTCASES += test_bne.tst
31
TESTCASES += test_break.tst
32
TESTCASES += test_bret.tst
33
TESTCASES += test_call.tst
34
TESTCASES += test_calli.tst
35
TESTCASES += test_cmpe.tst
36
TESTCASES += test_cmpei.tst
37
TESTCASES += test_cmpg.tst
38
TESTCASES += test_cmpgi.tst
39
TESTCASES += test_cmpge.tst
40
TESTCASES += test_cmpgei.tst
41
TESTCASES += test_cmpgeu.tst
42
TESTCASES += test_cmpgeui.tst
43
TESTCASES += test_cmpgu.tst
44
TESTCASES += test_cmpgui.tst
45
TESTCASES += test_cmpne.tst
46
TESTCASES += test_cmpnei.tst
47
TESTCASES += test_divu.tst
48
TESTCASES += test_eret.tst
49
TESTCASES += test_lb.tst
50
TESTCASES += test_lbu.tst
51
TESTCASES += test_lh.tst
52
TESTCASES += test_lhu.tst
53
TESTCASES += test_lw.tst
54
TESTCASES += test_modu.tst
55
TESTCASES += test_mul.tst
56
TESTCASES += test_muli.tst
57
TESTCASES += test_nor.tst
58
TESTCASES += test_nori.tst
59
TESTCASES += test_or.tst
60
TESTCASES += test_ori.tst
61
TESTCASES += test_orhi.tst
62
#TESTCASES += test_rcsr.tst
63
TESTCASES += test_ret.tst
64
TESTCASES += test_sb.tst
65
TESTCASES += test_scall.tst
66
TESTCASES += test_sextb.tst
67
TESTCASES += test_sexth.tst
68
TESTCASES += test_sh.tst
69
TESTCASES += test_sl.tst
70
TESTCASES += test_sli.tst
71
TESTCASES += test_sr.tst
72
TESTCASES += test_sri.tst
73
TESTCASES += test_sru.tst
74
TESTCASES += test_srui.tst
75
TESTCASES += test_sub.tst
76
TESTCASES += test_sw.tst
77
#TESTCASES += test_wcsr.tst
78
TESTCASES += test_xnor.tst
79
TESTCASES += test_xnori.tst
80
TESTCASES += test_xor.tst
81
TESTCASES += test_xori.tst
82

  
83
all: build
84

  
85
%.o: $(SRC_PATH)/tests/lm32/%.c
86
	$(CC) $(CFLAGS) -c $< -o $@
87

  
88
%.o: $(SRC_PATH)/tests/lm32/%.S
89
	$(AS) $(ASFLAGS) -c $< -o $@
90

  
91
%.tst: %.o macros.inc $(CRT)
92
	$(LD) $(LDFLAGS) $(NOSTDFLAGS) $(CRT) $< -o $@
93

  
94
build: $(CRT) $(TESTCASES)
95

  
96
check: $(CRT) $(SYS) $(TESTCASES)
97
	@for case in $(TESTCASES); do \
98
		$(SIM) $(SIMFLAGS) ./$$case; \
99
	done
100

  
101
clean:
102
	$(RM) -fr $(TESTCASES) $(CRT)
b/tests/lm32/crt.S
1
.text
2
.global _start
3

  
4
_start:
5
_reset_handler:
6
	xor r0, r0, r0
7
	mvhi r1, hi(_start)
8
	ori r1, r1, lo(_start)
9
	wcsr eba, r1
10
	wcsr deba, r1
11
	bi _main
12
	nop
13
	nop
14

  
15
_breakpoint_handler:
16
	ori r25, r25, 1
17
	addi ra, ba, 4
18
	ret
19
	nop
20
	nop
21
	nop
22
	nop
23
	nop
24

  
25
_instruction_bus_error_handler:
26
	ori r25, r25, 2
27
	addi ra, ea, 4
28
	ret
29
	nop
30
	nop
31
	nop
32
	nop
33
	nop
34

  
35
_watchpoint_handler:
36
	ori r25, r25, 4
37
	addi ra, ba, 4
38
	ret
39
	nop
40
	nop
41
	nop
42
	nop
43
	nop
44

  
45
_data_bus_error_handler:
46
	ori r25, r25, 8
47
	addi ra, ea, 4
48
	ret
49
	nop
50
	nop
51
	nop
52
	nop
53
	nop
54

  
55
_divide_by_zero_handler:
56
	ori r25, r25, 16
57
	addi ra, ea, 4
58
	ret
59
	nop
60
	nop
61
	nop
62
	nop
63
	nop
64

  
65
_interrupt_handler:
66
	ori r25, r25, 32
67
	addi ra, ea, 4
68
	ret
69
	nop
70
	nop
71
	nop
72
	nop
73
	nop
74

  
75
_system_call_handler:
76
	ori r25, r25, 64
77
	addi ra, ea, 4
78
	ret
79
	nop
80
	nop
81
	nop
82
	nop
83
	nop
84

  
b/tests/lm32/linker.ld
1
OUTPUT_FORMAT("elf32-lm32")
2
ENTRY(_start)
3

  
4
__DYNAMIC = 0;
5

  
6
MEMORY {
7
	ram : ORIGIN = 0x08000000, LENGTH = 0x04000000  /* 64M */
8
}
9

  
10
SECTIONS
11
{
12
	.text :
13
	{
14
		_ftext = .;
15
		*(.text .stub .text.* .gnu.linkonce.t.*)
16
		_etext = .;
17
	} > ram
18

  
19
	.rodata :
20
	{
21
		. = ALIGN(4);
22
		_frodata = .;
23
		*(.rodata .rodata.* .gnu.linkonce.r.*)
24
		*(.rodata1)
25
		_erodata = .;
26
	} > ram
27

  
28
	.data :
29
	{
30
		. = ALIGN(4);
31
		_fdata = .;
32
		*(.data .data.* .gnu.linkonce.d.*)
33
		*(.data1)
34
		_gp = ALIGN(16);
35
		*(.sdata .sdata.* .gnu.linkonce.s.*)
36
		_edata = .;
37
	} > ram
38

  
39
	.bss :
40
	{
41
		. = ALIGN(4);
42
		_fbss = .;
43
		*(.dynsbss)
44
		*(.sbss .sbss.* .gnu.linkonce.sb.*)
45
		*(.scommon)
46
		*(.dynbss)
47
		*(.bss .bss.* .gnu.linkonce.b.*)
48
		*(COMMON)
49
		_ebss = .;
50
		_end = .;
51
	} > ram
52
}
53

  
54
PROVIDE(_fstack = ORIGIN(ram) + LENGTH(ram) - 4);
55

  
b/tests/lm32/macros.inc
1

  
2
.macro test_name name
3
	.data
4
tn_\name:
5
	.asciz "\name"
6
	.text
7
	mvhi r13, hi(tn_\name)
8
	ori r13, r13, lo(tn_\name)
9
	sw (r12+8), r13
10
.endm
11

  
12
.macro load reg val
13
	mvhi \reg, hi(\val)
14
	ori \reg, \reg, lo(\val)
15
.endm
16

  
17
.macro tc_pass
18
	mvi r13, 0
19
	sw (r12+4), r13
20
.endm
21

  
22
.macro tc_fail
23
	mvi r13, 1
24
	sw (r12+4), r13
25
.endm
26

  
27
.macro check_r3 val
28
	mvhi r13, hi(\val)
29
	ori r13, r13, lo(\val)
30
	be r3, r13, 1f
31
	tc_fail
32
	bi 2f
33
1:
34
	tc_pass
35
2:
36
.endm
37

  
38
.macro check_mem adr val
39
	mvhi r13, hi(\adr)
40
	ori r13, r13, lo(\adr)
41
	mvhi r14, hi(\val)
42
	ori r14, r14, lo(\val)
43
	lw r13, (r13+0)
44
	be r13, r14, 1f
45
	tc_fail
46
	bi 2f
47
1:
48
	tc_pass
49
2:
50
.endm
51

  
52
.macro check_excp excp
53
	andi r13, r25, \excp
54
	bne r13, r0, 1f
55
	tc_fail
56
	bi 2f
57
1:
58
	tc_pass
59
2:
60
.endm
61

  
62
.macro start
63
	.global _main
64
	.text
65
_main:
66
	mvhi r12, hi(0xffff0000)      # base address of test block
67
	ori r12, r12, lo(0xffff0000)
68
.endm
69

  
70
.macro end
71
	sw (r12+0), r0
72
1:
73
	bi 1b
74
.endm
75

  
76
# base +
77
#  0  ctrl
78
#  4  pass/fail
79
#  8  ptr to test name
b/tests/lm32/test_add.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name ADD_1
6
mvi r1, 0
7
mvi r2, 0
8
add r3, r1, r2
9
check_r3 0
10

  
11
test_name ADD_2
12
mvi r1, 0
13
mvi r2, 1
14
add r3, r1, r2
15
check_r3 1
16

  
17
test_name ADD_3
18
mvi r1, 1
19
mvi r2, 0
20
add r3, r1, r2
21
check_r3 1
22

  
23
test_name ADD_4
24
mvi r1, 1
25
mvi r2, -1
26
add r3, r1, r2
27
check_r3 0
28

  
29
test_name ADD_5
30
mvi r1, -1
31
mvi r2, 1
32
add r3, r1, r2
33
check_r3 0
34

  
35
test_name ADD_6
36
mvi r1, -1
37
mvi r2, 0
38
add r3, r1, r2
39
check_r3 -1
40

  
41
test_name ADD_7
42
mvi r1, 0
43
mvi r2, -1
44
add r3, r1, r2
45
check_r3 -1
46

  
47
test_name ADD_8
48
mvi r3, 2
49
add r3, r3, r3
50
check_r3 4
51

  
52
test_name ADD_9
53
mvi r1, 4
54
mvi r3, 2
55
add r3, r1, r3
56
check_r3 6
57

  
58
test_name ADD_10
59
mvi r1, 4
60
mvi r3, 2
61
add r3, r3, r1
62
check_r3 6
63

  
64
test_name ADD_11
65
mvi r1, 4
66
add r3, r1, r1
67
check_r3 8
68

  
69
test_name ADD_12
70
load r1 0x12345678
71
load r2 0xabcdef97
72
add r3, r1, r2
73
check_r3 0xbe02460f
74

  
75
end
b/tests/lm32/test_addi.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name ADDI_1
6
mvi r1, 0
7
addi r3, r1, 0
8
check_r3 0
9

  
10
test_name ADDI_2
11
mvi r1, 0
12
addi r3, r1, 1
13
check_r3 1
14

  
15
test_name ADDI_3
16
mvi r1, 1
17
addi r3, r1, 0
18
check_r3 1
19

  
20
test_name ADDI_4
21
mvi r1, 1
22
addi r3, r1, -1
23
check_r3 0
24

  
25
test_name ADDI_5
26
mvi r1, -1
27
addi r3, r1, 1
28
check_r3 0
29

  
30
test_name ADDI_6
31
mvi r1, -1
32
addi r3, r1, 0
33
check_r3 -1
34

  
35
test_name ADDI_7
36
mvi r1, 0
37
addi r3, r1, -1
38
check_r3 -1
39

  
40
test_name ADDI_8
41
mvi r3, 4
42
addi r3, r3, 4
43
check_r3 8
44

  
45
test_name ADDI_9
46
mvi r3, 4
47
addi r3, r3, -4
48
check_r3 0
49

  
50
test_name ADDI_10
51
mvi r3, 4
52
addi r3, r3, -5
53
check_r3 -1
54

  
55
end
56

  
b/tests/lm32/test_and.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name AND_1
6
mvi r1, 0
7
mvi r2, 0
8
and r3, r1, r2
9
check_r3 0
10

  
11
test_name AND_2
12
mvi r1, 0
13
mvi r2, 1
14
and r3, r1, r2
15
check_r3 0
16

  
17
test_name AND_3
18
mvi r1, 1
19
mvi r2, 1
20
and r3, r1, r2
21
check_r3 1
22

  
23
test_name AND_4
24
mvi r3, 7
25
and r3, r3, r3
26
check_r3 7
27

  
28
test_name AND_5
29
mvi r1, 7
30
and r3, r1, r1
31
check_r3 7
32

  
33
test_name AND_6
34
mvi r1, 7
35
mvi r3, 0
36
and r3, r1, r3
37
check_r3 0
38

  
39
test_name AND_7
40
load r1 0xaa55aa55
41
load r2 0x55aa55aa
42
and r3, r1, r2
43
check_r3 0
44

  
45
end
b/tests/lm32/test_andhi.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name ANDHI_1
6
mvi r1, 0
7
andhi r3, r1, 0
8
check_r3 0
9

  
10
test_name ANDHI_2
11
mvi r1, 1
12
andhi r3, r1, 1
13
check_r3 0
14

  
15
test_name ANDHI_3
16
load r1 0x000f0000
17
andhi r3, r1, 1
18
check_r3 0x00010000
19

  
20
test_name ANDHI_4
21
load r1 0xffffffff
22
andhi r3, r1, 0xffff
23
check_r3 0xffff0000
24

  
25
test_name ANDHI_5
26
load r1 0xffffffff
27
andhi r3, r1, 0
28
check_r3 0
29

  
30
test_name ANDHI_6
31
load r3 0x55aaffff
32
andhi r3, r3, 0xaaaa
33
check_r3 0x00aa0000
34

  
35
end
b/tests/lm32/test_andi.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name ANDI_1
6
mvi r1, 0
7
andi r3, r1, 0
8
check_r3 0
9

  
10
test_name ANDI_2
11
mvi r1, 1
12
andi r3, r1, 1
13
check_r3 1
14

  
15
test_name ANDI_3
16
load r1 0x000f0000
17
andi r3, r1, 1
18
check_r3 0
19

  
20
test_name ANDI_4
21
load r1 0xffffffff
22
andi r3, r1, 0xffff
23
check_r3 0xffff
24

  
25
test_name ANDI_5
26
load r1 0xffffffff
27
andi r3, r1, 0
28
check_r3 0
29

  
30
test_name ANDI_6
31
load r3 0xffff55aa
32
andi r3, r3, 0xaaaa
33
check_r3 0x000000aa
34

  
35
end
b/tests/lm32/test_b.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name B_1
6
load r1 jump
7
b r1
8
tc_fail
9
end
10

  
11
jump:
12
tc_pass
13
end
b/tests/lm32/test_be.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name BE_1
6
mvi r1, 0
7
mvi r2, 0
8
be r1, r2, 1f
9
tc_fail
10
bi 2f
11
1:
12
tc_pass
13
2:
14

  
15
test_name BE_2
16
mvi r1, 1
17
mvi r2, 0
18
be r1, r2, 1f
19
tc_pass
20
bi 2f
21
1:
22
tc_fail
23
2:
24

  
25
test_name BE_3
26
mvi r1, 0
27
mvi r2, 1
28
be r1, r2, 1f
29
tc_pass
30
bi 2f
31
1:
32
tc_fail
33
2:
34

  
35
bi 2f
36
1:
37
tc_pass
38
bi 3f
39
2:
40
test_name BE_4
41
mvi r1, 1
42
mvi r2, 1
43
be r1, r2, 1b
44
tc_fail
45
3:
46

  
47
end
48

  
b/tests/lm32/test_bg.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name BG_1
6
mvi r1, 0
7
mvi r2, 0
8
bg r1, r2, 1f
9
tc_pass
10
bi 2f
11
1:
12
tc_fail
13
2:
14

  
15
test_name BG_2
16
mvi r1, 1
17
mvi r2, 0
18
bg r1, r2, 1f
19
tc_fail
20
bi 2f
21
1:
22
tc_pass
23
2:
24

  
25
test_name BG_3
26
mvi r1, 0
27
mvi r2, 1
28
bg r1, r2, 1f
29
tc_pass
30
bi 2f
31
1:
32
tc_fail
33
2:
34

  
35
test_name BG_4
36
mvi r1, 0
37
mvi r2, -1
38
bg r1, r2, 1f
39
tc_fail
40
bi 2f
41
1:
42
tc_pass
43
2:
44

  
45
test_name BG_5
46
mvi r1, -1
47
mvi r2, 0
48
bg r1, r2, 1f
49
tc_pass
50
bi 2f
51
1:
52
tc_fail
53
2:
54

  
55
test_name BG_6
56
mvi r1, -1
57
mvi r2, -1
58
bg r1, r2, 1f
59
tc_pass
60
bi 2f
61
1:
62
tc_fail
63
2:
64

  
65
bi 2f
66
1:
67
tc_pass
68
bi 3f
69
2:
70
test_name BG_7
71
mvi r1, 1
72
mvi r2, 0
73
bg r1, r2, 1b
74
tc_fail
75
3:
76

  
77
end
78

  
b/tests/lm32/test_bge.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name BGE_1
6
mvi r1, 0
7
mvi r2, 0
8
bge r1, r2, 1f
9
tc_fail
10
bi 2f
11
1:
12
tc_pass
13
2:
14

  
15
test_name BGE_2
16
mvi r1, 1
17
mvi r2, 0
18
bge r1, r2, 1f
19
tc_fail
20
bi 2f
21
1:
22
tc_pass
23
2:
24

  
25
test_name BGE_3
26
mvi r1, 0
27
mvi r2, 1
28
bge r1, r2, 1f
29
tc_pass
30
bi 2f
31
1:
32
tc_fail
33
2:
34

  
35
test_name BGE_4
36
mvi r1, 0
37
mvi r2, -1
38
bge r1, r2, 1f
39
tc_fail
40
bi 2f
41
1:
42
tc_pass
43
2:
44

  
45
test_name BGE_5
46
mvi r1, -1
47
mvi r2, 0
48
bge r1, r2, 1f
49
tc_pass
50
bi 2f
51
1:
52
tc_fail
53
2:
54

  
55
test_name BGE_6
56
mvi r1, -1
57
mvi r2, -1
58
bge r1, r2, 1f
59
tc_fail
60
bi 2f
61
1:
62
tc_pass
63
2:
64

  
65
bi 2f
66
1:
67
tc_pass
68
bi 3f
69
2:
70
test_name BGE_7
71
mvi r1, 1
72
mvi r2, 0
73
bge r1, r2, 1b
74
tc_fail
75
3:
76

  
77
end
78

  
b/tests/lm32/test_bgeu.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name BGEU_1
6
mvi r1, 0
7
mvi r2, 0
8
bgeu r1, r2, 1f
9
tc_fail
10
bi 2f
11
1:
12
tc_pass
13
2:
14

  
15
test_name BGEU_2
16
mvi r1, 1
17
mvi r2, 0
18
bgeu r1, r2, 1f
19
tc_fail
20
bi 2f
21
1:
22
tc_pass
23
2:
24

  
25
test_name BGEU_3
26
mvi r1, 0
27
mvi r2, 1
28
bgeu r1, r2, 1f
29
tc_pass
30
bi 2f
31
1:
32
tc_fail
33
2:
34

  
35
test_name BGEU_4
36
mvi r1, 0
37
mvi r2, -1
38
bgeu r1, r2, 1f
39
tc_pass
40
bi 2f
41
1:
42
tc_fail
43
2:
44

  
45
test_name BGEU_5
46
mvi r1, -1
47
mvi r2, 0
48
bgeu r1, r2, 1f
49
tc_fail
50
bi 2f
51
1:
52
tc_pass
53
2:
54

  
55
test_name BGEU_6
56
mvi r1, -1
57
mvi r2, -1
58
bgeu r1, r2, 1f
59
tc_fail
60
bi 2f
61
1:
62
tc_pass
63
2:
64

  
65
bi 2f
66
1:
67
tc_pass
68
bi 3f
69
2:
70
test_name BGEU_7
71
mvi r1, 1
72
mvi r2, 0
73
bgeu r1, r2, 1b
74
tc_fail
75
3:
76

  
77
end
78

  
b/tests/lm32/test_bgu.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name BGU_1
6
mvi r1, 0
7
mvi r2, 0
8
bgu r1, r2, 1f
9
tc_pass
10
bi 2f
11
1:
12
tc_fail
13
2:
14

  
15
test_name BGU_2
16
mvi r1, 1
17
mvi r2, 0
18
bgu r1, r2, 1f
19
tc_fail
20
bi 2f
21
1:
22
tc_pass
23
2:
24

  
25
test_name BGU_3
26
mvi r1, 0
27
mvi r2, 1
28
bgu r1, r2, 1f
29
tc_pass
30
bi 2f
31
1:
32
tc_fail
33
2:
34

  
35
test_name BGU_4
36
mvi r1, 0
37
mvi r2, -1
38
bgu r1, r2, 1f
39
tc_pass
40
bi 2f
41
1:
42
tc_fail
43
2:
44

  
45
test_name BGU_5
46
mvi r1, -1
47
mvi r2, 0
48
bgu r1, r2, 1f
49
tc_fail
50
bi 2f
51
1:
52
tc_pass
53
2:
54

  
55
test_name BGU_6
56
mvi r1, -1
57
mvi r2, -1
58
bgu r1, r2, 1f
59
tc_pass
60
bi 2f
61
1:
62
tc_fail
63
2:
64

  
65
bi 2f
66
1:
67
tc_pass
68
bi 3f
69
2:
70
test_name BGU_7
71
mvi r1, 1
72
mvi r2, 0
73
bgu r1, r2, 1b
74
tc_fail
75
3:
76

  
77
end
78

  
b/tests/lm32/test_bi.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name BI_1
6
bi jump
7
tc_fail
8
end
9

  
10
jump_back:
11
tc_pass
12
end
13

  
14
jump:
15
tc_pass
16

  
17
test_name BI_2
18
bi jump_back
19
tc_fail
20

  
21
end
22

  
23

  
b/tests/lm32/test_bne.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name BNE_1
6
mvi r1, 0
7
mvi r2, 0
8
bne r1, r2, 1f
9
tc_pass
10
bi 2f
11
1:
12
tc_fail
13
2:
14

  
15
test_name BNE_2
16
mvi r1, 1
17
mvi r2, 0
18
bne r1, r2, 1f
19
tc_fail
20
bi 2f
21
1:
22
tc_pass
23
2:
24

  
25
test_name BNE_3
26
mvi r1, 0
27
mvi r2, 1
28
bne r1, r2, 1f
29
tc_fail
30
bi 2f
31
1:
32
tc_pass
33
2:
34

  
35
bi 2f
36
1:
37
tc_fail
38
bi 3f
39
2:
40
test_name BNE_4
41
mvi r1, 1
42
mvi r2, 1
43
bne r1, r2, 1b
44
tc_pass
45
3:
46

  
47
end
48

  
b/tests/lm32/test_break.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name BREAK_1
6
mvi r1, 1
7
wcsr IE, r1
8
insn:
9
break
10
check_excp 1
11

  
12
test_name BREAK_2
13
mv r3, ba
14
check_r3 insn
15

  
16
test_name BREAK_3
17
rcsr r3, IE
18
check_r3 4
19

  
20
end
b/tests/lm32/test_bret.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name BRET_1
6
mvi r1, 4
7
wcsr IE, r1
8
load ba mark
9
bret
10
tc_fail
11
bi 1f
12

  
13
mark:
14
tc_pass
15

  
16
1:
17
test_name BRET_2
18
rcsr r3, IE
19
check_r3 5
20

  
21
test_name BRET_3
22
mvi r1, 0
23
wcsr IE, r1
24
load ba mark2
25
bret
26
tc_fail
27
bi 1f
28

  
29
mark2:
30
tc_pass
31

  
32
1:
33
test_name BRET_4
34
rcsr r3, IE
35
check_r3 0
36

  
37
end
38

  
b/tests/lm32/test_call.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name CALL_1
6
load r1 mark
7
call r1
8
return:
9

  
10
tc_fail
11
end
12

  
13
mark:
14
mv r3, ra
15
check_r3 return
16
end
b/tests/lm32/test_calli.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name CALLI_1
6
calli mark
7
return:
8

  
9
tc_fail
10
end
11

  
12
mark:
13
mv r3, ra
14
check_r3 return
15
end
b/tests/lm32/test_cmpe.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name CMPE_1
6
mvi r1, 0
7
mvi r2, 0
8
cmpe r3, r1, r2
9
check_r3 1
10

  
11
test_name CMPE_2
12
mvi r1, 0
13
mvi r2, 1
14
cmpe r3, r1, r2
15
check_r3 0
16

  
17
test_name CMPE_3
18
mvi r1, 1
19
mvi r2, 0
20
cmpe r3, r1, r2
21
check_r3 0
22

  
23
test_name CMPE_4
24
mvi r3, 0
25
mvi r2, 1
26
cmpe r3, r3, r2
27
check_r3 0
28

  
29
test_name CMPE_5
30
mvi r3, 0
31
mvi r2, 0
32
cmpe r3, r3, r2
33
check_r3 1
34

  
35
test_name CMPE_6
36
mvi r3, 0
37
cmpe r3, r3, r3
38
check_r3 1
39

  
40
end
b/tests/lm32/test_cmpei.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name CMPEI_1
6
mvi r1, 0
7
cmpei r3, r1, 0
8
check_r3 1
9

  
10
test_name CMPEI_2
11
mvi r1, 0
12
cmpei r3, r1, 1
13
check_r3 0
14

  
15
test_name CMPEI_3
16
mvi r1, 1
17
cmpei r3, r1, 0
18
check_r3 0
19

  
20
test_name CMPEI_4
21
load r1 0xffffffff
22
cmpei r3, r1, -1
23
check_r3 1
24

  
25
test_name CMPEI_5
26
mvi r3, 0
27
cmpei r3, r3, 0
28
check_r3 1
29

  
30
test_name CMPEI_6
31
mvi r3, 0
32
cmpei r3, r3, 1
33
check_r3 0
34

  
35
end
b/tests/lm32/test_cmpg.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name CMPG_1
6
mvi r1, 0
7
mvi r2, 0
8
cmpg r3, r1, r2
9
check_r3 0
10

  
11
test_name CMPG_2
12
mvi r1, 0
13
mvi r2, 1
14
cmpg r3, r1, r2
15
check_r3 0
16

  
17
test_name CMPG_3
18
mvi r1, 1
19
mvi r2, 0
20
cmpg r3, r1, r2
21
check_r3 1
22

  
23
test_name CMPG_4
24
mvi r1, 1
25
mvi r2, 1
26
cmpg r3, r1, r2
27
check_r3 0
28

  
29
test_name CMPG_5
30
mvi r1, 0
31
mvi r2, -1
32
cmpg r3, r1, r2
33
check_r3 1
34

  
35
test_name CMPG_6
36
mvi r1, -1
37
mvi r2, 0
38
cmpg r3, r1, r2
39
check_r3 0
40

  
41
test_name CMPG_7
42
mvi r1, -1
43
mvi r2, -1
44
cmpg r3, r1, r2
45
check_r3 0
46

  
47
test_name CMPG_8
48
mvi r3, 0
49
mvi r2, 1
50
cmpg r3, r3, r2
51
check_r3 0
52

  
53
test_name CMPG_9
54
mvi r3, 1
55
mvi r2, 0
56
cmpg r3, r3, r2
57
check_r3 1
58

  
59
test_name CMPG_10
60
mvi r3, 0
61
cmpg r3, r3, r3
62
check_r3 0
63

  
64
end
b/tests/lm32/test_cmpge.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name CMPGE_1
6
mvi r1, 0
7
mvi r2, 0
8
cmpge r3, r1, r2
9
check_r3 1
10

  
11
test_name CMPGE_2
12
mvi r1, 0
13
mvi r2, 1
14
cmpge r3, r1, r2
15
check_r3 0
16

  
17
test_name CMPGE_3
18
mvi r1, 1
19
mvi r2, 0
20
cmpge r3, r1, r2
21
check_r3 1
22

  
23
test_name CMPGE_4
24
mvi r1, 1
25
mvi r2, 1
26
cmpge r3, r1, r2
27
check_r3 1
28

  
29
test_name CMPGE_5
30
mvi r1, 0
31
mvi r2, -1
32
cmpge r3, r1, r2
33
check_r3 1
34

  
35
test_name CMPGE_6
36
mvi r1, -1
37
mvi r2, 0
38
cmpge r3, r1, r2
39
check_r3 0
40

  
41
test_name CMPGE_7
42
mvi r1, -1
43
mvi r2, -1
44
cmpge r3, r1, r2
45
check_r3 1
46

  
47
test_name CMPGE_8
48
mvi r3, 0
49
mvi r2, 1
50
cmpge r3, r3, r2
51
check_r3 0
52

  
53
test_name CMPGE_9
54
mvi r3, 1
55
mvi r2, 0
56
cmpge r3, r3, r2
57
check_r3 1
58

  
59
test_name CMPGE_10
60
mvi r3, 0
61
cmpge r3, r3, r3
62
check_r3 1
63

  
64
end
b/tests/lm32/test_cmpgei.S
1
.include "macros.inc"
2

  
3
start
4

  
5
test_name CMPGEI_1
6
mvi r1, 0
7
cmpgei r3, r1, 0
8
check_r3 1
9

  
10
test_name CMPGEI_2
11
mvi r1, 0
12
cmpgei r3, r1, 1
13
check_r3 0
14

  
15
test_name CMPGEI_3
16
mvi r1, 1
... This diff was truncated because it exceeds the maximum size that can be displayed.

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