Revision d785e6be

b/dyngen-exec.h
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#endif
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#ifdef __x86_64__
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#define EXIT_TB() asm volatile ("ret")
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#define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n)
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#endif
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#ifdef __powerpc__
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#define EXIT_TB() asm volatile ("blr")
b/target-i386/exec.h
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#include "dyngen-exec.h"
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/* XXX: factorize this mess */
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#if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__)
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#define HOST_LONG_BITS 64
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#else
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#define HOST_LONG_BITS 32
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#endif
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#ifdef TARGET_X86_64
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#define TARGET_LONG_BITS 64
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#else
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#define TARGET_LONG_BITS 32
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#endif
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#include "cpu-defs.h"
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/* at least 4 register variables are defined */
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register struct CPUX86State *env asm(AREG0);
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/* XXX: use 64 bit regs if HOST_LONG_BITS == 64 */
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#if TARGET_LONG_BITS == 32
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#if TARGET_LONG_BITS > HOST_LONG_BITS
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/* no registers can be used */
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#define T0 (env->t0)
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#define T1 (env->t1)
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#define T2 (env->t2)
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register uint32_t T0 asm(AREG1);
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register uint32_t T1 asm(AREG2);
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register uint32_t T2 asm(AREG3);
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#else
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/* XXX: use unsigned long instead of target_ulong - better code will
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   be generated for 64 bit CPUs */
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register target_ulong T0 asm(AREG1);
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register target_ulong T1 asm(AREG2);
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register target_ulong T2 asm(AREG3);
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/* if more registers are available, we define some registers too */
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#ifdef AREG4
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register uint32_t EAX asm(AREG4);
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register target_ulong EAX asm(AREG4);
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#define reg_EAX
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#endif
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#ifdef AREG5
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register uint32_t ESP asm(AREG5);
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register target_ulong ESP asm(AREG5);
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#define reg_ESP
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#endif
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#ifdef AREG6
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register uint32_t EBP asm(AREG6);
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register target_ulong EBP asm(AREG6);
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#define reg_EBP
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#endif
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#ifdef AREG7
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register uint32_t ECX asm(AREG7);
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register target_ulong ECX asm(AREG7);
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#define reg_ECX
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#endif
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#ifdef AREG8
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register uint32_t EDX asm(AREG8);
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register target_ulong EDX asm(AREG8);
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#define reg_EDX
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#endif
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#ifdef AREG9
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register uint32_t EBX asm(AREG9);
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register target_ulong EBX asm(AREG9);
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#define reg_EBX
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#endif
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#ifdef AREG10
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register uint32_t ESI asm(AREG10);
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register target_ulong ESI asm(AREG10);
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#define reg_ESI
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#endif
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#ifdef AREG11
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register uint32_t EDI asm(AREG11);
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register target_ulong EDI asm(AREG11);
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#define reg_EDI
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#endif
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#else
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/* no registers can be used */
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#define T0 (env->t0)
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#define T1 (env->t1)
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#define T2 (env->t2)
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#endif
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#endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
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#define A0 T2
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b/target-sparc/translate.c
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}
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#if defined(CONFIG_USER_ONLY)
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target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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{
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    return addr;
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}
......
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                                 int *access_index, target_ulong address, int rw,
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                                 int is_user);
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target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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{
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    target_phys_addr_t phys_addr;
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    int prot, access_index;

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