Statistics
| Branch: | Revision:

root / target-i386 / exec.h @ d785e6be

History | View | Annotate | Download (15.1 kB)

1
/*
2
 *  i386 execution defines 
3
 *
4
 *  Copyright (c) 2003 Fabrice Bellard
5
 *
6
 * This library is free software; you can redistribute it and/or
7
 * modify it under the terms of the GNU Lesser General Public
8
 * License as published by the Free Software Foundation; either
9
 * version 2 of the License, or (at your option) any later version.
10
 *
11
 * This library is distributed in the hope that it will be useful,
12
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14
 * Lesser General Public License for more details.
15
 *
16
 * You should have received a copy of the GNU Lesser General Public
17
 * License along with this library; if not, write to the Free Software
18
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19
 */
20
#include "config.h"
21
#include "dyngen-exec.h"
22

    
23
/* XXX: factorize this mess */
24
#ifdef TARGET_X86_64
25
#define TARGET_LONG_BITS 64
26
#else
27
#define TARGET_LONG_BITS 32
28
#endif
29

    
30
#include "cpu-defs.h"
31

    
32
/* at least 4 register variables are defined */
33
register struct CPUX86State *env asm(AREG0);
34

    
35
#if TARGET_LONG_BITS > HOST_LONG_BITS
36

    
37
/* no registers can be used */
38
#define T0 (env->t0)
39
#define T1 (env->t1)
40
#define T2 (env->t2)
41

    
42
#else
43

    
44
/* XXX: use unsigned long instead of target_ulong - better code will
45
   be generated for 64 bit CPUs */
46
register target_ulong T0 asm(AREG1);
47
register target_ulong T1 asm(AREG2);
48
register target_ulong T2 asm(AREG3);
49

    
50
/* if more registers are available, we define some registers too */
51
#ifdef AREG4
52
register target_ulong EAX asm(AREG4);
53
#define reg_EAX
54
#endif
55

    
56
#ifdef AREG5
57
register target_ulong ESP asm(AREG5);
58
#define reg_ESP
59
#endif
60

    
61
#ifdef AREG6
62
register target_ulong EBP asm(AREG6);
63
#define reg_EBP
64
#endif
65

    
66
#ifdef AREG7
67
register target_ulong ECX asm(AREG7);
68
#define reg_ECX
69
#endif
70

    
71
#ifdef AREG8
72
register target_ulong EDX asm(AREG8);
73
#define reg_EDX
74
#endif
75

    
76
#ifdef AREG9
77
register target_ulong EBX asm(AREG9);
78
#define reg_EBX
79
#endif
80

    
81
#ifdef AREG10
82
register target_ulong ESI asm(AREG10);
83
#define reg_ESI
84
#endif
85

    
86
#ifdef AREG11
87
register target_ulong EDI asm(AREG11);
88
#define reg_EDI
89
#endif
90

    
91
#endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
92

    
93
#define A0 T2
94

    
95
extern FILE *logfile;
96
extern int loglevel;
97

    
98
#ifndef reg_EAX
99
#define EAX (env->regs[R_EAX])
100
#endif
101
#ifndef reg_ECX
102
#define ECX (env->regs[R_ECX])
103
#endif
104
#ifndef reg_EDX
105
#define EDX (env->regs[R_EDX])
106
#endif
107
#ifndef reg_EBX
108
#define EBX (env->regs[R_EBX])
109
#endif
110
#ifndef reg_ESP
111
#define ESP (env->regs[R_ESP])
112
#endif
113
#ifndef reg_EBP
114
#define EBP (env->regs[R_EBP])
115
#endif
116
#ifndef reg_ESI
117
#define ESI (env->regs[R_ESI])
118
#endif
119
#ifndef reg_EDI
120
#define EDI (env->regs[R_EDI])
121
#endif
122
#define EIP  (env->eip)
123
#define DF  (env->df)
124

    
125
#define CC_SRC (env->cc_src)
126
#define CC_DST (env->cc_dst)
127
#define CC_OP  (env->cc_op)
128

    
129
/* float macros */
130
#define FT0    (env->ft0)
131
#define ST0    (env->fpregs[env->fpstt].d)
132
#define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
133
#define ST1    ST(1)
134

    
135
#ifdef USE_FP_CONVERT
136
#define FP_CONVERT  (env->fp_convert)
137
#endif
138

    
139
#include "cpu.h"
140
#include "exec-all.h"
141

    
142
/* XXX: add a generic FPU library */
143

    
144
static inline double float32_to_float64(float a)
145
{
146
    return a;
147
}
148

    
149
static inline float float64_to_float32(double a)
150
{
151
    return a;
152
}
153

    
154
#if defined(__powerpc__)
155
/* better to call an helper on ppc */
156
float int32_to_float32(int32_t a);
157
double int32_to_float64(int32_t a);
158
#else
159
static inline float int32_to_float32(int32_t a)
160
{
161
    return (float)a;
162
}
163

    
164
static inline double int32_to_float64(int32_t a)
165
{
166
    return (double)a;
167
}
168
#endif
169

    
170
static inline float int64_to_float32(int64_t a)
171
{
172
    return (float)a;
173
}
174

    
175
static inline double int64_to_float64(int64_t a)
176
{
177
    return (double)a;
178
}
179

    
180
typedef struct CCTable {
181
    int (*compute_all)(void); /* return all the flags */
182
    int (*compute_c)(void);  /* return the C flag */
183
} CCTable;
184

    
185
extern CCTable cc_table[];
186

    
187
void load_seg(int seg_reg, int selector);
188
void helper_ljmp_protected_T0_T1(int next_eip);
189
void helper_lcall_real_T0_T1(int shift, int next_eip);
190
void helper_lcall_protected_T0_T1(int shift, int next_eip);
191
void helper_iret_real(int shift);
192
void helper_iret_protected(int shift, int next_eip);
193
void helper_lret_protected(int shift, int addend);
194
void helper_lldt_T0(void);
195
void helper_ltr_T0(void);
196
void helper_movl_crN_T0(int reg);
197
void helper_movl_drN_T0(int reg);
198
void helper_invlpg(unsigned int addr);
199
void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
200
void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
201
void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
202
void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
203
int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, 
204
                             int is_write, int is_user, int is_softmmu);
205
void tlb_fill(target_ulong addr, int is_write, int is_user, 
206
              void *retaddr);
207
void __hidden cpu_lock(void);
208
void __hidden cpu_unlock(void);
209
void do_interrupt(int intno, int is_int, int error_code, 
210
                  target_ulong next_eip, int is_hw);
211
void do_interrupt_user(int intno, int is_int, int error_code, 
212
                       target_ulong next_eip);
213
void raise_interrupt(int intno, int is_int, int error_code, 
214
                     int next_eip_addend);
215
void raise_exception_err(int exception_index, int error_code);
216
void raise_exception(int exception_index);
217
void __hidden cpu_loop_exit(void);
218

    
219
void OPPROTO op_movl_eflags_T0(void);
220
void OPPROTO op_movl_T0_eflags(void);
221
void helper_divl_EAX_T0(void);
222
void helper_idivl_EAX_T0(void);
223
void helper_mulq_EAX_T0(void);
224
void helper_imulq_EAX_T0(void);
225
void helper_imulq_T0_T1(void);
226
void helper_divq_EAX_T0(void);
227
void helper_idivq_EAX_T0(void);
228
void helper_cmpxchg8b(void);
229
void helper_cpuid(void);
230
void helper_enter_level(int level, int data32);
231
void helper_sysenter(void);
232
void helper_sysexit(void);
233
void helper_syscall(int next_eip_addend);
234
void helper_sysret(int dflag);
235
void helper_rdtsc(void);
236
void helper_rdmsr(void);
237
void helper_wrmsr(void);
238
void helper_lsl(void);
239
void helper_lar(void);
240
void helper_verr(void);
241
void helper_verw(void);
242

    
243
void check_iob_T0(void);
244
void check_iow_T0(void);
245
void check_iol_T0(void);
246
void check_iob_DX(void);
247
void check_iow_DX(void);
248
void check_iol_DX(void);
249

    
250
/* XXX: move that to a generic header */
251
#if !defined(CONFIG_USER_ONLY)
252

    
253
#define ldul_user ldl_user
254
#define ldul_kernel ldl_kernel
255

    
256
#define ACCESS_TYPE 0
257
#define MEMSUFFIX _kernel
258
#define DATA_SIZE 1
259
#include "softmmu_header.h"
260

    
261
#define DATA_SIZE 2
262
#include "softmmu_header.h"
263

    
264
#define DATA_SIZE 4
265
#include "softmmu_header.h"
266

    
267
#define DATA_SIZE 8
268
#include "softmmu_header.h"
269
#undef ACCESS_TYPE
270
#undef MEMSUFFIX
271

    
272
#define ACCESS_TYPE 1
273
#define MEMSUFFIX _user
274
#define DATA_SIZE 1
275
#include "softmmu_header.h"
276

    
277
#define DATA_SIZE 2
278
#include "softmmu_header.h"
279

    
280
#define DATA_SIZE 4
281
#include "softmmu_header.h"
282

    
283
#define DATA_SIZE 8
284
#include "softmmu_header.h"
285
#undef ACCESS_TYPE
286
#undef MEMSUFFIX
287

    
288
/* these access are slower, they must be as rare as possible */
289
#define ACCESS_TYPE 2
290
#define MEMSUFFIX _data
291
#define DATA_SIZE 1
292
#include "softmmu_header.h"
293

    
294
#define DATA_SIZE 2
295
#include "softmmu_header.h"
296

    
297
#define DATA_SIZE 4
298
#include "softmmu_header.h"
299

    
300
#define DATA_SIZE 8
301
#include "softmmu_header.h"
302
#undef ACCESS_TYPE
303
#undef MEMSUFFIX
304

    
305
#define ldub(p) ldub_data(p)
306
#define ldsb(p) ldsb_data(p)
307
#define lduw(p) lduw_data(p)
308
#define ldsw(p) ldsw_data(p)
309
#define ldl(p) ldl_data(p)
310
#define ldq(p) ldq_data(p)
311

    
312
#define stb(p, v) stb_data(p, v)
313
#define stw(p, v) stw_data(p, v)
314
#define stl(p, v) stl_data(p, v)
315
#define stq(p, v) stq_data(p, v)
316

    
317
static inline double ldfq(target_ulong ptr)
318
{
319
    union {
320
        double d;
321
        uint64_t i;
322
    } u;
323
    u.i = ldq(ptr);
324
    return u.d;
325
}
326

    
327
static inline void stfq(target_ulong ptr, double v)
328
{
329
    union {
330
        double d;
331
        uint64_t i;
332
    } u;
333
    u.d = v;
334
    stq(ptr, u.i);
335
}
336

    
337
static inline float ldfl(target_ulong ptr)
338
{
339
    union {
340
        float f;
341
        uint32_t i;
342
    } u;
343
    u.i = ldl(ptr);
344
    return u.f;
345
}
346

    
347
static inline void stfl(target_ulong ptr, float v)
348
{
349
    union {
350
        float f;
351
        uint32_t i;
352
    } u;
353
    u.f = v;
354
    stl(ptr, u.i);
355
}
356

    
357
#endif /* !defined(CONFIG_USER_ONLY) */
358

    
359
#ifdef USE_X86LDOUBLE
360
/* use long double functions */
361
#define lrint lrintl
362
#define llrint llrintl
363
#define fabs fabsl
364
#define sin sinl
365
#define cos cosl
366
#define sqrt sqrtl
367
#define pow powl
368
#define log logl
369
#define tan tanl
370
#define atan2 atan2l
371
#define floor floorl
372
#define ceil ceill
373
#define rint rintl
374
#endif
375

    
376
#if !defined(_BSD)
377
extern int lrint(CPU86_LDouble x);
378
extern int64_t llrint(CPU86_LDouble x);
379
#else
380
#define lrint(d)                ((int)rint(d))
381
#define llrint(d)                ((int)rint(d))
382
#endif
383
extern CPU86_LDouble fabs(CPU86_LDouble x);
384
extern CPU86_LDouble sin(CPU86_LDouble x);
385
extern CPU86_LDouble cos(CPU86_LDouble x);
386
extern CPU86_LDouble sqrt(CPU86_LDouble x);
387
extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
388
extern CPU86_LDouble log(CPU86_LDouble x);
389
extern CPU86_LDouble tan(CPU86_LDouble x);
390
extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
391
extern CPU86_LDouble floor(CPU86_LDouble x);
392
extern CPU86_LDouble ceil(CPU86_LDouble x);
393
extern CPU86_LDouble rint(CPU86_LDouble x);
394

    
395
#define RC_MASK         0xc00
396
#define RC_NEAR                0x000
397
#define RC_DOWN                0x400
398
#define RC_UP                0x800
399
#define RC_CHOP                0xc00
400

    
401
#define MAXTAN 9223372036854775808.0
402

    
403
#ifdef __arm__
404
/* we have no way to do correct rounding - a FPU emulator is needed */
405
#define FE_DOWNWARD   FE_TONEAREST
406
#define FE_UPWARD     FE_TONEAREST
407
#define FE_TOWARDZERO FE_TONEAREST
408
#endif
409

    
410
#ifdef USE_X86LDOUBLE
411

    
412
/* only for x86 */
413
typedef union {
414
    long double d;
415
    struct {
416
        unsigned long long lower;
417
        unsigned short upper;
418
    } l;
419
} CPU86_LDoubleU;
420

    
421
/* the following deal with x86 long double-precision numbers */
422
#define MAXEXPD 0x7fff
423
#define EXPBIAS 16383
424
#define EXPD(fp)        (fp.l.upper & 0x7fff)
425
#define SIGND(fp)        ((fp.l.upper) & 0x8000)
426
#define MANTD(fp)       (fp.l.lower)
427
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
428

    
429
#else
430

    
431
/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
432
typedef union {
433
    double d;
434
#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
435
    struct {
436
        uint32_t lower;
437
        int32_t upper;
438
    } l;
439
#else
440
    struct {
441
        int32_t upper;
442
        uint32_t lower;
443
    } l;
444
#endif
445
#ifndef __arm__
446
    int64_t ll;
447
#endif
448
} CPU86_LDoubleU;
449

    
450
/* the following deal with IEEE double-precision numbers */
451
#define MAXEXPD 0x7ff
452
#define EXPBIAS 1023
453
#define EXPD(fp)        (((fp.l.upper) >> 20) & 0x7FF)
454
#define SIGND(fp)        ((fp.l.upper) & 0x80000000)
455
#ifdef __arm__
456
#define MANTD(fp)        (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
457
#else
458
#define MANTD(fp)        (fp.ll & ((1LL << 52) - 1))
459
#endif
460
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
461
#endif
462

    
463
static inline void fpush(void)
464
{
465
    env->fpstt = (env->fpstt - 1) & 7;
466
    env->fptags[env->fpstt] = 0; /* validate stack entry */
467
}
468

    
469
static inline void fpop(void)
470
{
471
    env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
472
    env->fpstt = (env->fpstt + 1) & 7;
473
}
474

    
475
#ifndef USE_X86LDOUBLE
476
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
477
{
478
    CPU86_LDoubleU temp;
479
    int upper, e;
480
    uint64_t ll;
481

    
482
    /* mantissa */
483
    upper = lduw(ptr + 8);
484
    /* XXX: handle overflow ? */
485
    e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
486
    e |= (upper >> 4) & 0x800; /* sign */
487
    ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
488
#ifdef __arm__
489
    temp.l.upper = (e << 20) | (ll >> 32);
490
    temp.l.lower = ll;
491
#else
492
    temp.ll = ll | ((uint64_t)e << 52);
493
#endif
494
    return temp.d;
495
}
496

    
497
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
498
{
499
    CPU86_LDoubleU temp;
500
    int e;
501

    
502
    temp.d = f;
503
    /* mantissa */
504
    stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
505
    /* exponent + sign */
506
    e = EXPD(temp) - EXPBIAS + 16383;
507
    e |= SIGND(temp) >> 16;
508
    stw(ptr + 8, e);
509
}
510
#else
511

    
512
/* XXX: same endianness assumed */
513

    
514
#ifdef CONFIG_USER_ONLY
515

    
516
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
517
{
518
    return *(CPU86_LDouble *)ptr;
519
}
520

    
521
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
522
{
523
    *(CPU86_LDouble *)ptr = f;
524
}
525

    
526
#else
527

    
528
/* we use memory access macros */
529

    
530
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
531
{
532
    CPU86_LDoubleU temp;
533

    
534
    temp.l.lower = ldq(ptr);
535
    temp.l.upper = lduw(ptr + 8);
536
    return temp.d;
537
}
538

    
539
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
540
{
541
    CPU86_LDoubleU temp;
542
    
543
    temp.d = f;
544
    stq(ptr, temp.l.lower);
545
    stw(ptr + 8, temp.l.upper);
546
}
547

    
548
#endif /* !CONFIG_USER_ONLY */
549

    
550
#endif /* USE_X86LDOUBLE */
551

    
552
#define FPUS_IE (1 << 0)
553
#define FPUS_DE (1 << 1)
554
#define FPUS_ZE (1 << 2)
555
#define FPUS_OE (1 << 3)
556
#define FPUS_UE (1 << 4)
557
#define FPUS_PE (1 << 5)
558
#define FPUS_SF (1 << 6)
559
#define FPUS_SE (1 << 7)
560
#define FPUS_B  (1 << 15)
561

    
562
#define FPUC_EM 0x3f
563

    
564
extern const CPU86_LDouble f15rk[7];
565

    
566
void helper_fldt_ST0_A0(void);
567
void helper_fstt_ST0_A0(void);
568
void fpu_raise_exception(void);
569
CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
570
void helper_fbld_ST0_A0(void);
571
void helper_fbst_ST0_A0(void);
572
void helper_f2xm1(void);
573
void helper_fyl2x(void);
574
void helper_fptan(void);
575
void helper_fpatan(void);
576
void helper_fxtract(void);
577
void helper_fprem1(void);
578
void helper_fprem(void);
579
void helper_fyl2xp1(void);
580
void helper_fsqrt(void);
581
void helper_fsincos(void);
582
void helper_frndint(void);
583
void helper_fscale(void);
584
void helper_fsin(void);
585
void helper_fcos(void);
586
void helper_fxam_ST0(void);
587
void helper_fstenv(target_ulong ptr, int data32);
588
void helper_fldenv(target_ulong ptr, int data32);
589
void helper_fsave(target_ulong ptr, int data32);
590
void helper_frstor(target_ulong ptr, int data32);
591
void helper_fxsave(target_ulong ptr, int data64);
592
void helper_fxrstor(target_ulong ptr, int data64);
593
void restore_native_fp_state(CPUState *env);
594
void save_native_fp_state(CPUState *env);
595
float approx_rsqrt(float a);
596
float approx_rcp(float a);
597
double helper_sqrt(double a);
598
int fpu_isnan(double a);
599

    
600
extern const uint8_t parity_table[256];
601
extern const uint8_t rclw_table[32];
602
extern const uint8_t rclb_table[32];
603

    
604
static inline uint32_t compute_eflags(void)
605
{
606
    return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
607
}
608

    
609
/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
610
static inline void load_eflags(int eflags, int update_mask)
611
{
612
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
613
    DF = 1 - (2 * ((eflags >> 10) & 1));
614
    env->eflags = (env->eflags & ~update_mask) | 
615
        (eflags & update_mask);
616
}
617

    
618
static inline void env_to_regs(void)
619
{
620
#ifdef reg_EAX
621
    EAX = env->regs[R_EAX];
622
#endif
623
#ifdef reg_ECX
624
    ECX = env->regs[R_ECX];
625
#endif
626
#ifdef reg_EDX
627
    EDX = env->regs[R_EDX];
628
#endif
629
#ifdef reg_EBX
630
    EBX = env->regs[R_EBX];
631
#endif
632
#ifdef reg_ESP
633
    ESP = env->regs[R_ESP];
634
#endif
635
#ifdef reg_EBP
636
    EBP = env->regs[R_EBP];
637
#endif
638
#ifdef reg_ESI
639
    ESI = env->regs[R_ESI];
640
#endif
641
#ifdef reg_EDI
642
    EDI = env->regs[R_EDI];
643
#endif
644
}
645

    
646
static inline void regs_to_env(void)
647
{
648
#ifdef reg_EAX
649
    env->regs[R_EAX] = EAX;
650
#endif
651
#ifdef reg_ECX
652
    env->regs[R_ECX] = ECX;
653
#endif
654
#ifdef reg_EDX
655
    env->regs[R_EDX] = EDX;
656
#endif
657
#ifdef reg_EBX
658
    env->regs[R_EBX] = EBX;
659
#endif
660
#ifdef reg_ESP
661
    env->regs[R_ESP] = ESP;
662
#endif
663
#ifdef reg_EBP
664
    env->regs[R_EBP] = EBP;
665
#endif
666
#ifdef reg_ESI
667
    env->regs[R_ESI] = ESI;
668
#endif
669
#ifdef reg_EDI
670
    env->regs[R_EDI] = EDI;
671
#endif
672
}