Revision d7d02e3c hw/i8259.c

b/hw/i8259.c
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    return intno;
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}
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static void pic_reset(void *opaque)
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{
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    PicState *s = opaque;
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    int tmp;
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    tmp = s->elcr_mask;
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    memset(s, 0, sizeof(PicState));
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    s->elcr_mask = tmp;
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}
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static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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{
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    PicState *s = opaque;
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    int priority, cmd, irq, tmp;
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    int priority, cmd, irq;
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#ifdef DEBUG_PIC
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    printf("pic_write: addr=0x%02x val=0x%02x\n", addr, val);
......
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    if (addr == 0) {
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        if (val & 0x10) {
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            /* init */
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            tmp = s->elcr_mask;
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            memset(s, 0, sizeof(PicState));
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            s->elcr_mask = tmp;
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            pic_reset(s);
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            /* deassert a pending interrupt */
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            cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
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......
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        register_ioport_read(elcr_addr, 1, 1, elcr_ioport_read, s);
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    }
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    register_savevm("i8259", io_addr, 1, pic_save, pic_load, s);
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    qemu_register_reset(pic_reset, s);
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}
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void pic_info(void)

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