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/*
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 * QEMU M48T59 NVRAM emulation for PPC PREP platform
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 * 
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 * Copyright (c) 2003-2004 Jocelyn Mayer
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 * 
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "vl.h"
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#include "m48t59.h"
26

    
27
//#define DEBUG_NVRAM
28

    
29
#if defined(DEBUG_NVRAM)
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#define NVRAM_PRINTF(fmt, args...) do { printf(fmt , ##args); } while (0)
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#else
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#define NVRAM_PRINTF(fmt, args...) do { } while (0)
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#endif
34

    
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struct m48t59_t {
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    /* Hardware parameters */
37
    int      IRQ;
38
    uint32_t io_base;
39
    uint16_t size;
40
    /* RTC management */
41
    time_t   time_offset;
42
    time_t   stop_time;
43
    /* Alarm & watchdog */
44
    time_t   alarm;
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    struct QEMUTimer *alrm_timer;
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    struct QEMUTimer *wd_timer;
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    /* NVRAM storage */
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    uint8_t  lock;
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    uint16_t addr;
50
    uint8_t *buffer;
51
};
52

    
53
/* Fake timer functions */
54
/* Generic helpers for BCD */
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static inline uint8_t toBCD (uint8_t value)
56
{
57
    return (((value / 10) % 10) << 4) | (value % 10);
58
}
59

    
60
static inline uint8_t fromBCD (uint8_t BCD)
61
{
62
    return ((BCD >> 4) * 10) + (BCD & 0x0F);
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}
64

    
65
/* RTC management helpers */
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static void get_time (m48t59_t *NVRAM, struct tm *tm)
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{
68
    time_t t;
69

    
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    t = time(NULL) + NVRAM->time_offset;
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#ifdef _WIN32
72
    memcpy(tm,localtime(&t),sizeof(*tm));
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#else
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    localtime_r (&t, tm) ;
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#endif
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}
77

    
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static void set_time (m48t59_t *NVRAM, struct tm *tm)
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{
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    time_t now, new_time;
81
    
82
    new_time = mktime(tm);
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    now = time(NULL);
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    NVRAM->time_offset = new_time - now;
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}
86

    
87
/* Alarm management */
88
static void alarm_cb (void *opaque)
89
{
90
    struct tm tm, tm_now;
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    uint64_t next_time;
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    m48t59_t *NVRAM = opaque;
93

    
94
    pic_set_irq(NVRAM->IRQ, 1);
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    if ((NVRAM->buffer[0x1FF5] & 0x80) == 0 && 
96
        (NVRAM->buffer[0x1FF4] & 0x80) == 0 &&
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        (NVRAM->buffer[0x1FF3] & 0x80) == 0 &&
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        (NVRAM->buffer[0x1FF2] & 0x80) == 0) {
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        /* Repeat once a month */
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        get_time(NVRAM, &tm_now);
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        memcpy(&tm, &tm_now, sizeof(struct tm));
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        tm.tm_mon++;
103
        if (tm.tm_mon == 13) {
104
            tm.tm_mon = 1;
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            tm.tm_year++;
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        }
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        next_time = mktime(&tm);
108
    } else if ((NVRAM->buffer[0x1FF5] & 0x80) != 0 &&
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               (NVRAM->buffer[0x1FF4] & 0x80) == 0 &&
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               (NVRAM->buffer[0x1FF3] & 0x80) == 0 &&
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               (NVRAM->buffer[0x1FF2] & 0x80) == 0) {
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        /* Repeat once a day */
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        next_time = 24 * 60 * 60 + mktime(&tm_now);
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    } else if ((NVRAM->buffer[0x1FF5] & 0x80) != 0 &&
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               (NVRAM->buffer[0x1FF4] & 0x80) != 0 &&
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               (NVRAM->buffer[0x1FF3] & 0x80) == 0 &&
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               (NVRAM->buffer[0x1FF2] & 0x80) == 0) {
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        /* Repeat once an hour */
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        next_time = 60 * 60 + mktime(&tm_now);
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    } else if ((NVRAM->buffer[0x1FF5] & 0x80) != 0 &&
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               (NVRAM->buffer[0x1FF4] & 0x80) != 0 &&
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               (NVRAM->buffer[0x1FF3] & 0x80) != 0 &&
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               (NVRAM->buffer[0x1FF2] & 0x80) == 0) {
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        /* Repeat once a minute */
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        next_time = 60 + mktime(&tm_now);
126
    } else {
127
        /* Repeat once a second */
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        next_time = 1 + mktime(&tm_now);
129
    }
130
    qemu_mod_timer(NVRAM->alrm_timer, next_time * 1000);
131
    pic_set_irq(NVRAM->IRQ, 0);
132
}
133

    
134

    
135
static void get_alarm (m48t59_t *NVRAM, struct tm *tm)
136
{
137
#ifdef _WIN32
138
    memcpy(tm,localtime(&NVRAM->alarm),sizeof(*tm));
139
#else
140
    localtime_r (&NVRAM->alarm, tm);
141
#endif
142
}
143

    
144
static void set_alarm (m48t59_t *NVRAM, struct tm *tm)
145
{
146
    NVRAM->alarm = mktime(tm);
147
    if (NVRAM->alrm_timer != NULL) {
148
        qemu_del_timer(NVRAM->alrm_timer);
149
        NVRAM->alrm_timer = NULL;
150
    }
151
    if (NVRAM->alarm - time(NULL) > 0)
152
        qemu_mod_timer(NVRAM->alrm_timer, NVRAM->alarm * 1000);
153
}
154

    
155
/* Watchdog management */
156
static void watchdog_cb (void *opaque)
157
{
158
    m48t59_t *NVRAM = opaque;
159

    
160
    NVRAM->buffer[0x1FF0] |= 0x80;
161
    if (NVRAM->buffer[0x1FF7] & 0x80) {
162
        NVRAM->buffer[0x1FF7] = 0x00;
163
        NVRAM->buffer[0x1FFC] &= ~0x40;
164
        /* May it be a hw CPU Reset instead ? */
165
        qemu_system_reset_request();
166
    } else {
167
        pic_set_irq(NVRAM->IRQ, 1);
168
        pic_set_irq(NVRAM->IRQ, 0);
169
    }
170
}
171

    
172
static void set_up_watchdog (m48t59_t *NVRAM, uint8_t value)
173
{
174
    uint64_t interval; /* in 1/16 seconds */
175

    
176
    if (NVRAM->wd_timer != NULL) {
177
        qemu_del_timer(NVRAM->wd_timer);
178
        NVRAM->wd_timer = NULL;
179
    }
180
    NVRAM->buffer[0x1FF0] &= ~0x80;
181
    if (value != 0) {
182
        interval = (1 << (2 * (value & 0x03))) * ((value >> 2) & 0x1F);
183
        qemu_mod_timer(NVRAM->wd_timer, ((uint64_t)time(NULL) * 1000) +
184
                       ((interval * 1000) >> 4));
185
    }
186
}
187

    
188
/* Direct access to NVRAM */
189
void m48t59_write (m48t59_t *NVRAM, uint32_t val)
190
{
191
    struct tm tm;
192
    int tmp;
193

    
194
    if (NVRAM->addr > 0x1FF8 && NVRAM->addr < 0x2000)
195
        NVRAM_PRINTF("%s: 0x%08x => 0x%08x\n", __func__, NVRAM->addr, val);
196
    switch (NVRAM->addr) {
197
    case 0x1FF0:
198
        /* flags register : read-only */
199
        break;
200
    case 0x1FF1:
201
        /* unused */
202
        break;
203
    case 0x1FF2:
204
        /* alarm seconds */
205
        tmp = fromBCD(val & 0x7F);
206
        if (tmp >= 0 && tmp <= 59) {
207
            get_alarm(NVRAM, &tm);
208
            tm.tm_sec = tmp;
209
            NVRAM->buffer[0x1FF2] = val;
210
            set_alarm(NVRAM, &tm);
211
        }
212
        break;
213
    case 0x1FF3:
214
        /* alarm minutes */
215
        tmp = fromBCD(val & 0x7F);
216
        if (tmp >= 0 && tmp <= 59) {
217
            get_alarm(NVRAM, &tm);
218
            tm.tm_min = tmp;
219
            NVRAM->buffer[0x1FF3] = val;
220
            set_alarm(NVRAM, &tm);
221
        }
222
        break;
223
    case 0x1FF4:
224
        /* alarm hours */
225
        tmp = fromBCD(val & 0x3F);
226
        if (tmp >= 0 && tmp <= 23) {
227
            get_alarm(NVRAM, &tm);
228
            tm.tm_hour = tmp;
229
            NVRAM->buffer[0x1FF4] = val;
230
            set_alarm(NVRAM, &tm);
231
        }
232
        break;
233
    case 0x1FF5:
234
        /* alarm date */
235
        tmp = fromBCD(val & 0x1F);
236
        if (tmp != 0) {
237
            get_alarm(NVRAM, &tm);
238
            tm.tm_mday = tmp;
239
            NVRAM->buffer[0x1FF5] = val;
240
            set_alarm(NVRAM, &tm);
241
        }
242
        break;
243
    case 0x1FF6:
244
        /* interrupts */
245
        NVRAM->buffer[0x1FF6] = val;
246
        break;
247
    case 0x1FF7:
248
        /* watchdog */
249
        NVRAM->buffer[0x1FF7] = val;
250
        set_up_watchdog(NVRAM, val);
251
        break;
252
    case 0x1FF8:
253
        /* control */
254
        NVRAM->buffer[0x1FF8] = (val & ~0xA0) | 0x90;
255
        break;
256
    case 0x1FF9:
257
        /* seconds (BCD) */
258
        tmp = fromBCD(val & 0x7F);
259
        if (tmp >= 0 && tmp <= 59) {
260
            get_time(NVRAM, &tm);
261
            tm.tm_sec = tmp;
262
            set_time(NVRAM, &tm);
263
        }
264
        if ((val & 0x80) ^ (NVRAM->buffer[0x1FF9] & 0x80)) {
265
            if (val & 0x80) {
266
                NVRAM->stop_time = time(NULL);
267
            } else {
268
                NVRAM->time_offset += NVRAM->stop_time - time(NULL);
269
                NVRAM->stop_time = 0;
270
            }
271
        }
272
        NVRAM->buffer[0x1FF9] = val & 0x80;
273
        break;
274
    case 0x1FFA:
275
        /* minutes (BCD) */
276
        tmp = fromBCD(val & 0x7F);
277
        if (tmp >= 0 && tmp <= 59) {
278
            get_time(NVRAM, &tm);
279
            tm.tm_min = tmp;
280
            set_time(NVRAM, &tm);
281
        }
282
        break;
283
    case 0x1FFB:
284
        /* hours (BCD) */
285
        tmp = fromBCD(val & 0x3F);
286
        if (tmp >= 0 && tmp <= 23) {
287
            get_time(NVRAM, &tm);
288
            tm.tm_hour = tmp;
289
            set_time(NVRAM, &tm);
290
        }
291
        break;
292
    case 0x1FFC:
293
        /* day of the week / century */
294
        tmp = fromBCD(val & 0x07);
295
        get_time(NVRAM, &tm);
296
        tm.tm_wday = tmp;
297
        set_time(NVRAM, &tm);
298
        NVRAM->buffer[0x1FFC] = val & 0x40;
299
        break;
300
    case 0x1FFD:
301
        /* date */
302
        tmp = fromBCD(val & 0x1F);
303
        if (tmp != 0) {
304
            get_time(NVRAM, &tm);
305
            tm.tm_mday = tmp;
306
            set_time(NVRAM, &tm);
307
        }
308
        break;
309
    case 0x1FFE:
310
        /* month */
311
        tmp = fromBCD(val & 0x1F);
312
        if (tmp >= 1 && tmp <= 12) {
313
            get_time(NVRAM, &tm);
314
            tm.tm_mon = tmp - 1;
315
            set_time(NVRAM, &tm);
316
        }
317
        break;
318
    case 0x1FFF:
319
        /* year */
320
        tmp = fromBCD(val);
321
        if (tmp >= 0 && tmp <= 99) {
322
            get_time(NVRAM, &tm);
323
            tm.tm_year = fromBCD(val);
324
            set_time(NVRAM, &tm);
325
        }
326
        break;
327
    default:
328
        /* Check lock registers state */
329
        if (NVRAM->addr >= 0x20 && NVRAM->addr <= 0x2F && (NVRAM->lock & 1))
330
            break;
331
        if (NVRAM->addr >= 0x30 && NVRAM->addr <= 0x3F && (NVRAM->lock & 2))
332
            break;
333
        if (NVRAM->addr < 0x1FF0 ||
334
            (NVRAM->addr > 0x1FFF && NVRAM->addr < NVRAM->size)) {
335
            NVRAM->buffer[NVRAM->addr] = val & 0xFF;
336
        }
337
        break;
338
    }
339
}
340

    
341
uint32_t m48t59_read (m48t59_t *NVRAM)
342
{
343
    struct tm tm;
344
    uint32_t retval = 0xFF;
345

    
346
    switch (NVRAM->addr) {
347
    case 0x1FF0:
348
        /* flags register */
349
        goto do_read;
350
    case 0x1FF1:
351
        /* unused */
352
        retval = 0;
353
        break;
354
    case 0x1FF2:
355
        /* alarm seconds */
356
        goto do_read;
357
    case 0x1FF3:
358
        /* alarm minutes */
359
        goto do_read;
360
    case 0x1FF4:
361
        /* alarm hours */
362
        goto do_read;
363
    case 0x1FF5:
364
        /* alarm date */
365
        goto do_read;
366
    case 0x1FF6:
367
        /* interrupts */
368
        goto do_read;
369
    case 0x1FF7:
370
        /* A read resets the watchdog */
371
        set_up_watchdog(NVRAM, NVRAM->buffer[0x1FF7]);
372
        goto do_read;
373
    case 0x1FF8:
374
        /* control */
375
        goto do_read;
376
    case 0x1FF9:
377
        /* seconds (BCD) */
378
        get_time(NVRAM, &tm);
379
        retval = (NVRAM->buffer[0x1FF9] & 0x80) | toBCD(tm.tm_sec);
380
        break;
381
    case 0x1FFA:
382
        /* minutes (BCD) */
383
        get_time(NVRAM, &tm);
384
        retval = toBCD(tm.tm_min);
385
        break;
386
    case 0x1FFB:
387
        /* hours (BCD) */
388
        get_time(NVRAM, &tm);
389
        retval = toBCD(tm.tm_hour);
390
        break;
391
    case 0x1FFC:
392
        /* day of the week / century */
393
        get_time(NVRAM, &tm);
394
        retval = NVRAM->buffer[0x1FFC] | tm.tm_wday;
395
        break;
396
    case 0x1FFD:
397
        /* date */
398
        get_time(NVRAM, &tm);
399
        retval = toBCD(tm.tm_mday);
400
        break;
401
    case 0x1FFE:
402
        /* month */
403
        get_time(NVRAM, &tm);
404
        retval = toBCD(tm.tm_mon + 1);
405
        break;
406
    case 0x1FFF:
407
        /* year */
408
        get_time(NVRAM, &tm);
409
        retval = toBCD(tm.tm_year);
410
        break;
411
    default:
412
        /* Check lock registers state */
413
        if (NVRAM->addr >= 0x20 && NVRAM->addr <= 0x2F && (NVRAM->lock & 1))
414
            break;
415
        if (NVRAM->addr >= 0x30 && NVRAM->addr <= 0x3F && (NVRAM->lock & 2))
416
            break;
417
        if (NVRAM->addr < 0x1FF0 ||
418
            (NVRAM->addr > 0x1FFF && NVRAM->addr < NVRAM->size)) {
419
        do_read:
420
            retval = NVRAM->buffer[NVRAM->addr];
421
        }
422
        break;
423
    }
424
    if (NVRAM->addr > 0x1FF9 && NVRAM->addr < 0x2000)
425
        NVRAM_PRINTF("0x%08x <= 0x%08x\n", NVRAM->addr, retval);
426

    
427
    return retval;
428
}
429

    
430
void m48t59_set_addr (m48t59_t *NVRAM, uint32_t addr)
431
{
432
    NVRAM->addr = addr;
433
}
434

    
435
void m48t59_toggle_lock (m48t59_t *NVRAM, int lock)
436
{
437
    NVRAM->lock ^= 1 << lock;
438
}
439

    
440
/* IO access to NVRAM */
441
static void NVRAM_writeb (void *opaque, uint32_t addr, uint32_t val)
442
{
443
    m48t59_t *NVRAM = opaque;
444

    
445
    addr -= NVRAM->io_base;
446
    NVRAM_PRINTF("0x%08x => 0x%08x\n", addr, val);
447
    switch (addr) {
448
    case 0:
449
        NVRAM->addr &= ~0x00FF;
450
        NVRAM->addr |= val;
451
        break;
452
    case 1:
453
        NVRAM->addr &= ~0xFF00;
454
        NVRAM->addr |= val << 8;
455
        break;
456
    case 3:
457
        m48t59_write(NVRAM, val);
458
        NVRAM->addr = 0x0000;
459
        break;
460
    default:
461
        break;
462
    }
463
}
464

    
465
static uint32_t NVRAM_readb (void *opaque, uint32_t addr)
466
{
467
    m48t59_t *NVRAM = opaque;
468
    uint32_t retval;
469

    
470
    addr -= NVRAM->io_base;
471
    switch (addr) {
472
    case 3:
473
        retval = m48t59_read(NVRAM);
474
        break;
475
    default:
476
        retval = -1;
477
        break;
478
    }
479
    NVRAM_PRINTF("0x%08x <= 0x%08x\n", addr, retval);
480

    
481
    return retval;
482
}
483

    
484
/* Initialisation routine */
485
m48t59_t *m48t59_init (int IRQ, uint32_t io_base, uint16_t size)
486
{
487
    m48t59_t *s;
488

    
489
    s = qemu_mallocz(sizeof(m48t59_t));
490
    if (!s)
491
        return NULL;
492
    s->buffer = qemu_mallocz(size);
493
    if (!s->buffer) {
494
        qemu_free(s);
495
        return NULL;
496
    }
497
    s->IRQ = IRQ;
498
    s->size = size;
499
    s->io_base = io_base;
500
    s->addr = 0;
501
    register_ioport_read(io_base, 0x04, 1, NVRAM_readb, s);
502
    register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, s);
503
    s->alrm_timer = qemu_new_timer(vm_clock, &alarm_cb, s);
504
    s->wd_timer = qemu_new_timer(vm_clock, &watchdog_cb, s);
505
    s->lock = 0;
506

    
507
    return s;
508
}