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/*
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* PowerPC emulation helpers for qemu.
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*
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* Copyright (c) 2003-2007 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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#include "op_helper.h" |
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#define MEMSUFFIX _raw
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#define MEMSUFFIX _kernel
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#endif
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//#define DEBUG_OP
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//#define DEBUG_EXCEPTIONS
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//#define DEBUG_SOFTWARE_TLB
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//#define FLUSH_ALL_TLBS
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/*****************************************************************************/
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/* Exceptions processing helpers */
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void do_raise_exception_err (uint32_t exception, int error_code) |
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{ |
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#if 0
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printf("Raise exception %3x code : %d\n", exception, error_code);
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#endif
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switch (exception) {
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case POWERPC_EXCP_PROGRAM:
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if (error_code == POWERPC_EXCP_FP && msr_fe0 == 0 && msr_fe1 == 0) |
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return;
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break;
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default:
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break;
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} |
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env->exception_index = exception; |
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env->error_code = error_code; |
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cpu_loop_exit(); |
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} |
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void do_raise_exception (uint32_t exception)
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{ |
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do_raise_exception_err(exception, 0);
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} |
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void cpu_dump_EA (target_ulong EA);
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void do_print_mem_EA (target_ulong EA)
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{ |
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cpu_dump_EA(EA); |
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} |
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/*****************************************************************************/
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/* Registers load and stores */
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void do_load_cr (void) |
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{ |
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T0 = (env->crf[0] << 28) | |
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(env->crf[1] << 24) | |
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(env->crf[2] << 20) | |
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(env->crf[3] << 16) | |
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(env->crf[4] << 12) | |
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(env->crf[5] << 8) | |
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(env->crf[6] << 4) | |
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(env->crf[7] << 0); |
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} |
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void do_store_cr (uint32_t mask)
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{ |
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int i, sh;
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for (i = 0, sh = 7; i < 8; i++, sh--) { |
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if (mask & (1 << sh)) |
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env->crf[i] = (T0 >> (sh * 4)) & 0xFUL; |
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} |
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} |
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void do_load_xer (void) |
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{ |
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T0 = (xer_so << XER_SO) | |
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(xer_ov << XER_OV) | |
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(xer_ca << XER_CA) | |
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(xer_bc << XER_BC) | |
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(xer_cmp << XER_CMP); |
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} |
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void do_store_xer (void) |
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{ |
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xer_so = (T0 >> XER_SO) & 0x01;
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xer_ov = (T0 >> XER_OV) & 0x01;
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xer_ca = (T0 >> XER_CA) & 0x01;
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xer_cmp = (T0 >> XER_CMP) & 0xFF;
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xer_bc = (T0 >> XER_BC) & 0x7F;
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} |
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void do_load_fpscr (void) |
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{ |
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/* The 32 MSB of the target fpr are undefined.
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* They'll be zero...
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*/
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union {
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float64 d; |
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struct {
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uint32_t u[2];
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} s; |
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} u; |
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int i;
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#if defined(WORDS_BIGENDIAN)
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#define WORD0 0 |
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#define WORD1 1 |
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#else
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#define WORD0 1 |
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#define WORD1 0 |
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#endif
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u.s.u[WORD0] = 0;
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u.s.u[WORD1] = 0;
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for (i = 0; i < 8; i++) |
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u.s.u[WORD1] |= env->fpscr[i] << (4 * i);
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FT0 = u.d; |
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} |
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void do_store_fpscr (uint32_t mask)
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{ |
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/*
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* We use only the 32 LSB of the incoming fpr
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*/
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union {
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double d;
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struct {
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uint32_t u[2];
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} s; |
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} u; |
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int i, rnd_type;
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u.d = FT0; |
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if (mask & 0x80) |
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env->fpscr[0] = (env->fpscr[0] & 0x9) | ((u.s.u[WORD1] >> 28) & ~0x9); |
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for (i = 1; i < 7; i++) { |
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if (mask & (1 << (7 - i))) |
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env->fpscr[i] = (u.s.u[WORD1] >> (4 * (7 - i))) & 0xF; |
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} |
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/* TODO: update FEX & VX */
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/* Set rounding mode */
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switch (env->fpscr[0] & 0x3) { |
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case 0: |
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/* Best approximation (round to nearest) */
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rnd_type = float_round_nearest_even; |
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break;
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case 1: |
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/* Smaller magnitude (round toward zero) */
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rnd_type = float_round_to_zero; |
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break;
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case 2: |
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/* Round toward +infinite */
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rnd_type = float_round_up; |
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break;
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default:
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case 3: |
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/* Round toward -infinite */
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rnd_type = float_round_down; |
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break;
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} |
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set_float_rounding_mode(rnd_type, &env->fp_status); |
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} |
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target_ulong ppc_load_dump_spr (int sprn)
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{ |
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if (loglevel != 0) { |
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fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n", |
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sprn, sprn, env->spr[sprn]); |
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} |
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return env->spr[sprn];
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} |
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void ppc_store_dump_spr (int sprn, target_ulong val) |
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{ |
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if (loglevel != 0) { |
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fprintf(logfile, "Write SPR %d %03x => " ADDRX " <= " ADDRX "\n", |
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sprn, sprn, env->spr[sprn], val); |
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} |
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env->spr[sprn] = val; |
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} |
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/*****************************************************************************/
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/* Fixed point operations helpers */
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#if defined(TARGET_PPC64)
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static void add128 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b) |
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{ |
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*plow += a; |
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/* carry test */
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if (*plow < a)
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(*phigh)++; |
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*phigh += b; |
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} |
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static void neg128 (uint64_t *plow, uint64_t *phigh) |
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{ |
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*plow = ~*plow; |
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*phigh = ~*phigh; |
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add128(plow, phigh, 1, 0); |
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} |
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static void mul64 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b) |
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{ |
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uint32_t a0, a1, b0, b1; |
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uint64_t v; |
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a0 = a; |
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a1 = a >> 32;
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b0 = b; |
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b1 = b >> 32;
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v = (uint64_t)a0 * (uint64_t)b0; |
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*plow = v; |
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*phigh = 0;
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v = (uint64_t)a0 * (uint64_t)b1; |
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add128(plow, phigh, v << 32, v >> 32); |
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v = (uint64_t)a1 * (uint64_t)b0; |
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add128(plow, phigh, v << 32, v >> 32); |
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v = (uint64_t)a1 * (uint64_t)b1; |
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*phigh += v; |
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#if defined(DEBUG_MULDIV)
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printf("mul: 0x%016llx * 0x%016llx = 0x%016llx%016llx\n",
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a, b, *phigh, *plow); |
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#endif
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} |
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void do_mul64 (uint64_t *plow, uint64_t *phigh)
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{ |
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mul64(plow, phigh, T0, T1); |
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} |
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static void imul64 (uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b) |
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{ |
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int sa, sb;
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sa = (a < 0);
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if (sa)
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a = -a; |
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sb = (b < 0);
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if (sb)
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b = -b; |
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mul64(plow, phigh, a, b); |
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if (sa ^ sb) {
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neg128(plow, phigh); |
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} |
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} |
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void do_imul64 (uint64_t *plow, uint64_t *phigh)
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{ |
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imul64(plow, phigh, T0, T1); |
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} |
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#endif
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void do_adde (void) |
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{ |
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T2 = T0; |
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T0 += T1 + xer_ca; |
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if (likely(!((uint32_t)T0 < (uint32_t)T2 ||
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(xer_ca == 1 && (uint32_t)T0 == (uint32_t)T2)))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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#if defined(TARGET_PPC64)
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void do_adde_64 (void) |
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{ |
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T2 = T0; |
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T0 += T1 + xer_ca; |
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if (likely(!((uint64_t)T0 < (uint64_t)T2 ||
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(xer_ca == 1 && (uint64_t)T0 == (uint64_t)T2)))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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#endif
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void do_addmeo (void) |
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{ |
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T1 = T0; |
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T0 += xer_ca + (-1);
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if (likely(!((uint32_t)T1 &
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((uint32_t)T1 ^ (uint32_t)T0) & (1UL << 31)))) { |
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xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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} |
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if (likely(T1 != 0)) |
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xer_ca = 1;
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} |
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#if defined(TARGET_PPC64)
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void do_addmeo_64 (void) |
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{ |
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T1 = T0; |
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T0 += xer_ca + (-1);
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if (likely(!((uint64_t)T1 &
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((uint64_t)T1 ^ (uint64_t)T0) & (1ULL << 63)))) { |
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xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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} |
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if (likely(T1 != 0)) |
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xer_ca = 1;
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} |
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#endif
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void do_divwo (void) |
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{ |
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if (likely(!(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || |
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(int32_t)T1 == 0))) {
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xer_ov = 0;
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T0 = (int32_t)T0 / (int32_t)T1; |
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} else {
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xer_ov = 1;
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xer_so = 1;
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T0 = (-1) * ((uint32_t)T0 >> 31); |
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} |
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} |
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#if defined(TARGET_PPC64)
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void do_divdo (void) |
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{ |
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if (likely(!(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1ULL) || |
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(int64_t)T1 == 0))) {
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xer_ov = 0;
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T0 = (int64_t)T0 / (int64_t)T1; |
358 |
} else {
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xer_ov = 1;
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xer_so = 1;
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T0 = (-1ULL) * ((uint64_t)T0 >> 63); |
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} |
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} |
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#endif
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void do_divwuo (void) |
367 |
{ |
368 |
if (likely((uint32_t)T1 != 0)) { |
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xer_ov = 0;
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T0 = (uint32_t)T0 / (uint32_t)T1; |
371 |
} else {
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xer_ov = 1;
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xer_so = 1;
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T0 = 0;
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} |
376 |
} |
377 |
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#if defined(TARGET_PPC64)
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void do_divduo (void) |
380 |
{ |
381 |
if (likely((uint64_t)T1 != 0)) { |
382 |
xer_ov = 0;
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T0 = (uint64_t)T0 / (uint64_t)T1; |
384 |
} else {
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xer_ov = 1;
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xer_so = 1;
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T0 = 0;
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} |
389 |
} |
390 |
#endif
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void do_mullwo (void) |
393 |
{ |
394 |
int64_t res = (int64_t)T0 * (int64_t)T1; |
395 |
|
396 |
if (likely((int32_t)res == res)) {
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397 |
xer_ov = 0;
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398 |
} else {
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xer_ov = 1;
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xer_so = 1;
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401 |
} |
402 |
T0 = (int32_t)res; |
403 |
} |
404 |
|
405 |
#if defined(TARGET_PPC64)
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void do_mulldo (void) |
407 |
{ |
408 |
int64_t th; |
409 |
uint64_t tl; |
410 |
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do_imul64(&tl, &th); |
412 |
if (likely(th == 0)) { |
413 |
xer_ov = 0;
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414 |
} else {
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415 |
xer_ov = 1;
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xer_so = 1;
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417 |
} |
418 |
T0 = (int64_t)tl; |
419 |
} |
420 |
#endif
|
421 |
|
422 |
void do_nego (void) |
423 |
{ |
424 |
if (likely((int32_t)T0 != INT32_MIN)) {
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xer_ov = 0;
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T0 = -(int32_t)T0; |
427 |
} else {
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428 |
xer_ov = 1;
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429 |
xer_so = 1;
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430 |
} |
431 |
} |
432 |
|
433 |
#if defined(TARGET_PPC64)
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434 |
void do_nego_64 (void) |
435 |
{ |
436 |
if (likely((int64_t)T0 != INT64_MIN)) {
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437 |
xer_ov = 0;
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438 |
T0 = -(int64_t)T0; |
439 |
} else {
|
440 |
xer_ov = 1;
|
441 |
xer_so = 1;
|
442 |
} |
443 |
} |
444 |
#endif
|
445 |
|
446 |
void do_subfe (void) |
447 |
{ |
448 |
T0 = T1 + ~T0 + xer_ca; |
449 |
if (likely((uint32_t)T0 >= (uint32_t)T1 &&
|
450 |
(xer_ca == 0 || (uint32_t)T0 != (uint32_t)T1))) {
|
451 |
xer_ca = 0;
|
452 |
} else {
|
453 |
xer_ca = 1;
|
454 |
} |
455 |
} |
456 |
|
457 |
#if defined(TARGET_PPC64)
|
458 |
void do_subfe_64 (void) |
459 |
{ |
460 |
T0 = T1 + ~T0 + xer_ca; |
461 |
if (likely((uint64_t)T0 >= (uint64_t)T1 &&
|
462 |
(xer_ca == 0 || (uint64_t)T0 != (uint64_t)T1))) {
|
463 |
xer_ca = 0;
|
464 |
} else {
|
465 |
xer_ca = 1;
|
466 |
} |
467 |
} |
468 |
#endif
|
469 |
|
470 |
void do_subfmeo (void) |
471 |
{ |
472 |
T1 = T0; |
473 |
T0 = ~T0 + xer_ca - 1;
|
474 |
if (likely(!((uint32_t)~T1 & ((uint32_t)~T1 ^ (uint32_t)T0) &
|
475 |
(1UL << 31)))) { |
476 |
xer_ov = 0;
|
477 |
} else {
|
478 |
xer_ov = 1;
|
479 |
xer_so = 1;
|
480 |
} |
481 |
if (likely((uint32_t)T1 != UINT32_MAX))
|
482 |
xer_ca = 1;
|
483 |
} |
484 |
|
485 |
#if defined(TARGET_PPC64)
|
486 |
void do_subfmeo_64 (void) |
487 |
{ |
488 |
T1 = T0; |
489 |
T0 = ~T0 + xer_ca - 1;
|
490 |
if (likely(!((uint64_t)~T1 & ((uint64_t)~T1 ^ (uint64_t)T0) &
|
491 |
(1ULL << 63)))) { |
492 |
xer_ov = 0;
|
493 |
} else {
|
494 |
xer_ov = 1;
|
495 |
xer_so = 1;
|
496 |
} |
497 |
if (likely((uint64_t)T1 != UINT64_MAX))
|
498 |
xer_ca = 1;
|
499 |
} |
500 |
#endif
|
501 |
|
502 |
void do_subfzeo (void) |
503 |
{ |
504 |
T1 = T0; |
505 |
T0 = ~T0 + xer_ca; |
506 |
if (likely(!(((uint32_t)~T1 ^ UINT32_MAX) &
|
507 |
((uint32_t)(~T1) ^ (uint32_t)T0) & (1UL << 31)))) { |
508 |
xer_ov = 0;
|
509 |
} else {
|
510 |
xer_ov = 1;
|
511 |
xer_so = 1;
|
512 |
} |
513 |
if (likely((uint32_t)T0 >= (uint32_t)~T1)) {
|
514 |
xer_ca = 0;
|
515 |
} else {
|
516 |
xer_ca = 1;
|
517 |
} |
518 |
} |
519 |
|
520 |
#if defined(TARGET_PPC64)
|
521 |
void do_subfzeo_64 (void) |
522 |
{ |
523 |
T1 = T0; |
524 |
T0 = ~T0 + xer_ca; |
525 |
if (likely(!(((uint64_t)~T1 ^ UINT64_MAX) &
|
526 |
((uint64_t)(~T1) ^ (uint64_t)T0) & (1ULL << 63)))) { |
527 |
xer_ov = 0;
|
528 |
} else {
|
529 |
xer_ov = 1;
|
530 |
xer_so = 1;
|
531 |
} |
532 |
if (likely((uint64_t)T0 >= (uint64_t)~T1)) {
|
533 |
xer_ca = 0;
|
534 |
} else {
|
535 |
xer_ca = 1;
|
536 |
} |
537 |
} |
538 |
#endif
|
539 |
|
540 |
/* shift right arithmetic helper */
|
541 |
void do_sraw (void) |
542 |
{ |
543 |
int32_t ret; |
544 |
|
545 |
if (likely(!(T1 & 0x20UL))) { |
546 |
if (likely((uint32_t)T1 != 0)) { |
547 |
ret = (int32_t)T0 >> (T1 & 0x1fUL);
|
548 |
if (likely(ret >= 0 || ((int32_t)T0 & ((1 << T1) - 1)) == 0)) { |
549 |
xer_ca = 0;
|
550 |
} else {
|
551 |
xer_ca = 1;
|
552 |
} |
553 |
} else {
|
554 |
ret = T0; |
555 |
xer_ca = 0;
|
556 |
} |
557 |
} else {
|
558 |
ret = (-1) * ((uint32_t)T0 >> 31); |
559 |
if (likely(ret >= 0 || ((uint32_t)T0 & ~0x80000000UL) == 0)) { |
560 |
xer_ca = 0;
|
561 |
} else {
|
562 |
xer_ca = 1;
|
563 |
} |
564 |
} |
565 |
T0 = ret; |
566 |
} |
567 |
|
568 |
#if defined(TARGET_PPC64)
|
569 |
void do_srad (void) |
570 |
{ |
571 |
int64_t ret; |
572 |
|
573 |
if (likely(!(T1 & 0x40UL))) { |
574 |
if (likely((uint64_t)T1 != 0)) { |
575 |
ret = (int64_t)T0 >> (T1 & 0x3FUL);
|
576 |
if (likely(ret >= 0 || ((int64_t)T0 & ((1 << T1) - 1)) == 0)) { |
577 |
xer_ca = 0;
|
578 |
} else {
|
579 |
xer_ca = 1;
|
580 |
} |
581 |
} else {
|
582 |
ret = T0; |
583 |
xer_ca = 0;
|
584 |
} |
585 |
} else {
|
586 |
ret = (-1) * ((uint64_t)T0 >> 63); |
587 |
if (likely(ret >= 0 || ((uint64_t)T0 & ~0x8000000000000000ULL) == 0)) { |
588 |
xer_ca = 0;
|
589 |
} else {
|
590 |
xer_ca = 1;
|
591 |
} |
592 |
} |
593 |
T0 = ret; |
594 |
} |
595 |
#endif
|
596 |
|
597 |
static inline int popcnt (uint32_t val) |
598 |
{ |
599 |
int i;
|
600 |
|
601 |
for (i = 0; val != 0;) |
602 |
val = val ^ (val - 1);
|
603 |
|
604 |
return i;
|
605 |
} |
606 |
|
607 |
void do_popcntb (void) |
608 |
{ |
609 |
uint32_t ret; |
610 |
int i;
|
611 |
|
612 |
ret = 0;
|
613 |
for (i = 0; i < 32; i += 8) |
614 |
ret |= popcnt((T0 >> i) & 0xFF) << i;
|
615 |
T0 = ret; |
616 |
} |
617 |
|
618 |
#if defined(TARGET_PPC64)
|
619 |
void do_popcntb_64 (void) |
620 |
{ |
621 |
uint64_t ret; |
622 |
int i;
|
623 |
|
624 |
ret = 0;
|
625 |
for (i = 0; i < 64; i += 8) |
626 |
ret |= popcnt((T0 >> i) & 0xFF) << i;
|
627 |
T0 = ret; |
628 |
} |
629 |
#endif
|
630 |
|
631 |
/*****************************************************************************/
|
632 |
/* Floating point operations helpers */
|
633 |
void do_fctiw (void) |
634 |
{ |
635 |
union {
|
636 |
double d;
|
637 |
uint64_t i; |
638 |
} p; |
639 |
|
640 |
p.i = float64_to_int32(FT0, &env->fp_status); |
641 |
#if USE_PRECISE_EMULATION
|
642 |
/* XXX: higher bits are not supposed to be significant.
|
643 |
* to make tests easier, return the same as a real PowerPC 750 (aka G3)
|
644 |
*/
|
645 |
p.i |= 0xFFF80000ULL << 32; |
646 |
#endif
|
647 |
FT0 = p.d; |
648 |
} |
649 |
|
650 |
void do_fctiwz (void) |
651 |
{ |
652 |
union {
|
653 |
double d;
|
654 |
uint64_t i; |
655 |
} p; |
656 |
|
657 |
p.i = float64_to_int32_round_to_zero(FT0, &env->fp_status); |
658 |
#if USE_PRECISE_EMULATION
|
659 |
/* XXX: higher bits are not supposed to be significant.
|
660 |
* to make tests easier, return the same as a real PowerPC 750 (aka G3)
|
661 |
*/
|
662 |
p.i |= 0xFFF80000ULL << 32; |
663 |
#endif
|
664 |
FT0 = p.d; |
665 |
} |
666 |
|
667 |
#if defined(TARGET_PPC64)
|
668 |
void do_fcfid (void) |
669 |
{ |
670 |
union {
|
671 |
double d;
|
672 |
uint64_t i; |
673 |
} p; |
674 |
|
675 |
p.d = FT0; |
676 |
FT0 = int64_to_float64(p.i, &env->fp_status); |
677 |
} |
678 |
|
679 |
void do_fctid (void) |
680 |
{ |
681 |
union {
|
682 |
double d;
|
683 |
uint64_t i; |
684 |
} p; |
685 |
|
686 |
p.i = float64_to_int64(FT0, &env->fp_status); |
687 |
FT0 = p.d; |
688 |
} |
689 |
|
690 |
void do_fctidz (void) |
691 |
{ |
692 |
union {
|
693 |
double d;
|
694 |
uint64_t i; |
695 |
} p; |
696 |
|
697 |
p.i = float64_to_int64_round_to_zero(FT0, &env->fp_status); |
698 |
FT0 = p.d; |
699 |
} |
700 |
|
701 |
#endif
|
702 |
|
703 |
static inline void do_fri (int rounding_mode) |
704 |
{ |
705 |
int curmode;
|
706 |
|
707 |
curmode = env->fp_status.float_rounding_mode; |
708 |
set_float_rounding_mode(rounding_mode, &env->fp_status); |
709 |
FT0 = float64_round_to_int(FT0, &env->fp_status); |
710 |
set_float_rounding_mode(curmode, &env->fp_status); |
711 |
} |
712 |
|
713 |
void do_frin (void) |
714 |
{ |
715 |
do_fri(float_round_nearest_even); |
716 |
} |
717 |
|
718 |
void do_friz (void) |
719 |
{ |
720 |
do_fri(float_round_to_zero); |
721 |
} |
722 |
|
723 |
void do_frip (void) |
724 |
{ |
725 |
do_fri(float_round_up); |
726 |
} |
727 |
|
728 |
void do_frim (void) |
729 |
{ |
730 |
do_fri(float_round_down); |
731 |
} |
732 |
|
733 |
#if USE_PRECISE_EMULATION
|
734 |
void do_fmadd (void) |
735 |
{ |
736 |
#ifdef FLOAT128
|
737 |
float128 ft0_128, ft1_128; |
738 |
|
739 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
740 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
741 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
742 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
743 |
ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
744 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
745 |
#else
|
746 |
/* This is OK on x86 hosts */
|
747 |
FT0 = (FT0 * FT1) + FT2; |
748 |
#endif
|
749 |
} |
750 |
|
751 |
void do_fmsub (void) |
752 |
{ |
753 |
#ifdef FLOAT128
|
754 |
float128 ft0_128, ft1_128; |
755 |
|
756 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
757 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
758 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
759 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
760 |
ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
761 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
762 |
#else
|
763 |
/* This is OK on x86 hosts */
|
764 |
FT0 = (FT0 * FT1) - FT2; |
765 |
#endif
|
766 |
} |
767 |
#endif /* USE_PRECISE_EMULATION */ |
768 |
|
769 |
void do_fnmadd (void) |
770 |
{ |
771 |
#if USE_PRECISE_EMULATION
|
772 |
#ifdef FLOAT128
|
773 |
float128 ft0_128, ft1_128; |
774 |
|
775 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
776 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
777 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
778 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
779 |
ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
780 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
781 |
#else
|
782 |
/* This is OK on x86 hosts */
|
783 |
FT0 = (FT0 * FT1) + FT2; |
784 |
#endif
|
785 |
#else
|
786 |
FT0 = float64_mul(FT0, FT1, &env->fp_status); |
787 |
FT0 = float64_add(FT0, FT2, &env->fp_status); |
788 |
#endif
|
789 |
if (likely(!isnan(FT0)))
|
790 |
FT0 = float64_chs(FT0); |
791 |
} |
792 |
|
793 |
void do_fnmsub (void) |
794 |
{ |
795 |
#if USE_PRECISE_EMULATION
|
796 |
#ifdef FLOAT128
|
797 |
float128 ft0_128, ft1_128; |
798 |
|
799 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
800 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
801 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
802 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
803 |
ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
804 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
805 |
#else
|
806 |
/* This is OK on x86 hosts */
|
807 |
FT0 = (FT0 * FT1) - FT2; |
808 |
#endif
|
809 |
#else
|
810 |
FT0 = float64_mul(FT0, FT1, &env->fp_status); |
811 |
FT0 = float64_sub(FT0, FT2, &env->fp_status); |
812 |
#endif
|
813 |
if (likely(!isnan(FT0)))
|
814 |
FT0 = float64_chs(FT0); |
815 |
} |
816 |
|
817 |
void do_fsqrt (void) |
818 |
{ |
819 |
FT0 = float64_sqrt(FT0, &env->fp_status); |
820 |
} |
821 |
|
822 |
void do_fre (void) |
823 |
{ |
824 |
union {
|
825 |
double d;
|
826 |
uint64_t i; |
827 |
} p; |
828 |
|
829 |
if (likely(isnormal(FT0))) {
|
830 |
FT0 = float64_div(1.0, FT0, &env->fp_status); |
831 |
} else {
|
832 |
p.d = FT0; |
833 |
if (p.i == 0x8000000000000000ULL) { |
834 |
p.i = 0xFFF0000000000000ULL;
|
835 |
} else if (p.i == 0x0000000000000000ULL) { |
836 |
p.i = 0x7FF0000000000000ULL;
|
837 |
} else if (isnan(FT0)) { |
838 |
p.i = 0x7FF8000000000000ULL;
|
839 |
} else if (FT0 < 0.0) { |
840 |
p.i = 0x8000000000000000ULL;
|
841 |
} else {
|
842 |
p.i = 0x0000000000000000ULL;
|
843 |
} |
844 |
FT0 = p.d; |
845 |
} |
846 |
} |
847 |
|
848 |
void do_fres (void) |
849 |
{ |
850 |
union {
|
851 |
double d;
|
852 |
uint64_t i; |
853 |
} p; |
854 |
|
855 |
if (likely(isnormal(FT0))) {
|
856 |
#if USE_PRECISE_EMULATION
|
857 |
FT0 = float64_div(1.0, FT0, &env->fp_status); |
858 |
FT0 = float64_to_float32(FT0, &env->fp_status); |
859 |
#else
|
860 |
FT0 = float32_div(1.0, FT0, &env->fp_status); |
861 |
#endif
|
862 |
} else {
|
863 |
p.d = FT0; |
864 |
if (p.i == 0x8000000000000000ULL) { |
865 |
p.i = 0xFFF0000000000000ULL;
|
866 |
} else if (p.i == 0x0000000000000000ULL) { |
867 |
p.i = 0x7FF0000000000000ULL;
|
868 |
} else if (isnan(FT0)) { |
869 |
p.i = 0x7FF8000000000000ULL;
|
870 |
} else if (FT0 < 0.0) { |
871 |
p.i = 0x8000000000000000ULL;
|
872 |
} else {
|
873 |
p.i = 0x0000000000000000ULL;
|
874 |
} |
875 |
FT0 = p.d; |
876 |
} |
877 |
} |
878 |
|
879 |
void do_frsqrte (void) |
880 |
{ |
881 |
union {
|
882 |
double d;
|
883 |
uint64_t i; |
884 |
} p; |
885 |
|
886 |
if (likely(isnormal(FT0) && FT0 > 0.0)) { |
887 |
FT0 = float64_sqrt(FT0, &env->fp_status); |
888 |
FT0 = float32_div(1.0, FT0, &env->fp_status); |
889 |
} else {
|
890 |
p.d = FT0; |
891 |
if (p.i == 0x8000000000000000ULL) { |
892 |
p.i = 0xFFF0000000000000ULL;
|
893 |
} else if (p.i == 0x0000000000000000ULL) { |
894 |
p.i = 0x7FF0000000000000ULL;
|
895 |
} else if (isnan(FT0)) { |
896 |
if (!(p.i & 0x0008000000000000ULL)) |
897 |
p.i |= 0x000FFFFFFFFFFFFFULL;
|
898 |
} else if (FT0 < 0) { |
899 |
p.i = 0x7FF8000000000000ULL;
|
900 |
} else {
|
901 |
p.i = 0x0000000000000000ULL;
|
902 |
} |
903 |
FT0 = p.d; |
904 |
} |
905 |
} |
906 |
|
907 |
void do_fsel (void) |
908 |
{ |
909 |
if (FT0 >= 0) |
910 |
FT0 = FT1; |
911 |
else
|
912 |
FT0 = FT2; |
913 |
} |
914 |
|
915 |
void do_fcmpu (void) |
916 |
{ |
917 |
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
918 |
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
919 |
T0 = 0x08UL;
|
920 |
} else if (!float64_le(FT0, FT1, &env->fp_status)) { |
921 |
T0 = 0x04UL;
|
922 |
} else {
|
923 |
T0 = 0x02UL;
|
924 |
} |
925 |
} else {
|
926 |
T0 = 0x01UL;
|
927 |
env->fpscr[4] |= 0x1; |
928 |
env->fpscr[6] |= 0x1; |
929 |
} |
930 |
env->fpscr[3] = T0;
|
931 |
} |
932 |
|
933 |
void do_fcmpo (void) |
934 |
{ |
935 |
env->fpscr[4] &= ~0x1; |
936 |
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
937 |
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
938 |
T0 = 0x08UL;
|
939 |
} else if (!float64_le(FT0, FT1, &env->fp_status)) { |
940 |
T0 = 0x04UL;
|
941 |
} else {
|
942 |
T0 = 0x02UL;
|
943 |
} |
944 |
} else {
|
945 |
T0 = 0x01UL;
|
946 |
env->fpscr[4] |= 0x1; |
947 |
if (!float64_is_signaling_nan(FT0) || !float64_is_signaling_nan(FT1)) {
|
948 |
/* Quiet NaN case */
|
949 |
env->fpscr[6] |= 0x1; |
950 |
if (!(env->fpscr[1] & 0x8)) |
951 |
env->fpscr[4] |= 0x8; |
952 |
} else {
|
953 |
env->fpscr[4] |= 0x8; |
954 |
} |
955 |
} |
956 |
env->fpscr[3] = T0;
|
957 |
} |
958 |
|
959 |
#if !defined (CONFIG_USER_ONLY)
|
960 |
void cpu_dump_rfi (target_ulong RA, target_ulong msr);
|
961 |
void do_rfi (void) |
962 |
{ |
963 |
#if defined(TARGET_PPC64)
|
964 |
if (env->spr[SPR_SRR1] & (1ULL << MSR_SF)) { |
965 |
env->nip = (uint64_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
966 |
do_store_msr(env, (uint64_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
967 |
} else {
|
968 |
env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
969 |
ppc_store_msr_32(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
970 |
} |
971 |
#else
|
972 |
env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
973 |
do_store_msr(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
974 |
#endif
|
975 |
#if defined (DEBUG_OP)
|
976 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
977 |
#endif
|
978 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
979 |
} |
980 |
|
981 |
#if defined(TARGET_PPC64)
|
982 |
void do_rfid (void) |
983 |
{ |
984 |
if (env->spr[SPR_SRR1] & (1ULL << MSR_SF)) { |
985 |
env->nip = (uint64_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
986 |
do_store_msr(env, (uint64_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
987 |
} else {
|
988 |
env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
989 |
do_store_msr(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
990 |
} |
991 |
#if defined (DEBUG_OP)
|
992 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
993 |
#endif
|
994 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
995 |
} |
996 |
#endif
|
997 |
#endif
|
998 |
|
999 |
void do_tw (int flags) |
1000 |
{ |
1001 |
if (!likely(!(((int32_t)T0 < (int32_t)T1 && (flags & 0x10)) || |
1002 |
((int32_t)T0 > (int32_t)T1 && (flags & 0x08)) ||
|
1003 |
((int32_t)T0 == (int32_t)T1 && (flags & 0x04)) ||
|
1004 |
((uint32_t)T0 < (uint32_t)T1 && (flags & 0x02)) ||
|
1005 |
((uint32_t)T0 > (uint32_t)T1 && (flags & 0x01))))) {
|
1006 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); |
1007 |
} |
1008 |
} |
1009 |
|
1010 |
#if defined(TARGET_PPC64)
|
1011 |
void do_td (int flags) |
1012 |
{ |
1013 |
if (!likely(!(((int64_t)T0 < (int64_t)T1 && (flags & 0x10)) || |
1014 |
((int64_t)T0 > (int64_t)T1 && (flags & 0x08)) ||
|
1015 |
((int64_t)T0 == (int64_t)T1 && (flags & 0x04)) ||
|
1016 |
((uint64_t)T0 < (uint64_t)T1 && (flags & 0x02)) ||
|
1017 |
((uint64_t)T0 > (uint64_t)T1 && (flags & 0x01)))))
|
1018 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); |
1019 |
} |
1020 |
#endif
|
1021 |
|
1022 |
/*****************************************************************************/
|
1023 |
/* PowerPC 601 specific instructions (POWER bridge) */
|
1024 |
void do_POWER_abso (void) |
1025 |
{ |
1026 |
if ((uint32_t)T0 == INT32_MIN) {
|
1027 |
T0 = INT32_MAX; |
1028 |
xer_ov = 1;
|
1029 |
xer_so = 1;
|
1030 |
} else {
|
1031 |
T0 = -T0; |
1032 |
xer_ov = 0;
|
1033 |
} |
1034 |
} |
1035 |
|
1036 |
void do_POWER_clcs (void) |
1037 |
{ |
1038 |
switch (T0) {
|
1039 |
case 0x0CUL: |
1040 |
/* Instruction cache line size */
|
1041 |
T0 = ICACHE_LINE_SIZE; |
1042 |
break;
|
1043 |
case 0x0DUL: |
1044 |
/* Data cache line size */
|
1045 |
T0 = DCACHE_LINE_SIZE; |
1046 |
break;
|
1047 |
case 0x0EUL: |
1048 |
/* Minimum cache line size */
|
1049 |
T0 = ICACHE_LINE_SIZE < DCACHE_LINE_SIZE ? |
1050 |
ICACHE_LINE_SIZE : DCACHE_LINE_SIZE; |
1051 |
break;
|
1052 |
case 0x0FUL: |
1053 |
/* Maximum cache line size */
|
1054 |
T0 = ICACHE_LINE_SIZE > DCACHE_LINE_SIZE ? |
1055 |
ICACHE_LINE_SIZE : DCACHE_LINE_SIZE; |
1056 |
break;
|
1057 |
default:
|
1058 |
/* Undefined */
|
1059 |
break;
|
1060 |
} |
1061 |
} |
1062 |
|
1063 |
void do_POWER_div (void) |
1064 |
{ |
1065 |
uint64_t tmp; |
1066 |
|
1067 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1068 |
T0 = (long)((-1) * (T0 >> 31)); |
1069 |
env->spr[SPR_MQ] = 0;
|
1070 |
} else {
|
1071 |
tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
|
1072 |
env->spr[SPR_MQ] = tmp % T1; |
1073 |
T0 = tmp / (int32_t)T1; |
1074 |
} |
1075 |
} |
1076 |
|
1077 |
void do_POWER_divo (void) |
1078 |
{ |
1079 |
int64_t tmp; |
1080 |
|
1081 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1082 |
T0 = (long)((-1) * (T0 >> 31)); |
1083 |
env->spr[SPR_MQ] = 0;
|
1084 |
xer_ov = 1;
|
1085 |
xer_so = 1;
|
1086 |
} else {
|
1087 |
tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
|
1088 |
env->spr[SPR_MQ] = tmp % T1; |
1089 |
tmp /= (int32_t)T1; |
1090 |
if (tmp > (int64_t)INT32_MAX || tmp < (int64_t)INT32_MIN) {
|
1091 |
xer_ov = 1;
|
1092 |
xer_so = 1;
|
1093 |
} else {
|
1094 |
xer_ov = 0;
|
1095 |
} |
1096 |
T0 = tmp; |
1097 |
} |
1098 |
} |
1099 |
|
1100 |
void do_POWER_divs (void) |
1101 |
{ |
1102 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1103 |
T0 = (long)((-1) * (T0 >> 31)); |
1104 |
env->spr[SPR_MQ] = 0;
|
1105 |
} else {
|
1106 |
env->spr[SPR_MQ] = T0 % T1; |
1107 |
T0 = (int32_t)T0 / (int32_t)T1; |
1108 |
} |
1109 |
} |
1110 |
|
1111 |
void do_POWER_divso (void) |
1112 |
{ |
1113 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1114 |
T0 = (long)((-1) * (T0 >> 31)); |
1115 |
env->spr[SPR_MQ] = 0;
|
1116 |
xer_ov = 1;
|
1117 |
xer_so = 1;
|
1118 |
} else {
|
1119 |
T0 = (int32_t)T0 / (int32_t)T1; |
1120 |
env->spr[SPR_MQ] = (int32_t)T0 % (int32_t)T1; |
1121 |
xer_ov = 0;
|
1122 |
} |
1123 |
} |
1124 |
|
1125 |
void do_POWER_dozo (void) |
1126 |
{ |
1127 |
if ((int32_t)T1 > (int32_t)T0) {
|
1128 |
T2 = T0; |
1129 |
T0 = T1 - T0; |
1130 |
if (((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) &
|
1131 |
((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)) { |
1132 |
xer_ov = 1;
|
1133 |
xer_so = 1;
|
1134 |
} else {
|
1135 |
xer_ov = 0;
|
1136 |
} |
1137 |
} else {
|
1138 |
T0 = 0;
|
1139 |
xer_ov = 0;
|
1140 |
} |
1141 |
} |
1142 |
|
1143 |
void do_POWER_maskg (void) |
1144 |
{ |
1145 |
uint32_t ret; |
1146 |
|
1147 |
if ((uint32_t)T0 == (uint32_t)(T1 + 1)) { |
1148 |
ret = -1;
|
1149 |
} else {
|
1150 |
ret = (((uint32_t)(-1)) >> ((uint32_t)T0)) ^
|
1151 |
(((uint32_t)(-1) >> ((uint32_t)T1)) >> 1); |
1152 |
if ((uint32_t)T0 > (uint32_t)T1)
|
1153 |
ret = ~ret; |
1154 |
} |
1155 |
T0 = ret; |
1156 |
} |
1157 |
|
1158 |
void do_POWER_mulo (void) |
1159 |
{ |
1160 |
uint64_t tmp; |
1161 |
|
1162 |
tmp = (uint64_t)T0 * (uint64_t)T1; |
1163 |
env->spr[SPR_MQ] = tmp >> 32;
|
1164 |
T0 = tmp; |
1165 |
if (tmp >> 32 != ((uint64_t)T0 >> 16) * ((uint64_t)T1 >> 16)) { |
1166 |
xer_ov = 1;
|
1167 |
xer_so = 1;
|
1168 |
} else {
|
1169 |
xer_ov = 0;
|
1170 |
} |
1171 |
} |
1172 |
|
1173 |
#if !defined (CONFIG_USER_ONLY)
|
1174 |
void do_POWER_rac (void) |
1175 |
{ |
1176 |
#if 0
|
1177 |
mmu_ctx_t ctx;
|
1178 |
|
1179 |
/* We don't have to generate many instances of this instruction,
|
1180 |
* as rac is supervisor only.
|
1181 |
*/
|
1182 |
if (get_physical_address(env, &ctx, T0, 0, ACCESS_INT, 1) == 0)
|
1183 |
T0 = ctx.raddr;
|
1184 |
#endif
|
1185 |
} |
1186 |
|
1187 |
void do_POWER_rfsvc (void) |
1188 |
{ |
1189 |
env->nip = env->lr & ~0x00000003UL;
|
1190 |
T0 = env->ctr & 0x0000FFFFUL;
|
1191 |
do_store_msr(env, T0); |
1192 |
#if defined (DEBUG_OP)
|
1193 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
1194 |
#endif
|
1195 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
1196 |
} |
1197 |
|
1198 |
/* PowerPC 601 BAT management helper */
|
1199 |
void do_store_601_batu (int nr) |
1200 |
{ |
1201 |
do_store_ibatu(env, nr, (uint32_t)T0); |
1202 |
env->DBAT[0][nr] = env->IBAT[0][nr]; |
1203 |
env->DBAT[1][nr] = env->IBAT[1][nr]; |
1204 |
} |
1205 |
#endif
|
1206 |
|
1207 |
/*****************************************************************************/
|
1208 |
/* 602 specific instructions */
|
1209 |
/* mfrom is the most crazy instruction ever seen, imho ! */
|
1210 |
/* Real implementation uses a ROM table. Do the same */
|
1211 |
#define USE_MFROM_ROM_TABLE
|
1212 |
void do_op_602_mfrom (void) |
1213 |
{ |
1214 |
if (likely(T0 < 602)) { |
1215 |
#if defined(USE_MFROM_ROM_TABLE)
|
1216 |
#include "mfrom_table.c" |
1217 |
T0 = mfrom_ROM_table[T0]; |
1218 |
#else
|
1219 |
double d;
|
1220 |
/* Extremly decomposed:
|
1221 |
* -T0 / 256
|
1222 |
* T0 = 256 * log10(10 + 1.0) + 0.5
|
1223 |
*/
|
1224 |
d = T0; |
1225 |
d = float64_div(d, 256, &env->fp_status);
|
1226 |
d = float64_chs(d); |
1227 |
d = exp10(d); // XXX: use float emulation function
|
1228 |
d = float64_add(d, 1.0, &env->fp_status); |
1229 |
d = log10(d); // XXX: use float emulation function
|
1230 |
d = float64_mul(d, 256, &env->fp_status);
|
1231 |
d = float64_add(d, 0.5, &env->fp_status); |
1232 |
T0 = float64_round_to_int(d, &env->fp_status); |
1233 |
#endif
|
1234 |
} else {
|
1235 |
T0 = 0;
|
1236 |
} |
1237 |
} |
1238 |
|
1239 |
/*****************************************************************************/
|
1240 |
/* Embedded PowerPC specific helpers */
|
1241 |
void do_405_check_ov (void) |
1242 |
{ |
1243 |
if (likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) || |
1244 |
!(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
|
1245 |
xer_ov = 0;
|
1246 |
} else {
|
1247 |
xer_ov = 1;
|
1248 |
xer_so = 1;
|
1249 |
} |
1250 |
} |
1251 |
|
1252 |
void do_405_check_sat (void) |
1253 |
{ |
1254 |
if (!likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) || |
1255 |
!(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
|
1256 |
/* Saturate result */
|
1257 |
if (T2 >> 31) { |
1258 |
T0 = INT32_MIN; |
1259 |
} else {
|
1260 |
T0 = INT32_MAX; |
1261 |
} |
1262 |
} |
1263 |
} |
1264 |
|
1265 |
/* XXX: to be improved to check access rights when in user-mode */
|
1266 |
void do_load_dcr (void) |
1267 |
{ |
1268 |
target_ulong val; |
1269 |
|
1270 |
if (unlikely(env->dcr_env == NULL)) { |
1271 |
if (loglevel != 0) { |
1272 |
fprintf(logfile, "No DCR environment\n");
|
1273 |
} |
1274 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1275 |
POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
1276 |
} else if (unlikely(ppc_dcr_read(env->dcr_env, T0, &val) != 0)) { |
1277 |
if (loglevel != 0) { |
1278 |
fprintf(logfile, "DCR read error %d %03x\n", (int)T0, (int)T0); |
1279 |
} |
1280 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1281 |
POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
1282 |
} else {
|
1283 |
T0 = val; |
1284 |
} |
1285 |
} |
1286 |
|
1287 |
void do_store_dcr (void) |
1288 |
{ |
1289 |
if (unlikely(env->dcr_env == NULL)) { |
1290 |
if (loglevel != 0) { |
1291 |
fprintf(logfile, "No DCR environment\n");
|
1292 |
} |
1293 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1294 |
POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
1295 |
} else if (unlikely(ppc_dcr_write(env->dcr_env, T0, T1) != 0)) { |
1296 |
if (loglevel != 0) { |
1297 |
fprintf(logfile, "DCR write error %d %03x\n", (int)T0, (int)T0); |
1298 |
} |
1299 |
do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1300 |
POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
1301 |
} |
1302 |
} |
1303 |
|
1304 |
#if !defined(CONFIG_USER_ONLY)
|
1305 |
void do_40x_rfci (void) |
1306 |
{ |
1307 |
env->nip = env->spr[SPR_40x_SRR2]; |
1308 |
do_store_msr(env, env->spr[SPR_40x_SRR3] & ~0xFFFF0000);
|
1309 |
#if defined (DEBUG_OP)
|
1310 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
1311 |
#endif
|
1312 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1313 |
} |
1314 |
|
1315 |
void do_rfci (void) |
1316 |
{ |
1317 |
#if defined(TARGET_PPC64)
|
1318 |
if (env->spr[SPR_BOOKE_CSRR1] & (1 << MSR_CM)) { |
1319 |
env->nip = (uint64_t)env->spr[SPR_BOOKE_CSRR0]; |
1320 |
} else
|
1321 |
#endif
|
1322 |
{ |
1323 |
env->nip = (uint32_t)env->spr[SPR_BOOKE_CSRR0]; |
1324 |
} |
1325 |
do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_CSRR1] & ~0x3FFF0000);
|
1326 |
#if defined (DEBUG_OP)
|
1327 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
1328 |
#endif
|
1329 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1330 |
} |
1331 |
|
1332 |
void do_rfdi (void) |
1333 |
{ |
1334 |
#if defined(TARGET_PPC64)
|
1335 |
if (env->spr[SPR_BOOKE_DSRR1] & (1 << MSR_CM)) { |
1336 |
env->nip = (uint64_t)env->spr[SPR_BOOKE_DSRR0]; |
1337 |
} else
|
1338 |
#endif
|
1339 |
{ |
1340 |
env->nip = (uint32_t)env->spr[SPR_BOOKE_DSRR0]; |
1341 |
} |
1342 |
do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_DSRR1] & ~0x3FFF0000);
|
1343 |
#if defined (DEBUG_OP)
|
1344 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
1345 |
#endif
|
1346 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1347 |
} |
1348 |
|
1349 |
void do_rfmci (void) |
1350 |
{ |
1351 |
#if defined(TARGET_PPC64)
|
1352 |
if (env->spr[SPR_BOOKE_MCSRR1] & (1 << MSR_CM)) { |
1353 |
env->nip = (uint64_t)env->spr[SPR_BOOKE_MCSRR0]; |
1354 |
} else
|
1355 |
#endif
|
1356 |
{ |
1357 |
env->nip = (uint32_t)env->spr[SPR_BOOKE_MCSRR0]; |
1358 |
} |
1359 |
do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_MCSRR1] & ~0x3FFF0000);
|
1360 |
#if defined (DEBUG_OP)
|
1361 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
1362 |
#endif
|
1363 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1364 |
} |
1365 |
|
1366 |
void do_load_403_pb (int num) |
1367 |
{ |
1368 |
T0 = env->pb[num]; |
1369 |
} |
1370 |
|
1371 |
void do_store_403_pb (int num) |
1372 |
{ |
1373 |
if (likely(env->pb[num] != T0)) {
|
1374 |
env->pb[num] = T0; |
1375 |
/* Should be optimized */
|
1376 |
tlb_flush(env, 1);
|
1377 |
} |
1378 |
} |
1379 |
#endif
|
1380 |
|
1381 |
/* 440 specific */
|
1382 |
void do_440_dlmzb (void) |
1383 |
{ |
1384 |
target_ulong mask; |
1385 |
int i;
|
1386 |
|
1387 |
i = 1;
|
1388 |
for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
1389 |
if ((T0 & mask) == 0) |
1390 |
goto done;
|
1391 |
i++; |
1392 |
} |
1393 |
for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
1394 |
if ((T1 & mask) == 0) |
1395 |
break;
|
1396 |
i++; |
1397 |
} |
1398 |
done:
|
1399 |
T0 = i; |
1400 |
} |
1401 |
|
1402 |
#if defined(TARGET_PPCEMB)
|
1403 |
/* SPE extension helpers */
|
1404 |
/* Use a table to make this quicker */
|
1405 |
static uint8_t hbrev[16] = { |
1406 |
0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE, |
1407 |
0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF, |
1408 |
}; |
1409 |
|
1410 |
static inline uint8_t byte_reverse (uint8_t val) |
1411 |
{ |
1412 |
return hbrev[val >> 4] | (hbrev[val & 0xF] << 4); |
1413 |
} |
1414 |
|
1415 |
static inline uint32_t word_reverse (uint32_t val) |
1416 |
{ |
1417 |
return byte_reverse(val >> 24) | (byte_reverse(val >> 16) << 8) | |
1418 |
(byte_reverse(val >> 8) << 16) | (byte_reverse(val) << 24); |
1419 |
} |
1420 |
|
1421 |
#define MASKBITS 16 // Random value - to be fixed |
1422 |
void do_brinc (void) |
1423 |
{ |
1424 |
uint32_t a, b, d, mask; |
1425 |
|
1426 |
mask = (uint32_t)(-1UL) >> MASKBITS;
|
1427 |
b = T1_64 & mask; |
1428 |
a = T0_64 & mask; |
1429 |
d = word_reverse(1 + word_reverse(a | ~mask));
|
1430 |
T0_64 = (T0_64 & ~mask) | (d & mask); |
1431 |
} |
1432 |
|
1433 |
#define DO_SPE_OP2(name) \
|
1434 |
void do_ev##name (void) \ |
1435 |
{ \ |
1436 |
T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32, T1_64 >> 32) << 32) | \ |
1437 |
(uint64_t)_do_e##name(T0_64, T1_64); \ |
1438 |
} |
1439 |
|
1440 |
#define DO_SPE_OP1(name) \
|
1441 |
void do_ev##name (void) \ |
1442 |
{ \ |
1443 |
T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32) << 32) | \ |
1444 |
(uint64_t)_do_e##name(T0_64); \ |
1445 |
} |
1446 |
|
1447 |
/* Fixed-point vector arithmetic */
|
1448 |
static inline uint32_t _do_eabs (uint32_t val) |
1449 |
{ |
1450 |
if (val != 0x80000000) |
1451 |
val &= ~0x80000000;
|
1452 |
|
1453 |
return val;
|
1454 |
} |
1455 |
|
1456 |
static inline uint32_t _do_eaddw (uint32_t op1, uint32_t op2) |
1457 |
{ |
1458 |
return op1 + op2;
|
1459 |
} |
1460 |
|
1461 |
static inline int _do_ecntlsw (uint32_t val) |
1462 |
{ |
1463 |
if (val & 0x80000000) |
1464 |
return _do_cntlzw(~val);
|
1465 |
else
|
1466 |
return _do_cntlzw(val);
|
1467 |
} |
1468 |
|
1469 |
static inline int _do_ecntlzw (uint32_t val) |
1470 |
{ |
1471 |
return _do_cntlzw(val);
|
1472 |
} |
1473 |
|
1474 |
static inline uint32_t _do_eneg (uint32_t val) |
1475 |
{ |
1476 |
if (val != 0x80000000) |
1477 |
val ^= 0x80000000;
|
1478 |
|
1479 |
return val;
|
1480 |
} |
1481 |
|
1482 |
static inline uint32_t _do_erlw (uint32_t op1, uint32_t op2) |
1483 |
{ |
1484 |
return rotl32(op1, op2);
|
1485 |
} |
1486 |
|
1487 |
static inline uint32_t _do_erndw (uint32_t val) |
1488 |
{ |
1489 |
return (val + 0x000080000000) & 0xFFFF0000; |
1490 |
} |
1491 |
|
1492 |
static inline uint32_t _do_eslw (uint32_t op1, uint32_t op2) |
1493 |
{ |
1494 |
/* No error here: 6 bits are used */
|
1495 |
return op1 << (op2 & 0x3F); |
1496 |
} |
1497 |
|
1498 |
static inline int32_t _do_esrws (int32_t op1, uint32_t op2) |
1499 |
{ |
1500 |
/* No error here: 6 bits are used */
|
1501 |
return op1 >> (op2 & 0x3F); |
1502 |
} |
1503 |
|
1504 |
static inline uint32_t _do_esrwu (uint32_t op1, uint32_t op2) |
1505 |
{ |
1506 |
/* No error here: 6 bits are used */
|
1507 |
return op1 >> (op2 & 0x3F); |
1508 |
} |
1509 |
|
1510 |
static inline uint32_t _do_esubfw (uint32_t op1, uint32_t op2) |
1511 |
{ |
1512 |
return op2 - op1;
|
1513 |
} |
1514 |
|
1515 |
/* evabs */
|
1516 |
DO_SPE_OP1(abs); |
1517 |
/* evaddw */
|
1518 |
DO_SPE_OP2(addw); |
1519 |
/* evcntlsw */
|
1520 |
DO_SPE_OP1(cntlsw); |
1521 |
/* evcntlzw */
|
1522 |
DO_SPE_OP1(cntlzw); |
1523 |
/* evneg */
|
1524 |
DO_SPE_OP1(neg); |
1525 |
/* evrlw */
|
1526 |
DO_SPE_OP2(rlw); |
1527 |
/* evrnd */
|
1528 |
DO_SPE_OP1(rndw); |
1529 |
/* evslw */
|
1530 |
DO_SPE_OP2(slw); |
1531 |
/* evsrws */
|
1532 |
DO_SPE_OP2(srws); |
1533 |
/* evsrwu */
|
1534 |
DO_SPE_OP2(srwu); |
1535 |
/* evsubfw */
|
1536 |
DO_SPE_OP2(subfw); |
1537 |
|
1538 |
/* evsel is a little bit more complicated... */
|
1539 |
static inline uint32_t _do_esel (uint32_t op1, uint32_t op2, int n) |
1540 |
{ |
1541 |
if (n)
|
1542 |
return op1;
|
1543 |
else
|
1544 |
return op2;
|
1545 |
} |
1546 |
|
1547 |
void do_evsel (void) |
1548 |
{ |
1549 |
T0_64 = ((uint64_t)_do_esel(T0_64 >> 32, T1_64 >> 32, T0 >> 3) << 32) | |
1550 |
(uint64_t)_do_esel(T0_64, T1_64, (T0 >> 2) & 1); |
1551 |
} |
1552 |
|
1553 |
/* Fixed-point vector comparisons */
|
1554 |
#define DO_SPE_CMP(name) \
|
1555 |
void do_ev##name (void) \ |
1556 |
{ \ |
1557 |
T0 = _do_evcmp_merge((uint64_t)_do_e##name(T0_64 >> 32, \ |
1558 |
T1_64 >> 32) << 32, \ |
1559 |
_do_e##name(T0_64, T1_64)); \ |
1560 |
} |
1561 |
|
1562 |
static inline uint32_t _do_evcmp_merge (int t0, int t1) |
1563 |
{ |
1564 |
return (t0 << 3) | (t1 << 2) | ((t0 | t1) << 1) | (t0 & t1); |
1565 |
} |
1566 |
static inline int _do_ecmpeq (uint32_t op1, uint32_t op2) |
1567 |
{ |
1568 |
return op1 == op2 ? 1 : 0; |
1569 |
} |
1570 |
|
1571 |
static inline int _do_ecmpgts (int32_t op1, int32_t op2) |
1572 |
{ |
1573 |
return op1 > op2 ? 1 : 0; |
1574 |
} |
1575 |
|
1576 |
static inline int _do_ecmpgtu (uint32_t op1, uint32_t op2) |
1577 |
{ |
1578 |
return op1 > op2 ? 1 : 0; |
1579 |
} |
1580 |
|
1581 |
static inline int _do_ecmplts (int32_t op1, int32_t op2) |
1582 |
{ |
1583 |
return op1 < op2 ? 1 : 0; |
1584 |
} |
1585 |
|
1586 |
static inline int _do_ecmpltu (uint32_t op1, uint32_t op2) |
1587 |
{ |
1588 |
return op1 < op2 ? 1 : 0; |
1589 |
} |
1590 |
|
1591 |
/* evcmpeq */
|
1592 |
DO_SPE_CMP(cmpeq); |
1593 |
/* evcmpgts */
|
1594 |
DO_SPE_CMP(cmpgts); |
1595 |
/* evcmpgtu */
|
1596 |
DO_SPE_CMP(cmpgtu); |
1597 |
/* evcmplts */
|
1598 |
DO_SPE_CMP(cmplts); |
1599 |
/* evcmpltu */
|
1600 |
DO_SPE_CMP(cmpltu); |
1601 |
|
1602 |
/* Single precision floating-point conversions from/to integer */
|
1603 |
static inline uint32_t _do_efscfsi (int32_t val) |
1604 |
{ |
1605 |
union {
|
1606 |
uint32_t u; |
1607 |
float32 f; |
1608 |
} u; |
1609 |
|
1610 |
u.f = int32_to_float32(val, &env->spe_status); |
1611 |
|
1612 |
return u.u;
|
1613 |
} |
1614 |
|
1615 |
static inline uint32_t _do_efscfui (uint32_t val) |
1616 |
{ |
1617 |
union {
|
1618 |
uint32_t u; |
1619 |
float32 f; |
1620 |
} u; |
1621 |
|
1622 |
u.f = uint32_to_float32(val, &env->spe_status); |
1623 |
|
1624 |
return u.u;
|
1625 |
} |
1626 |
|
1627 |
static inline int32_t _do_efsctsi (uint32_t val) |
1628 |
{ |
1629 |
union {
|
1630 |
int32_t u; |
1631 |
float32 f; |
1632 |
} u; |
1633 |
|
1634 |
u.u = val; |
1635 |
/* NaN are not treated the same way IEEE 754 does */
|
1636 |
if (unlikely(isnan(u.f)))
|
1637 |
return 0; |
1638 |
|
1639 |
return float32_to_int32(u.f, &env->spe_status);
|
1640 |
} |
1641 |
|
1642 |
static inline uint32_t _do_efsctui (uint32_t val) |
1643 |
{ |
1644 |
union {
|
1645 |
int32_t u; |
1646 |
float32 f; |
1647 |
} u; |
1648 |
|
1649 |
u.u = val; |
1650 |
/* NaN are not treated the same way IEEE 754 does */
|
1651 |
if (unlikely(isnan(u.f)))
|
1652 |
return 0; |
1653 |
|
1654 |
return float32_to_uint32(u.f, &env->spe_status);
|
1655 |
} |
1656 |
|
1657 |
static inline int32_t _do_efsctsiz (uint32_t val) |
1658 |
{ |
1659 |
union {
|
1660 |
int32_t u; |
1661 |
float32 f; |
1662 |
} u; |
1663 |
|
1664 |
u.u = val; |
1665 |
/* NaN are not treated the same way IEEE 754 does */
|
1666 |
if (unlikely(isnan(u.f)))
|
1667 |
return 0; |
1668 |
|
1669 |
return float32_to_int32_round_to_zero(u.f, &env->spe_status);
|
1670 |
} |
1671 |
|
1672 |
static inline uint32_t _do_efsctuiz (uint32_t val) |
1673 |
{ |
1674 |
union {
|
1675 |
int32_t u; |
1676 |
float32 f; |
1677 |
} u; |
1678 |
|
1679 |
u.u = val; |
1680 |
/* NaN are not treated the same way IEEE 754 does */
|
1681 |
if (unlikely(isnan(u.f)))
|
1682 |
return 0; |
1683 |
|
1684 |
return float32_to_uint32_round_to_zero(u.f, &env->spe_status);
|
1685 |
} |
1686 |
|
1687 |
void do_efscfsi (void) |
1688 |
{ |
1689 |
T0_64 = _do_efscfsi(T0_64); |
1690 |
} |
1691 |
|
1692 |
void do_efscfui (void) |
1693 |
{ |
1694 |
T0_64 = _do_efscfui(T0_64); |
1695 |
} |
1696 |
|
1697 |
void do_efsctsi (void) |
1698 |
{ |
1699 |
T0_64 = _do_efsctsi(T0_64); |
1700 |
} |
1701 |
|
1702 |
void do_efsctui (void) |
1703 |
{ |
1704 |
T0_64 = _do_efsctui(T0_64); |
1705 |
} |
1706 |
|
1707 |
void do_efsctsiz (void) |
1708 |
{ |
1709 |
T0_64 = _do_efsctsiz(T0_64); |
1710 |
} |
1711 |
|
1712 |
void do_efsctuiz (void) |
1713 |
{ |
1714 |
T0_64 = _do_efsctuiz(T0_64); |
1715 |
} |
1716 |
|
1717 |
/* Single precision floating-point conversion to/from fractional */
|
1718 |
static inline uint32_t _do_efscfsf (uint32_t val) |
1719 |
{ |
1720 |
union {
|
1721 |
uint32_t u; |
1722 |
float32 f; |
1723 |
} u; |
1724 |
float32 tmp; |
1725 |
|
1726 |
u.f = int32_to_float32(val, &env->spe_status); |
1727 |
tmp = int64_to_float32(1ULL << 32, &env->spe_status); |
1728 |
u.f = float32_div(u.f, tmp, &env->spe_status); |
1729 |
|
1730 |
return u.u;
|
1731 |
} |
1732 |
|
1733 |
static inline uint32_t _do_efscfuf (uint32_t val) |
1734 |
{ |
1735 |
union {
|
1736 |
uint32_t u; |
1737 |
float32 f; |
1738 |
} u; |
1739 |
float32 tmp; |
1740 |
|
1741 |
u.f = uint32_to_float32(val, &env->spe_status); |
1742 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1743 |
u.f = float32_div(u.f, tmp, &env->spe_status); |
1744 |
|
1745 |
return u.u;
|
1746 |
} |
1747 |
|
1748 |
static inline int32_t _do_efsctsf (uint32_t val) |
1749 |
{ |
1750 |
union {
|
1751 |
int32_t u; |
1752 |
float32 f; |
1753 |
} u; |
1754 |
float32 tmp; |
1755 |
|
1756 |
u.u = val; |
1757 |
/* NaN are not treated the same way IEEE 754 does */
|
1758 |
if (unlikely(isnan(u.f)))
|
1759 |
return 0; |
1760 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1761 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1762 |
|
1763 |
return float32_to_int32(u.f, &env->spe_status);
|
1764 |
} |
1765 |
|
1766 |
static inline uint32_t _do_efsctuf (uint32_t val) |
1767 |
{ |
1768 |
union {
|
1769 |
int32_t u; |
1770 |
float32 f; |
1771 |
} u; |
1772 |
float32 tmp; |
1773 |
|
1774 |
u.u = val; |
1775 |
/* NaN are not treated the same way IEEE 754 does */
|
1776 |
if (unlikely(isnan(u.f)))
|
1777 |
return 0; |
1778 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1779 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1780 |
|
1781 |
return float32_to_uint32(u.f, &env->spe_status);
|
1782 |
} |
1783 |
|
1784 |
static inline int32_t _do_efsctsfz (uint32_t val) |
1785 |
{ |
1786 |
union {
|
1787 |
int32_t u; |
1788 |
float32 f; |
1789 |
} u; |
1790 |
float32 tmp; |
1791 |
|
1792 |
u.u = val; |
1793 |
/* NaN are not treated the same way IEEE 754 does */
|
1794 |
if (unlikely(isnan(u.f)))
|
1795 |
return 0; |
1796 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1797 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1798 |
|
1799 |
return float32_to_int32_round_to_zero(u.f, &env->spe_status);
|
1800 |
} |
1801 |
|
1802 |
static inline uint32_t _do_efsctufz (uint32_t val) |
1803 |
{ |
1804 |
union {
|
1805 |
int32_t u; |
1806 |
float32 f; |
1807 |
} u; |
1808 |
float32 tmp; |
1809 |
|
1810 |
u.u = val; |
1811 |
/* NaN are not treated the same way IEEE 754 does */
|
1812 |
if (unlikely(isnan(u.f)))
|
1813 |
return 0; |
1814 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1815 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1816 |
|
1817 |
return float32_to_uint32_round_to_zero(u.f, &env->spe_status);
|
1818 |
} |
1819 |
|
1820 |
void do_efscfsf (void) |
1821 |
{ |
1822 |
T0_64 = _do_efscfsf(T0_64); |
1823 |
} |
1824 |
|
1825 |
void do_efscfuf (void) |
1826 |
{ |
1827 |
T0_64 = _do_efscfuf(T0_64); |
1828 |
} |
1829 |
|
1830 |
void do_efsctsf (void) |
1831 |
{ |
1832 |
T0_64 = _do_efsctsf(T0_64); |
1833 |
} |
1834 |
|
1835 |
void do_efsctuf (void) |
1836 |
{ |
1837 |
T0_64 = _do_efsctuf(T0_64); |
1838 |
} |
1839 |
|
1840 |
void do_efsctsfz (void) |
1841 |
{ |
1842 |
T0_64 = _do_efsctsfz(T0_64); |
1843 |
} |
1844 |
|
1845 |
void do_efsctufz (void) |
1846 |
{ |
1847 |
T0_64 = _do_efsctufz(T0_64); |
1848 |
} |
1849 |
|
1850 |
/* Double precision floating point helpers */
|
1851 |
static inline int _do_efdcmplt (uint64_t op1, uint64_t op2) |
1852 |
{ |
1853 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1854 |
return _do_efdtstlt(op1, op2);
|
1855 |
} |
1856 |
|
1857 |
static inline int _do_efdcmpgt (uint64_t op1, uint64_t op2) |
1858 |
{ |
1859 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1860 |
return _do_efdtstgt(op1, op2);
|
1861 |
} |
1862 |
|
1863 |
static inline int _do_efdcmpeq (uint64_t op1, uint64_t op2) |
1864 |
{ |
1865 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1866 |
return _do_efdtsteq(op1, op2);
|
1867 |
} |
1868 |
|
1869 |
void do_efdcmplt (void) |
1870 |
{ |
1871 |
T0 = _do_efdcmplt(T0_64, T1_64); |
1872 |
} |
1873 |
|
1874 |
void do_efdcmpgt (void) |
1875 |
{ |
1876 |
T0 = _do_efdcmpgt(T0_64, T1_64); |
1877 |
} |
1878 |
|
1879 |
void do_efdcmpeq (void) |
1880 |
{ |
1881 |
T0 = _do_efdcmpeq(T0_64, T1_64); |
1882 |
} |
1883 |
|
1884 |
/* Double precision floating-point conversion to/from integer */
|
1885 |
static inline uint64_t _do_efdcfsi (int64_t val) |
1886 |
{ |
1887 |
union {
|
1888 |
uint64_t u; |
1889 |
float64 f; |
1890 |
} u; |
1891 |
|
1892 |
u.f = int64_to_float64(val, &env->spe_status); |
1893 |
|
1894 |
return u.u;
|
1895 |
} |
1896 |
|
1897 |
static inline uint64_t _do_efdcfui (uint64_t val) |
1898 |
{ |
1899 |
union {
|
1900 |
uint64_t u; |
1901 |
float64 f; |
1902 |
} u; |
1903 |
|
1904 |
u.f = uint64_to_float64(val, &env->spe_status); |
1905 |
|
1906 |
return u.u;
|
1907 |
} |
1908 |
|
1909 |
static inline int64_t _do_efdctsi (uint64_t val) |
1910 |
{ |
1911 |
union {
|
1912 |
int64_t u; |
1913 |
float64 f; |
1914 |
} u; |
1915 |
|
1916 |
u.u = val; |
1917 |
/* NaN are not treated the same way IEEE 754 does */
|
1918 |
if (unlikely(isnan(u.f)))
|
1919 |
return 0; |
1920 |
|
1921 |
return float64_to_int64(u.f, &env->spe_status);
|
1922 |
} |
1923 |
|
1924 |
static inline uint64_t _do_efdctui (uint64_t val) |
1925 |
{ |
1926 |
union {
|
1927 |
int64_t u; |
1928 |
float64 f; |
1929 |
} u; |
1930 |
|
1931 |
u.u = val; |
1932 |
/* NaN are not treated the same way IEEE 754 does */
|
1933 |
if (unlikely(isnan(u.f)))
|
1934 |
return 0; |
1935 |
|
1936 |
return float64_to_uint64(u.f, &env->spe_status);
|
1937 |
} |
1938 |
|
1939 |
static inline int64_t _do_efdctsiz (uint64_t val) |
1940 |
{ |
1941 |
union {
|
1942 |
int64_t u; |
1943 |
float64 f; |
1944 |
} u; |
1945 |
|
1946 |
u.u = val; |
1947 |
/* NaN are not treated the same way IEEE 754 does */
|
1948 |
if (unlikely(isnan(u.f)))
|
1949 |
return 0; |
1950 |
|
1951 |
return float64_to_int64_round_to_zero(u.f, &env->spe_status);
|
1952 |
} |
1953 |
|
1954 |
static inline uint64_t _do_efdctuiz (uint64_t val) |
1955 |
{ |
1956 |
union {
|
1957 |
int64_t u; |
1958 |
float64 f; |
1959 |
} u; |
1960 |
|
1961 |
u.u = val; |
1962 |
/* NaN are not treated the same way IEEE 754 does */
|
1963 |
if (unlikely(isnan(u.f)))
|
1964 |
return 0; |
1965 |
|
1966 |
return float64_to_uint64_round_to_zero(u.f, &env->spe_status);
|
1967 |
} |
1968 |
|
1969 |
void do_efdcfsi (void) |
1970 |
{ |
1971 |
T0_64 = _do_efdcfsi(T0_64); |
1972 |
} |
1973 |
|
1974 |
void do_efdcfui (void) |
1975 |
{ |
1976 |
T0_64 = _do_efdcfui(T0_64); |
1977 |
} |
1978 |
|
1979 |
void do_efdctsi (void) |
1980 |
{ |
1981 |
T0_64 = _do_efdctsi(T0_64); |
1982 |
} |
1983 |
|
1984 |
void do_efdctui (void) |
1985 |
{ |
1986 |
T0_64 = _do_efdctui(T0_64); |
1987 |
} |
1988 |
|
1989 |
void do_efdctsiz (void) |
1990 |
{ |
1991 |
T0_64 = _do_efdctsiz(T0_64); |
1992 |
} |
1993 |
|
1994 |
void do_efdctuiz (void) |
1995 |
{ |
1996 |
T0_64 = _do_efdctuiz(T0_64); |
1997 |
} |
1998 |
|
1999 |
/* Double precision floating-point conversion to/from fractional */
|
2000 |
static inline uint64_t _do_efdcfsf (int64_t val) |
2001 |
{ |
2002 |
union {
|
2003 |
uint64_t u; |
2004 |
float64 f; |
2005 |
} u; |
2006 |
float64 tmp; |
2007 |
|
2008 |
u.f = int32_to_float64(val, &env->spe_status); |
2009 |
tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
2010 |
u.f = float64_div(u.f, tmp, &env->spe_status); |
2011 |
|
2012 |
return u.u;
|
2013 |
} |
2014 |
|
2015 |
static inline uint64_t _do_efdcfuf (uint64_t val) |
2016 |
{ |
2017 |
union {
|
2018 |
uint64_t u; |
2019 |
float64 f; |
2020 |
} u; |
2021 |
float64 tmp; |
2022 |
|
2023 |
u.f = uint32_to_float64(val, &env->spe_status); |
2024 |
tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
2025 |
u.f = float64_div(u.f, tmp, &env->spe_status); |
2026 |
|
2027 |
return u.u;
|
2028 |
} |
2029 |
|
2030 |
static inline int64_t _do_efdctsf (uint64_t val) |
2031 |
{ |
2032 |
union {
|
2033 |
int64_t u; |
2034 |
float64 f; |
2035 |
} u; |
2036 |
float64 tmp; |
2037 |
|
2038 |
u.u = val; |
2039 |
/* NaN are not treated the same way IEEE 754 does */
|
2040 |
if (unlikely(isnan(u.f)))
|
2041 |
return 0; |
2042 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
2043 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
2044 |
|
2045 |
return float64_to_int32(u.f, &env->spe_status);
|
2046 |
} |
2047 |
|
2048 |
static inline uint64_t _do_efdctuf (uint64_t val) |
2049 |
{ |
2050 |
union {
|
2051 |
int64_t u; |
2052 |
float64 f; |
2053 |
} u; |
2054 |
float64 tmp; |
2055 |
|
2056 |
u.u = val; |
2057 |
/* NaN are not treated the same way IEEE 754 does */
|
2058 |
if (unlikely(isnan(u.f)))
|
2059 |
return 0; |
2060 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
2061 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
2062 |
|
2063 |
return float64_to_uint32(u.f, &env->spe_status);
|
2064 |
} |
2065 |
|
2066 |
static inline int64_t _do_efdctsfz (uint64_t val) |
2067 |
{ |
2068 |
union {
|
2069 |
int64_t u; |
2070 |
float64 f; |
2071 |
} u; |
2072 |
float64 tmp; |
2073 |
|
2074 |
u.u = val; |
2075 |
/* NaN are not treated the same way IEEE 754 does */
|
2076 |
if (unlikely(isnan(u.f)))
|
2077 |
return 0; |
2078 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
2079 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
2080 |
|
2081 |
return float64_to_int32_round_to_zero(u.f, &env->spe_status);
|
2082 |
} |
2083 |
|
2084 |
static inline uint64_t _do_efdctufz (uint64_t val) |
2085 |
{ |
2086 |
union {
|
2087 |
int64_t u; |
2088 |
float64 f; |
2089 |
} u; |
2090 |
float64 tmp; |
2091 |
|
2092 |
u.u = val; |
2093 |
/* NaN are not treated the same way IEEE 754 does */
|
2094 |
if (unlikely(isnan(u.f)))
|
2095 |
return 0; |
2096 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
2097 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
2098 |
|
2099 |
return float64_to_uint32_round_to_zero(u.f, &env->spe_status);
|
2100 |
} |
2101 |
|
2102 |
void do_efdcfsf (void) |
2103 |
{ |
2104 |
T0_64 = _do_efdcfsf(T0_64); |
2105 |
} |
2106 |
|
2107 |
void do_efdcfuf (void) |
2108 |
{ |
2109 |
T0_64 = _do_efdcfuf(T0_64); |
2110 |
} |
2111 |
|
2112 |
void do_efdctsf (void) |
2113 |
{ |
2114 |
T0_64 = _do_efdctsf(T0_64); |
2115 |
} |
2116 |
|
2117 |
void do_efdctuf (void) |
2118 |
{ |
2119 |
T0_64 = _do_efdctuf(T0_64); |
2120 |
} |
2121 |
|
2122 |
void do_efdctsfz (void) |
2123 |
{ |
2124 |
T0_64 = _do_efdctsfz(T0_64); |
2125 |
} |
2126 |
|
2127 |
void do_efdctufz (void) |
2128 |
{ |
2129 |
T0_64 = _do_efdctufz(T0_64); |
2130 |
} |
2131 |
|
2132 |
/* Floating point conversion between single and double precision */
|
2133 |
static inline uint32_t _do_efscfd (uint64_t val) |
2134 |
{ |
2135 |
union {
|
2136 |
uint64_t u; |
2137 |
float64 f; |
2138 |
} u1; |
2139 |
union {
|
2140 |
uint32_t u; |
2141 |
float32 f; |
2142 |
} u2; |
2143 |
|
2144 |
u1.u = val; |
2145 |
u2.f = float64_to_float32(u1.f, &env->spe_status); |
2146 |
|
2147 |
return u2.u;
|
2148 |
} |
2149 |
|
2150 |
static inline uint64_t _do_efdcfs (uint32_t val) |
2151 |
{ |
2152 |
union {
|
2153 |
uint64_t u; |
2154 |
float64 f; |
2155 |
} u2; |
2156 |
union {
|
2157 |
uint32_t u; |
2158 |
float32 f; |
2159 |
} u1; |
2160 |
|
2161 |
u1.u = val; |
2162 |
u2.f = float32_to_float64(u1.f, &env->spe_status); |
2163 |
|
2164 |
return u2.u;
|
2165 |
} |
2166 |
|
2167 |
void do_efscfd (void) |
2168 |
{ |
2169 |
T0_64 = _do_efscfd(T0_64); |
2170 |
} |
2171 |
|
2172 |
void do_efdcfs (void) |
2173 |
{ |
2174 |
T0_64 = _do_efdcfs(T0_64); |
2175 |
} |
2176 |
|
2177 |
/* Single precision fixed-point vector arithmetic */
|
2178 |
/* evfsabs */
|
2179 |
DO_SPE_OP1(fsabs); |
2180 |
/* evfsnabs */
|
2181 |
DO_SPE_OP1(fsnabs); |
2182 |
/* evfsneg */
|
2183 |
DO_SPE_OP1(fsneg); |
2184 |
/* evfsadd */
|
2185 |
DO_SPE_OP2(fsadd); |
2186 |
/* evfssub */
|
2187 |
DO_SPE_OP2(fssub); |
2188 |
/* evfsmul */
|
2189 |
DO_SPE_OP2(fsmul); |
2190 |
/* evfsdiv */
|
2191 |
DO_SPE_OP2(fsdiv); |
2192 |
|
2193 |
/* Single-precision floating-point comparisons */
|
2194 |
static inline int _do_efscmplt (uint32_t op1, uint32_t op2) |
2195 |
{ |
2196 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2197 |
return _do_efststlt(op1, op2);
|
2198 |
} |
2199 |
|
2200 |
static inline int _do_efscmpgt (uint32_t op1, uint32_t op2) |
2201 |
{ |
2202 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2203 |
return _do_efststgt(op1, op2);
|
2204 |
} |
2205 |
|
2206 |
static inline int _do_efscmpeq (uint32_t op1, uint32_t op2) |
2207 |
{ |
2208 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2209 |
return _do_efststeq(op1, op2);
|
2210 |
} |
2211 |
|
2212 |
void do_efscmplt (void) |
2213 |
{ |
2214 |
T0 = _do_efscmplt(T0_64, T1_64); |
2215 |
} |
2216 |
|
2217 |
void do_efscmpgt (void) |
2218 |
{ |
2219 |
T0 = _do_efscmpgt(T0_64, T1_64); |
2220 |
} |
2221 |
|
2222 |
void do_efscmpeq (void) |
2223 |
{ |
2224 |
T0 = _do_efscmpeq(T0_64, T1_64); |
2225 |
} |
2226 |
|
2227 |
/* Single-precision floating-point vector comparisons */
|
2228 |
/* evfscmplt */
|
2229 |
DO_SPE_CMP(fscmplt); |
2230 |
/* evfscmpgt */
|
2231 |
DO_SPE_CMP(fscmpgt); |
2232 |
/* evfscmpeq */
|
2233 |
DO_SPE_CMP(fscmpeq); |
2234 |
/* evfststlt */
|
2235 |
DO_SPE_CMP(fststlt); |
2236 |
/* evfststgt */
|
2237 |
DO_SPE_CMP(fststgt); |
2238 |
/* evfststeq */
|
2239 |
DO_SPE_CMP(fststeq); |
2240 |
|
2241 |
/* Single-precision floating-point vector conversions */
|
2242 |
/* evfscfsi */
|
2243 |
DO_SPE_OP1(fscfsi); |
2244 |
/* evfscfui */
|
2245 |
DO_SPE_OP1(fscfui); |
2246 |
/* evfscfuf */
|
2247 |
DO_SPE_OP1(fscfuf); |
2248 |
/* evfscfsf */
|
2249 |
DO_SPE_OP1(fscfsf); |
2250 |
/* evfsctsi */
|
2251 |
DO_SPE_OP1(fsctsi); |
2252 |
/* evfsctui */
|
2253 |
DO_SPE_OP1(fsctui); |
2254 |
/* evfsctsiz */
|
2255 |
DO_SPE_OP1(fsctsiz); |
2256 |
/* evfsctuiz */
|
2257 |
DO_SPE_OP1(fsctuiz); |
2258 |
/* evfsctsf */
|
2259 |
DO_SPE_OP1(fsctsf); |
2260 |
/* evfsctuf */
|
2261 |
DO_SPE_OP1(fsctuf); |
2262 |
#endif /* defined(TARGET_PPCEMB) */ |
2263 |
|
2264 |
/*****************************************************************************/
|
2265 |
/* Softmmu support */
|
2266 |
#if !defined (CONFIG_USER_ONLY)
|
2267 |
|
2268 |
#define MMUSUFFIX _mmu
|
2269 |
#define GETPC() (__builtin_return_address(0)) |
2270 |
|
2271 |
#define SHIFT 0 |
2272 |
#include "softmmu_template.h" |
2273 |
|
2274 |
#define SHIFT 1 |
2275 |
#include "softmmu_template.h" |
2276 |
|
2277 |
#define SHIFT 2 |
2278 |
#include "softmmu_template.h" |
2279 |
|
2280 |
#define SHIFT 3 |
2281 |
#include "softmmu_template.h" |
2282 |
|
2283 |
/* try to fill the TLB and return an exception if error. If retaddr is
|
2284 |
NULL, it means that the function was called in C code (i.e. not
|
2285 |
from generated code or from helper.c) */
|
2286 |
/* XXX: fix it to restore all registers */
|
2287 |
void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr) |
2288 |
{ |
2289 |
TranslationBlock *tb; |
2290 |
CPUState *saved_env; |
2291 |
target_phys_addr_t pc; |
2292 |
int ret;
|
2293 |
|
2294 |
/* XXX: hack to restore env in all cases, even if not called from
|
2295 |
generated code */
|
2296 |
saved_env = env; |
2297 |
env = cpu_single_env; |
2298 |
ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, is_user, 1);
|
2299 |
if (unlikely(ret != 0)) { |
2300 |
if (likely(retaddr)) {
|
2301 |
/* now we have a real cpu fault */
|
2302 |
pc = (target_phys_addr_t)(unsigned long)retaddr; |
2303 |
tb = tb_find_pc(pc); |
2304 |
if (likely(tb)) {
|
2305 |
/* the PC is inside the translated code. It means that we have
|
2306 |
a virtual CPU fault */
|
2307 |
cpu_restore_state(tb, env, pc, NULL);
|
2308 |
} |
2309 |
} |
2310 |
do_raise_exception_err(env->exception_index, env->error_code); |
2311 |
} |
2312 |
env = saved_env; |
2313 |
} |
2314 |
|
2315 |
/* TLB invalidation helpers */
|
2316 |
void do_tlbia (void) |
2317 |
{ |
2318 |
ppc_tlb_invalidate_all(env); |
2319 |
} |
2320 |
|
2321 |
void do_tlbie (void) |
2322 |
{ |
2323 |
T0 = (uint32_t)T0; |
2324 |
#if !defined(FLUSH_ALL_TLBS)
|
2325 |
/* XXX: Remove thoses tests */
|
2326 |
if (unlikely(env->mmu_model == POWERPC_MMU_SOFT_6xx)) {
|
2327 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0);
|
2328 |
if (env->id_tlbs == 1) |
2329 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 1);
|
2330 |
} else if (unlikely(env->mmu_model == POWERPC_MMU_SOFT_4xx)) { |
2331 |
ppc4xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, |
2332 |
env->spr[SPR_40x_PID]); |
2333 |
} else {
|
2334 |
/* tlbie invalidate TLBs for all segments */
|
2335 |
T0 &= TARGET_PAGE_MASK; |
2336 |
T0 &= ~((target_ulong)-1 << 28); |
2337 |
/* XXX: this case should be optimized,
|
2338 |
* giving a mask to tlb_flush_page
|
2339 |
*/
|
2340 |
tlb_flush_page(env, T0 | (0x0 << 28)); |
2341 |
tlb_flush_page(env, T0 | (0x1 << 28)); |
2342 |
tlb_flush_page(env, T0 | (0x2 << 28)); |
2343 |
tlb_flush_page(env, T0 | (0x3 << 28)); |
2344 |
tlb_flush_page(env, T0 | (0x4 << 28)); |
2345 |
tlb_flush_page(env, T0 | (0x5 << 28)); |
2346 |
tlb_flush_page(env, T0 | (0x6 << 28)); |
2347 |
tlb_flush_page(env, T0 | (0x7 << 28)); |
2348 |
tlb_flush_page(env, T0 | (0x8 << 28)); |
2349 |
tlb_flush_page(env, T0 | (0x9 << 28)); |
2350 |
tlb_flush_page(env, T0 | (0xA << 28)); |
2351 |
tlb_flush_page(env, T0 | (0xB << 28)); |
2352 |
tlb_flush_page(env, T0 | (0xC << 28)); |
2353 |
tlb_flush_page(env, T0 | (0xD << 28)); |
2354 |
tlb_flush_page(env, T0 | (0xE << 28)); |
2355 |
tlb_flush_page(env, T0 | (0xF << 28)); |
2356 |
} |
2357 |
#else
|
2358 |
do_tlbia(); |
2359 |
#endif
|
2360 |
} |
2361 |
|
2362 |
#if defined(TARGET_PPC64)
|
2363 |
void do_tlbie_64 (void) |
2364 |
{ |
2365 |
T0 = (uint64_t)T0; |
2366 |
#if !defined(FLUSH_ALL_TLBS)
|
2367 |
if (unlikely(env->mmu_model == POWERPC_MMU_SOFT_6xx)) {
|
2368 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0);
|
2369 |
if (env->id_tlbs == 1) |
2370 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 1);
|
2371 |
} else if (unlikely(env->mmu_model == POWERPC_MMU_SOFT_4xx)) { |
2372 |
/* XXX: TODO */
|
2373 |
#if 0
|
2374 |
ppcbooke_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK,
|
2375 |
env->spr[SPR_BOOKE_PID]);
|
2376 |
#endif
|
2377 |
} else {
|
2378 |
/* tlbie invalidate TLBs for all segments
|
2379 |
* As we have 2^36 segments, invalidate all qemu TLBs
|
2380 |
*/
|
2381 |
#if 0
|
2382 |
T0 &= TARGET_PAGE_MASK;
|
2383 |
T0 &= ~((target_ulong)-1 << 28);
|
2384 |
/* XXX: this case should be optimized,
|
2385 |
* giving a mask to tlb_flush_page
|
2386 |
*/
|
2387 |
tlb_flush_page(env, T0 | (0x0 << 28));
|
2388 |
tlb_flush_page(env, T0 | (0x1 << 28));
|
2389 |
tlb_flush_page(env, T0 | (0x2 << 28));
|
2390 |
tlb_flush_page(env, T0 | (0x3 << 28));
|
2391 |
tlb_flush_page(env, T0 | (0x4 << 28));
|
2392 |
tlb_flush_page(env, T0 | (0x5 << 28));
|
2393 |
tlb_flush_page(env, T0 | (0x6 << 28));
|
2394 |
tlb_flush_page(env, T0 | (0x7 << 28));
|
2395 |
tlb_flush_page(env, T0 | (0x8 << 28));
|
2396 |
tlb_flush_page(env, T0 | (0x9 << 28));
|
2397 |
tlb_flush_page(env, T0 | (0xA << 28));
|
2398 |
tlb_flush_page(env, T0 | (0xB << 28));
|
2399 |
tlb_flush_page(env, T0 | (0xC << 28));
|
2400 |
tlb_flush_page(env, T0 | (0xD << 28));
|
2401 |
tlb_flush_page(env, T0 | (0xE << 28));
|
2402 |
tlb_flush_page(env, T0 | (0xF << 28));
|
2403 |
#else
|
2404 |
tlb_flush(env, 1);
|
2405 |
#endif
|
2406 |
} |
2407 |
#else
|
2408 |
do_tlbia(); |
2409 |
#endif
|
2410 |
} |
2411 |
#endif
|
2412 |
|
2413 |
#if defined(TARGET_PPC64)
|
2414 |
void do_slbia (void) |
2415 |
{ |
2416 |
/* XXX: TODO */
|
2417 |
tlb_flush(env, 1);
|
2418 |
} |
2419 |
|
2420 |
void do_slbie (void) |
2421 |
{ |
2422 |
/* XXX: TODO */
|
2423 |
tlb_flush(env, 1);
|
2424 |
} |
2425 |
#endif
|
2426 |
|
2427 |
/* Software driven TLBs management */
|
2428 |
/* PowerPC 602/603 software TLB load instructions helpers */
|
2429 |
void do_load_6xx_tlb (int is_code) |
2430 |
{ |
2431 |
target_ulong RPN, CMP, EPN; |
2432 |
int way;
|
2433 |
|
2434 |
RPN = env->spr[SPR_RPA]; |
2435 |
if (is_code) {
|
2436 |
CMP = env->spr[SPR_ICMP]; |
2437 |
EPN = env->spr[SPR_IMISS]; |
2438 |
} else {
|
2439 |
CMP = env->spr[SPR_DCMP]; |
2440 |
EPN = env->spr[SPR_DMISS]; |
2441 |
} |
2442 |
way = (env->spr[SPR_SRR1] >> 17) & 1; |
2443 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2444 |
if (loglevel != 0) { |
2445 |
fprintf(logfile, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n",
|
2446 |
__func__, (unsigned long)T0, (unsigned long)EPN, |
2447 |
(unsigned long)CMP, (unsigned long)RPN, way); |
2448 |
} |
2449 |
#endif
|
2450 |
/* Store this TLB */
|
2451 |
ppc6xx_tlb_store(env, (uint32_t)(T0 & TARGET_PAGE_MASK), |
2452 |
way, is_code, CMP, RPN); |
2453 |
} |
2454 |
|
2455 |
static target_ulong booke_tlb_to_page_size (int size) |
2456 |
{ |
2457 |
return 1024 << (2 * size); |
2458 |
} |
2459 |
|
2460 |
static int booke_page_size_to_tlb (target_ulong page_size) |
2461 |
{ |
2462 |
int size;
|
2463 |
|
2464 |
switch (page_size) {
|
2465 |
case 0x00000400UL: |
2466 |
size = 0x0;
|
2467 |
break;
|
2468 |
case 0x00001000UL: |
2469 |
size = 0x1;
|
2470 |
break;
|
2471 |
case 0x00004000UL: |
2472 |
size = 0x2;
|
2473 |
break;
|
2474 |
case 0x00010000UL: |
2475 |
size = 0x3;
|
2476 |
break;
|
2477 |
case 0x00040000UL: |
2478 |
size = 0x4;
|
2479 |
break;
|
2480 |
case 0x00100000UL: |
2481 |
size = 0x5;
|
2482 |
break;
|
2483 |
case 0x00400000UL: |
2484 |
size = 0x6;
|
2485 |
break;
|
2486 |
case 0x01000000UL: |
2487 |
size = 0x7;
|
2488 |
break;
|
2489 |
case 0x04000000UL: |
2490 |
size = 0x8;
|
2491 |
break;
|
2492 |
case 0x10000000UL: |
2493 |
size = 0x9;
|
2494 |
break;
|
2495 |
case 0x40000000UL: |
2496 |
size = 0xA;
|
2497 |
break;
|
2498 |
#if defined (TARGET_PPC64)
|
2499 |
case 0x000100000000ULL: |
2500 |
size = 0xB;
|
2501 |
break;
|
2502 |
case 0x000400000000ULL: |
2503 |
size = 0xC;
|
2504 |
break;
|
2505 |
case 0x001000000000ULL: |
2506 |
size = 0xD;
|
2507 |
break;
|
2508 |
case 0x004000000000ULL: |
2509 |
size = 0xE;
|
2510 |
break;
|
2511 |
case 0x010000000000ULL: |
2512 |
size = 0xF;
|
2513 |
break;
|
2514 |
#endif
|
2515 |
default:
|
2516 |
size = -1;
|
2517 |
break;
|
2518 |
} |
2519 |
|
2520 |
return size;
|
2521 |
} |
2522 |
|
2523 |
/* Helpers for 4xx TLB management */
|
2524 |
void do_4xx_tlbre_lo (void) |
2525 |
{ |
2526 |
ppcemb_tlb_t *tlb; |
2527 |
int size;
|
2528 |
|
2529 |
T0 &= 0x3F;
|
2530 |
tlb = &env->tlb[T0].tlbe; |
2531 |
T0 = tlb->EPN; |
2532 |
if (tlb->prot & PAGE_VALID)
|
2533 |
T0 |= 0x400;
|
2534 |
size = booke_page_size_to_tlb(tlb->size); |
2535 |
if (size < 0 || size > 0x7) |
2536 |
size = 1;
|
2537 |
T0 |= size << 7;
|
2538 |
env->spr[SPR_40x_PID] = tlb->PID; |
2539 |
} |
2540 |
|
2541 |
void do_4xx_tlbre_hi (void) |
2542 |
{ |
2543 |
ppcemb_tlb_t *tlb; |
2544 |
|
2545 |
T0 &= 0x3F;
|
2546 |
tlb = &env->tlb[T0].tlbe; |
2547 |
T0 = tlb->RPN; |
2548 |
if (tlb->prot & PAGE_EXEC)
|
2549 |
T0 |= 0x200;
|
2550 |
if (tlb->prot & PAGE_WRITE)
|
2551 |
T0 |= 0x100;
|
2552 |
} |
2553 |
|
2554 |
void do_4xx_tlbsx (void) |
2555 |
{ |
2556 |
T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]); |
2557 |
} |
2558 |
|
2559 |
void do_4xx_tlbsx_ (void) |
2560 |
{ |
2561 |
int tmp = xer_so;
|
2562 |
|
2563 |
T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]); |
2564 |
if (T0 != -1) |
2565 |
tmp |= 0x02;
|
2566 |
env->crf[0] = tmp;
|
2567 |
} |
2568 |
|
2569 |
void do_4xx_tlbwe_hi (void) |
2570 |
{ |
2571 |
ppcemb_tlb_t *tlb; |
2572 |
target_ulong page, end; |
2573 |
|
2574 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2575 |
if (loglevel != 0) { |
2576 |
fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); |
2577 |
} |
2578 |
#endif
|
2579 |
T0 &= 0x3F;
|
2580 |
tlb = &env->tlb[T0].tlbe; |
2581 |
/* Invalidate previous TLB (if it's valid) */
|
2582 |
if (tlb->prot & PAGE_VALID) {
|
2583 |
end = tlb->EPN + tlb->size; |
2584 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2585 |
if (loglevel != 0) { |
2586 |
fprintf(logfile, "%s: invalidate old TLB %d start " ADDRX
|
2587 |
" end " ADDRX "\n", __func__, (int)T0, tlb->EPN, end); |
2588 |
} |
2589 |
#endif
|
2590 |
for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
|
2591 |
tlb_flush_page(env, page); |
2592 |
} |
2593 |
tlb->size = booke_tlb_to_page_size((T1 >> 7) & 0x7); |
2594 |
/* We cannot handle TLB size < TARGET_PAGE_SIZE.
|
2595 |
* If this ever occurs, one should use the ppcemb target instead
|
2596 |
* of the ppc or ppc64 one
|
2597 |
*/
|
2598 |
if ((T1 & 0x40) && tlb->size < TARGET_PAGE_SIZE) { |
2599 |
cpu_abort(env, "TLB size " TARGET_FMT_lu " < %u " |
2600 |
"are not supported (%d)\n",
|
2601 |
tlb->size, TARGET_PAGE_SIZE, (int)((T1 >> 7) & 0x7)); |
2602 |
} |
2603 |
tlb->EPN = T1 & ~(tlb->size - 1);
|
2604 |
if (T1 & 0x40) |
2605 |
tlb->prot |= PAGE_VALID; |
2606 |
else
|
2607 |
tlb->prot &= ~PAGE_VALID; |
2608 |
if (T1 & 0x20) { |
2609 |
/* XXX: TO BE FIXED */
|
2610 |
cpu_abort(env, "Little-endian TLB entries are not supported by now\n");
|
2611 |
} |
2612 |
tlb->PID = env->spr[SPR_40x_PID]; /* PID */
|
2613 |
tlb->attr = T1 & 0xFF;
|
2614 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2615 |
if (loglevel != 0) { |
2616 |
fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX |
2617 |
" size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
2618 |
(int)T0, tlb->RPN, tlb->EPN, tlb->size,
|
2619 |
tlb->prot & PAGE_READ ? 'r' : '-', |
2620 |
tlb->prot & PAGE_WRITE ? 'w' : '-', |
2621 |
tlb->prot & PAGE_EXEC ? 'x' : '-', |
2622 |
tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); |
2623 |
} |
2624 |
#endif
|
2625 |
/* Invalidate new TLB (if valid) */
|
2626 |
if (tlb->prot & PAGE_VALID) {
|
2627 |
end = tlb->EPN + tlb->size; |
2628 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2629 |
if (loglevel != 0) { |
2630 |
fprintf(logfile, "%s: invalidate TLB %d start " ADDRX
|
2631 |
" end " ADDRX "\n", __func__, (int)T0, tlb->EPN, end); |
2632 |
} |
2633 |
#endif
|
2634 |
for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
|
2635 |
tlb_flush_page(env, page); |
2636 |
} |
2637 |
} |
2638 |
|
2639 |
void do_4xx_tlbwe_lo (void) |
2640 |
{ |
2641 |
ppcemb_tlb_t *tlb; |
2642 |
|
2643 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2644 |
if (loglevel != 0) { |
2645 |
fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); |
2646 |
} |
2647 |
#endif
|
2648 |
T0 &= 0x3F;
|
2649 |
tlb = &env->tlb[T0].tlbe; |
2650 |
tlb->RPN = T1 & 0xFFFFFC00;
|
2651 |
tlb->prot = PAGE_READ; |
2652 |
if (T1 & 0x200) |
2653 |
tlb->prot |= PAGE_EXEC; |
2654 |
if (T1 & 0x100) |
2655 |
tlb->prot |= PAGE_WRITE; |
2656 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2657 |
if (loglevel != 0) { |
2658 |
fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX |
2659 |
" size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
2660 |
(int)T0, tlb->RPN, tlb->EPN, tlb->size,
|
2661 |
tlb->prot & PAGE_READ ? 'r' : '-', |
2662 |
tlb->prot & PAGE_WRITE ? 'w' : '-', |
2663 |
tlb->prot & PAGE_EXEC ? 'x' : '-', |
2664 |
tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); |
2665 |
} |
2666 |
#endif
|
2667 |
} |
2668 |
|
2669 |
/* PowerPC 440 TLB management */
|
2670 |
void do_440_tlbwe (int word) |
2671 |
{ |
2672 |
ppcemb_tlb_t *tlb; |
2673 |
target_ulong EPN, RPN, size; |
2674 |
int do_flush_tlbs;
|
2675 |
|
2676 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2677 |
if (loglevel != 0) { |
2678 |
fprintf(logfile, "%s word %d T0 " REGX " T1 " REGX "\n", |
2679 |
__func__, word, T0, T1); |
2680 |
} |
2681 |
#endif
|
2682 |
do_flush_tlbs = 0;
|
2683 |
T0 &= 0x3F;
|
2684 |
tlb = &env->tlb[T0].tlbe; |
2685 |
switch (word) {
|
2686 |
default:
|
2687 |
/* Just here to please gcc */
|
2688 |
case 0: |
2689 |
EPN = T1 & 0xFFFFFC00;
|
2690 |
if ((tlb->prot & PAGE_VALID) && EPN != tlb->EPN)
|
2691 |
do_flush_tlbs = 1;
|
2692 |
tlb->EPN = EPN; |
2693 |
size = booke_tlb_to_page_size((T1 >> 4) & 0xF); |
2694 |
if ((tlb->prot & PAGE_VALID) && tlb->size < size)
|
2695 |
do_flush_tlbs = 1;
|
2696 |
tlb->size = size; |
2697 |
tlb->attr &= ~0x1;
|
2698 |
tlb->attr |= (T1 >> 8) & 1; |
2699 |
if (T1 & 0x200) { |
2700 |
tlb->prot |= PAGE_VALID; |
2701 |
} else {
|
2702 |
if (tlb->prot & PAGE_VALID) {
|
2703 |
tlb->prot &= ~PAGE_VALID; |
2704 |
do_flush_tlbs = 1;
|
2705 |
} |
2706 |
} |
2707 |
tlb->PID = env->spr[SPR_440_MMUCR] & 0x000000FF;
|
2708 |
if (do_flush_tlbs)
|
2709 |
tlb_flush(env, 1);
|
2710 |
break;
|
2711 |
case 1: |
2712 |
RPN = T1 & 0xFFFFFC0F;
|
2713 |
if ((tlb->prot & PAGE_VALID) && tlb->RPN != RPN)
|
2714 |
tlb_flush(env, 1);
|
2715 |
tlb->RPN = RPN; |
2716 |
break;
|
2717 |
case 2: |
2718 |
tlb->attr = (tlb->attr & 0x1) | (T1 & 0x0000FF00); |
2719 |
tlb->prot = tlb->prot & PAGE_VALID; |
2720 |
if (T1 & 0x1) |
2721 |
tlb->prot |= PAGE_READ << 4;
|
2722 |
if (T1 & 0x2) |
2723 |
tlb->prot |= PAGE_WRITE << 4;
|
2724 |
if (T1 & 0x4) |
2725 |
tlb->prot |= PAGE_EXEC << 4;
|
2726 |
if (T1 & 0x8) |
2727 |
tlb->prot |= PAGE_READ; |
2728 |
if (T1 & 0x10) |
2729 |
tlb->prot |= PAGE_WRITE; |
2730 |
if (T1 & 0x20) |
2731 |
tlb->prot |= PAGE_EXEC; |
2732 |
break;
|
2733 |
} |
2734 |
} |
2735 |
|
2736 |
void do_440_tlbsx (void) |
2737 |
{ |
2738 |
T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR] & 0xFF);
|
2739 |
} |
2740 |
|
2741 |
void do_440_tlbsx_ (void) |
2742 |
{ |
2743 |
int tmp = xer_so;
|
2744 |
|
2745 |
T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR] & 0xFF);
|
2746 |
if (T0 != -1) |
2747 |
tmp |= 0x02;
|
2748 |
env->crf[0] = tmp;
|
2749 |
} |
2750 |
|
2751 |
void do_440_tlbre (int word) |
2752 |
{ |
2753 |
ppcemb_tlb_t *tlb; |
2754 |
int size;
|
2755 |
|
2756 |
T0 &= 0x3F;
|
2757 |
tlb = &env->tlb[T0].tlbe; |
2758 |
switch (word) {
|
2759 |
default:
|
2760 |
/* Just here to please gcc */
|
2761 |
case 0: |
2762 |
T0 = tlb->EPN; |
2763 |
size = booke_page_size_to_tlb(tlb->size); |
2764 |
if (size < 0 || size > 0xF) |
2765 |
size = 1;
|
2766 |
T0 |= size << 4;
|
2767 |
if (tlb->attr & 0x1) |
2768 |
T0 |= 0x100;
|
2769 |
if (tlb->prot & PAGE_VALID)
|
2770 |
T0 |= 0x200;
|
2771 |
env->spr[SPR_440_MMUCR] &= ~0x000000FF;
|
2772 |
env->spr[SPR_440_MMUCR] |= tlb->PID; |
2773 |
break;
|
2774 |
case 1: |
2775 |
T0 = tlb->RPN; |
2776 |
break;
|
2777 |
case 2: |
2778 |
T0 = tlb->attr & ~0x1;
|
2779 |
if (tlb->prot & (PAGE_READ << 4)) |
2780 |
T0 |= 0x1;
|
2781 |
if (tlb->prot & (PAGE_WRITE << 4)) |
2782 |
T0 |= 0x2;
|
2783 |
if (tlb->prot & (PAGE_EXEC << 4)) |
2784 |
T0 |= 0x4;
|
2785 |
if (tlb->prot & PAGE_READ)
|
2786 |
T0 |= 0x8;
|
2787 |
if (tlb->prot & PAGE_WRITE)
|
2788 |
T0 |= 0x10;
|
2789 |
if (tlb->prot & PAGE_EXEC)
|
2790 |
T0 |= 0x20;
|
2791 |
break;
|
2792 |
} |
2793 |
} |
2794 |
#endif /* !CONFIG_USER_ONLY */ |