Revision d86f0e32 hw/unin_pci.c

b/hw/unin_pci.c
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typedef struct UNINState {
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    SysBusDevice busdev;
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    PCIHostState host_state;
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    ReadWriteHandler data_handler;
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} UNINState;
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/* Don't know if this matches real hardware, but it agrees with OHW.  */
......
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{
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}
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static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr)
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{
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    uint32_t retval;
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    if (reg & (1u << 31)) {
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        /* XXX OpenBIOS compatibility hack */
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        retval = reg | (addr & 3);
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    } else if (reg & 1) {
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        /* CFA1 style */
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        retval = (reg & ~7u) | (addr & 7);
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    } else {
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        uint32_t slot, func;
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        /* Grab CFA0 style values */
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        slot = ffs(reg & 0xfffff800) - 1;
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        func = (reg >> 8) & 7;
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        /* ... and then convert them to x86 format */
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        /* config pointer */
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        retval = (reg & (0xff - 7)) | (addr & 7);
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        /* slot */
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        retval |= slot << 11;
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        /* fn */
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        retval |= func << 8;
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    }
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    UNIN_DPRINTF("Converted config space accessor %08x/%08x -> %08x\n",
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                 reg, addr, retval);
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    return retval;
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}
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static void unin_data_write(ReadWriteHandler *handler,
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                            pcibus_t addr, uint32_t val, int len)
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{
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    UNINState *s = container_of(handler, UNINState, data_handler);
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#ifdef TARGET_WORDS_BIGENDIAN
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    val = qemu_bswap_len(val, len);
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#endif
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    UNIN_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n", addr, len, val);
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    pci_data_write(s->host_state.bus,
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                   unin_get_config_reg(s->host_state.config_reg, addr),
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                   val, len);
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}
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static uint32_t unin_data_read(ReadWriteHandler *handler,
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                               pcibus_t addr, int len)
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{
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    UNINState *s = container_of(handler, UNINState, data_handler);
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    uint32_t val;
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    val = pci_data_read(s->host_state.bus,
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                        unin_get_config_reg(s->host_state.config_reg, addr),
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                        len);
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    UNIN_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n", addr, len, val);
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#ifdef TARGET_WORDS_BIGENDIAN
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    val = qemu_bswap_len(val, len);
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#endif
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    return val;
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}
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static int pci_unin_main_init_device(SysBusDevice *dev)
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{
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    UNINState *s;
......
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    s = FROM_SYSBUS(UNINState, dev);
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    pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
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    pci_mem_data = pci_host_data_register_mmio(&s->host_state);
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    s->data_handler.read = unin_data_read;
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    s->data_handler.write = unin_data_write;
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    pci_mem_data = cpu_register_io_memory_simple(&s->data_handler);
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    sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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    sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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