Revision d951f6ff hw/omap.h
b/hw/omap.h | ||
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464 | 464 |
qemu_irq *omap_gpio_in_get(struct omap_gpio_s *s); |
465 | 465 |
void omap_gpio_out_set(struct omap_gpio_s *s, int line, qemu_irq handler); |
466 | 466 |
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467 |
struct uwire_slave_s { |
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468 |
uint16_t (*receive)(void *opaque); |
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void (*send)(void *opaque, uint16_t data); |
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void *opaque; |
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}; |
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struct omap_uwire_s; |
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struct omap_uwire_s *omap_uwire_init(target_phys_addr_t base, |
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qemu_irq *irq, qemu_irq dma, omap_clk clk); |
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void omap_uwire_attach(struct omap_uwire_s *s, |
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struct uwire_slave_s *slave, int chipselect); |
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477 |
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467 | 478 |
/* omap_lcdc.c */ |
468 | 479 |
struct omap_lcd_panel_s; |
469 | 480 |
void omap_lcdc_reset(struct omap_lcd_panel_s *s); |
... | ... | |
510 | 521 |
unsigned long sram_size; |
511 | 522 |
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512 | 523 |
/* MPUI-TIPB peripherals */ |
513 |
struct omap_uart_s *uart3; |
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524 |
struct omap_uart_s *uart[3]; |
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525 |
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struct omap_gpio_s *gpio; |
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514 | 527 |
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515 | 528 |
/* MPU public TIPB peripherals */ |
516 | 529 |
struct omap_32khz_timer_s *os_timer; |
517 | 530 |
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struct omap_uart_s *uart1; |
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struct omap_uart_s *uart2; |
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520 |
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521 | 531 |
struct omap_mmc_s *mmc; |
522 | 532 |
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struct omap_mpuio_s *mpuio; |
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534 |
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struct omap_uwire_s *microwire; |
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536 |
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523 | 537 |
/* MPU private TIPB peripherals */ |
524 | 538 |
struct omap_intr_handler_s *ih[2]; |
525 | 539 |
|
... | ... | |
578 | 592 |
uint16_t dsp_idlect2; |
579 | 593 |
uint16_t dsp_rstct2; |
580 | 594 |
} clkm; |
581 |
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struct omap_mpuio_s *mpuio; |
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struct omap_gpio_s *gpio; |
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584 | 595 |
} *omap310_mpu_init(unsigned long sdram_size, |
585 | 596 |
DisplayState *ds, const char *core); |
586 | 597 |
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