Revision d9bce9d9 target-ppc/exec.h
b/target-ppc/exec.h | ||
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34 | 34 |
#define T1 (env->t1) |
35 | 35 |
#define T2 (env->t2) |
36 | 36 |
#else |
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/* This may be more efficient if HOST_LONG_BITS > TARGET_LONG_BITS |
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* To be set to one when we'll be sure it does not cause bugs.... |
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*/ |
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#if 0 |
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register unsigned long T0 asm(AREG1); |
42 | 38 |
register unsigned long T1 asm(AREG2); |
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register unsigned long T2 asm(AREG3); |
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#else |
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register target_ulong T0 asm(AREG1); |
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register target_ulong T1 asm(AREG2); |
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register target_ulong T2 asm(AREG3); |
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48 | 40 |
#endif |
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/* We may, sometime, need 64 bits registers on 32 bits target */ |
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#if defined(TARGET_PPC64) || (HOST_LONG_BITS == 64) |
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#define T0_64 T0 |
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#define T1_64 T0 |
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#define T2_64 T0 |
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#else |
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/* no registers can be used */ |
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#define T0_64 (env->t0) |
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#define T1_64 (env->t1) |
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#define T2_64 (env->t2) |
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49 | 51 |
#endif |
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/* Provision for Altivec */ |
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#define T0_avr (env->t0_avr) |
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#define T1_avr (env->t1_avr) |
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#define T2_avr (env->t2_avr) |
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50 | 56 |
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51 | 57 |
/* XXX: to clean: remove this mess */ |
52 | 58 |
#define PARAM(n) ((uint32_t)PARAM##n) |
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