Revision d9bce9d9 target-ppc/op_helper.c

b/target-ppc/op_helper.c
33 33
//#define DEBUG_SOFTWARE_TLB
34 34
//#define FLUSH_ALL_TLBS
35 35

  
36
#define Ts0 (long)((target_long)T0)
37
#define Ts1 (long)((target_long)T1)
38
#define Ts2 (long)((target_long)T2)
39

  
40 36
/*****************************************************************************/
41 37
/* Exceptions processing helpers */
42 38
void cpu_loop_exit (void)
......
106 102
    xer_ov = (T0 >> XER_OV) & 0x01;
107 103
    xer_ca = (T0 >> XER_CA) & 0x01;
108 104
    xer_cmp = (T0 >> XER_CMP) & 0xFF;
109
    xer_bc = (T0 >> XER_BC) & 0x3F;
105
    xer_bc = (T0 >> XER_BC) & 0x7F;
110 106
}
111 107

  
112 108
void do_load_fpscr (void)
......
122 118
    } u;
123 119
    int i;
124 120

  
125
#ifdef WORDS_BIGENDIAN
121
#if defined(WORDS_BIGENDIAN)
126 122
#define WORD0 0
127 123
#define WORD1 1
128 124
#else
......
182 178

  
183 179
/*****************************************************************************/
184 180
/* Fixed point operations helpers */
185
void do_addo (void)
181
#if defined(TARGET_PPC64)
182
static void add128 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b)
186 183
{
187
    T2 = T0;
188
    T0 += T1;
189
    if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) {
190
        xer_ov = 0;
191
    } else {
192
        xer_so = 1;
193
        xer_ov = 1;
194
    }
184
    *plow += a;
185
    /* carry test */
186
    if (*plow < a)
187
        (*phigh)++;
188
    *phigh += b;
195 189
}
196 190

  
197
void do_addco (void)
191
static void neg128 (uint64_t *plow, uint64_t *phigh)
198 192
{
199
    T2 = T0;
200
    T0 += T1;
201
    if (likely(T0 >= T2)) {
202
        xer_ca = 0;
203
    } else {
204
        xer_ca = 1;
205
    }
206
    if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) {
207
        xer_ov = 0;
208
    } else {
209
        xer_so = 1;
210
        xer_ov = 1;
193
    *plow = ~ *plow;
194
    *phigh = ~ *phigh;
195
    add128(plow, phigh, 1, 0);
196
}
197

  
198
static void mul64 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b)
199
{
200
    uint32_t a0, a1, b0, b1;
201
    uint64_t v;
202

  
203
    a0 = a;
204
    a1 = a >> 32;
205

  
206
    b0 = b;
207
    b1 = b >> 32;
208
    
209
    v = (uint64_t)a0 * (uint64_t)b0;
210
    *plow = v;
211
    *phigh = 0;
212

  
213
    v = (uint64_t)a0 * (uint64_t)b1;
214
    add128(plow, phigh, v << 32, v >> 32);
215

  
216
    v = (uint64_t)a1 * (uint64_t)b0;
217
    add128(plow, phigh, v << 32, v >> 32);
218

  
219
    v = (uint64_t)a1 * (uint64_t)b1;
220
    *phigh += v;
221
#if defined(DEBUG_MULDIV)
222
    printf("mul: 0x%016llx * 0x%016llx = 0x%016llx%016llx\n",
223
           a, b, *phigh, *plow);
224
#endif
225
}
226

  
227
void do_mul64 (uint64_t *plow, uint64_t *phigh)
228
{
229
    mul64(plow, phigh, T0, T1);
230
}
231

  
232
static void imul64(uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b)
233
{
234
    int sa, sb;
235
    sa = (a < 0);
236
    if (sa)
237
        a = -a;
238
    sb = (b < 0);
239
    if (sb)
240
        b = -b;
241
    mul64(plow, phigh, a, b);
242
    if (sa ^ sb) {
243
        neg128(plow, phigh);
211 244
    }
212 245
}
213 246

  
247
void do_imul64 (uint64_t *plow, uint64_t *phigh)
248
{
249
    imul64(plow, phigh, T0, T1);
250
}
251
#endif
252

  
214 253
void do_adde (void)
215 254
{
216 255
    T2 = T0;
217 256
    T0 += T1 + xer_ca;
218
    if (likely(!(T0 < T2 || (xer_ca == 1 && T0 == T2)))) {
257
    if (likely(!((uint32_t)T0 < (uint32_t)T2 ||
258
                 (xer_ca == 1 && (uint32_t)T0 == (uint32_t)T2)))) {
219 259
        xer_ca = 0;
220 260
    } else {
221 261
        xer_ca = 1;
222 262
    }
223 263
}
224 264

  
225
void do_addeo (void)
265
#if defined(TARGET_PPC64)
266
void do_adde_64 (void)
226 267
{
227 268
    T2 = T0;
228 269
    T0 += T1 + xer_ca;
229
    if (likely(!(T0 < T2 || (xer_ca == 1 && T0 == T2)))) {
270
    if (likely(!((uint64_t)T0 < (uint64_t)T2 ||
271
                 (xer_ca == 1 && (uint64_t)T0 == (uint64_t)T2)))) {
230 272
        xer_ca = 0;
231 273
    } else {
232 274
        xer_ca = 1;
233 275
    }
234
    if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) {
235
        xer_ov = 0;
236
    } else {
237
        xer_so = 1;
238
        xer_ov = 1;
239
    }
240 276
}
277
#endif
241 278

  
242 279
void do_addmeo (void)
243 280
{
244 281
    T1 = T0;
245 282
    T0 += xer_ca + (-1);
246
    if (likely(!(T1 & (T1 ^ T0) & (1 << 31)))) {
283
    if (likely(!((uint32_t)T1 &
284
                 ((uint32_t)T1 ^ (uint32_t)T0) & (1UL << 31)))) {
247 285
        xer_ov = 0;
248 286
    } else {
249 287
        xer_so = 1;
......
253 291
        xer_ca = 1;
254 292
}
255 293

  
256
void do_addzeo (void)
294
#if defined(TARGET_PPC64)
295
void do_addmeo_64 (void)
257 296
{
258 297
    T1 = T0;
259
    T0 += xer_ca;
260
    if (likely(!((T1 ^ (-1)) & (T1 ^ T0) & (1 << 31)))) {
298
    T0 += xer_ca + (-1);
299
    if (likely(!((uint64_t)T1 &
300
                 ((uint64_t)T1 ^ (uint64_t)T0) & (1ULL << 63)))) {
261 301
        xer_ov = 0;
262 302
    } else {
263 303
        xer_so = 1;
264 304
        xer_ov = 1;
265 305
    }
266
    if (likely(T0 >= T1)) {
267
        xer_ca = 0;
268
    } else {
306
    if (likely(T1 != 0))
269 307
        xer_ca = 1;
270
    }
271 308
}
309
#endif
272 310

  
273 311
void do_divwo (void)
274 312
{
275
    if (likely(!((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0))) {
313
    if (likely(!(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) ||
314
                 (int32_t)T1 == 0))) {
276 315
        xer_ov = 0;
277
        T0 = (Ts0 / Ts1);
316
        T0 = (int32_t)T0 / (int32_t)T1;
278 317
    } else {
279 318
        xer_so = 1;
280 319
        xer_ov = 1;
......
282 321
    }
283 322
}
284 323

  
324
#if defined(TARGET_PPC64)
325
void do_divdo (void)
326
{
327
    if (likely(!(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1ULL) ||
328
                 (int64_t)T1 == 0))) {
329
        xer_ov = 0;
330
        T0 = (int64_t)T0 / (int64_t)T1;
331
    } else {
332
        xer_so = 1;
333
        xer_ov = 1;
334
        T0 = (-1ULL) * ((uint64_t)T0 >> 63);
335
    }
336
}
337
#endif
338

  
285 339
void do_divwuo (void)
286 340
{
287 341
    if (likely((uint32_t)T1 != 0)) {
......
294 348
    }
295 349
}
296 350

  
351
#if defined(TARGET_PPC64)
352
void do_divduo (void)
353
{
354
    if (likely((uint64_t)T1 != 0)) {
355
        xer_ov = 0;
356
        T0 = (uint64_t)T0 / (uint64_t)T1;
357
    } else {
358
        xer_so = 1;
359
        xer_ov = 1;
360
        T0 = 0;
361
    }
362
}
363
#endif
364

  
297 365
void do_mullwo (void)
298 366
{
299
    int64_t res = (int64_t)Ts0 * (int64_t)Ts1;
367
    int64_t res = (int64_t)T0 * (int64_t)T1;
300 368

  
301 369
    if (likely((int32_t)res == res)) {
302 370
        xer_ov = 0;
......
307 375
    T0 = (int32_t)res;
308 376
}
309 377

  
310
void do_nego (void)
378
#if defined(TARGET_PPC64)
379
void do_mulldo (void)
311 380
{
312
    if (likely(T0 != INT32_MIN)) {
381
    int64_t th;
382
    uint64_t tl;
383

  
384
    do_imul64(&tl, &th);
385
    if (likely(th == 0)) {
313 386
        xer_ov = 0;
314
        T0 = -Ts0;
315 387
    } else {
316 388
        xer_ov = 1;
317 389
        xer_so = 1;
318 390
    }
391
    T0 = (int64_t)tl;
319 392
}
393
#endif
320 394

  
321
void do_subfo (void)
395
void do_nego (void)
322 396
{
323
    T2 = T0;
324
    T0 = T1 - T0;
325
    if (likely(!(((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)))) {
397
    if (likely((int32_t)T0 != INT32_MIN)) {
326 398
        xer_ov = 0;
399
        T0 = -(int32_t)T0;
327 400
    } else {
328
        xer_so = 1;
329 401
        xer_ov = 1;
402
        xer_so = 1;
330 403
    }
331
    RETURN();
332 404
}
333 405

  
334
void do_subfco (void)
406
#if defined(TARGET_PPC64)
407
void do_nego_64 (void)
335 408
{
336
    T2 = T0;
337
    T0 = T1 - T0;
338
    if (likely(T0 > T1)) {
339
        xer_ca = 0;
340
    } else {
341
        xer_ca = 1;
342
    }
343
    if (likely(!(((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)))) {
409
    if (likely((int64_t)T0 != INT64_MIN)) {
344 410
        xer_ov = 0;
411
        T0 = -(int64_t)T0;
345 412
    } else {
346
        xer_so = 1;
347 413
        xer_ov = 1;
414
        xer_so = 1;
348 415
    }
349 416
}
417
#endif
350 418

  
351 419
void do_subfe (void)
352 420
{
353 421
    T0 = T1 + ~T0 + xer_ca;
354
    if (likely(T0 >= T1 && (xer_ca == 0 || T0 != T1))) {
422
    if (likely((uint32_t)T0 >= (uint32_t)T1 &&
423
               (xer_ca == 0 || (uint32_t)T0 != (uint32_t)T1))) {
355 424
        xer_ca = 0;
356 425
    } else {
357 426
        xer_ca = 1;
358 427
    }
359 428
}
360 429

  
361
void do_subfeo (void)
430
#if defined(TARGET_PPC64)
431
void do_subfe_64 (void)
362 432
{
363
    T2 = T0;
364 433
    T0 = T1 + ~T0 + xer_ca;
365
    if (likely(!((~T2 ^ T1 ^ (-1)) & (~T2 ^ T0) & (1 << 31)))) {
434
    if (likely((uint64_t)T0 >= (uint64_t)T1 &&
435
               (xer_ca == 0 || (uint64_t)T0 != (uint64_t)T1))) {
436
        xer_ca = 0;
437
    } else {
438
        xer_ca = 1;
439
    }
440
}
441
#endif
442

  
443
void do_subfmeo (void)
444
{
445
    T1 = T0;
446
    T0 = ~T0 + xer_ca - 1;
447
    if (likely(!((uint32_t)~T1 & ((uint32_t)~T1 ^ (uint32_t)T0) &
448
                 (1UL << 31)))) {
366 449
        xer_ov = 0;
367 450
    } else {
368 451
        xer_so = 1;
369 452
        xer_ov = 1;
370 453
    }
371
    if (likely(T0 >= T1 && (xer_ca == 0 || T0 != T1))) {
372
        xer_ca = 0;
373
    } else {
454
    if (likely((uint32_t)T1 != UINT32_MAX))
374 455
        xer_ca = 1;
375
    }
376 456
}
377 457

  
378
void do_subfmeo (void)
458
#if defined(TARGET_PPC64)
459
void do_subfmeo_64 (void)
379 460
{
380 461
    T1 = T0;
381 462
    T0 = ~T0 + xer_ca - 1;
382
    if (likely(!(~T1 & (~T1 ^ T0) & (1 << 31)))) {
463
    if (likely(!((uint64_t)~T1 & ((uint64_t)~T1 ^ (uint64_t)T0) &
464
                 (1ULL << 63)))) {
383 465
        xer_ov = 0;
384 466
    } else {
385 467
        xer_so = 1;
386 468
        xer_ov = 1;
387 469
    }
388
    if (likely(T1 != -1))
470
    if (likely((uint64_t)T1 != UINT64_MAX))
389 471
        xer_ca = 1;
390 472
}
473
#endif
391 474

  
392 475
void do_subfzeo (void)
393 476
{
394 477
    T1 = T0;
395 478
    T0 = ~T0 + xer_ca;
396
    if (likely(!((~T1 ^ (-1)) & ((~T1) ^ T0) & (1 << 31)))) {
479
    if (likely(!(((uint32_t)~T1 ^ UINT32_MAX) &
480
                 ((uint32_t)(~T1) ^ (uint32_t)T0) & (1UL << 31)))) {
397 481
        xer_ov = 0;
398 482
    } else {
399 483
        xer_ov = 1;
400 484
        xer_so = 1;
401 485
    }
402
    if (likely(T0 >= ~T1)) {
486
    if (likely((uint32_t)T0 >= (uint32_t)~T1)) {
403 487
        xer_ca = 0;
404 488
    } else {
405 489
        xer_ca = 1;
406 490
    }
407 491
}
408 492

  
493
#if defined(TARGET_PPC64)
494
void do_subfzeo_64 (void)
495
{
496
    T1 = T0;
497
    T0 = ~T0 + xer_ca;
498
    if (likely(!(((uint64_t)~T1 ^ UINT64_MAX) &
499
                 ((uint64_t)(~T1) ^ (uint64_t)T0) & (1ULL << 63)))) {
500
        xer_ov = 0;
501
    } else {
502
        xer_ov = 1;
503
        xer_so = 1;
504
    }
505
    if (likely((uint64_t)T0 >= (uint64_t)~T1)) {
506
        xer_ca = 0;
507
    } else {
508
        xer_ca = 1;
509
    }
510
}
511
#endif
512

  
409 513
/* shift right arithmetic helper */
410 514
void do_sraw (void)
411 515
{
412 516
    int32_t ret;
413 517

  
414 518
    if (likely(!(T1 & 0x20UL))) {
415
        if (likely(T1 != 0)) {
519
        if (likely((uint32_t)T1 != 0)) {
416 520
            ret = (int32_t)T0 >> (T1 & 0x1fUL);
417 521
            if (likely(ret >= 0 || ((int32_t)T0 & ((1 << T1) - 1)) == 0)) {
418 522
                xer_ca = 0;
......
434 538
    T0 = ret;
435 539
}
436 540

  
541
#if defined(TARGET_PPC64)
542
void do_srad (void)
543
{
544
    int64_t ret;
545

  
546
    if (likely(!(T1 & 0x40UL))) {
547
        if (likely((uint64_t)T1 != 0)) {
548
            ret = (int64_t)T0 >> (T1 & 0x3FUL);
549
            if (likely(ret >= 0 || ((int64_t)T0 & ((1 << T1) - 1)) == 0)) {
550
                xer_ca = 0;
551
            } else {
552
                xer_ca = 1;
553
            }
554
        } else {
555
            ret = T0;
556
            xer_ca = 0;
557
        }
558
    } else {
559
        ret = (-1) * ((uint64_t)T0 >> 63);
560
        if (likely(ret >= 0 || ((uint64_t)T0 & ~0x8000000000000000ULL) == 0)) {
561
            xer_ca = 0;
562
        } else {
563
            xer_ca = 1;
564
        }
565
    }
566
    T0 = ret;
567
}
568
#endif
569

  
570
static inline int popcnt (uint32_t val)
571
{
572
    int i;
573

  
574
    for (i = 0; val != 0;)
575
        val = val ^ (val - 1);
576

  
577
    return i;
578
}
579

  
580
void do_popcntb (void)
581
{
582
    uint32_t ret;
583
    int i;
584

  
585
    ret = 0;
586
    for (i = 0; i < 32; i += 8)
587
        ret |= popcnt((T0 >> i) & 0xFF) << i;
588
    T0 = ret;
589
}
590

  
591
#if defined(TARGET_PPC64)
592
void do_popcntb_64 (void)
593
{
594
    uint64_t ret;
595
    int i;
596

  
597
    ret = 0;
598
    for (i = 0; i < 64; i += 8)
599
        ret |= popcnt((T0 >> i) & 0xFF) << i;
600
    T0 = ret;
601
}
602
#endif
603

  
437 604
/*****************************************************************************/
438 605
/* Floating point operations helpers */
439 606
void do_fctiw (void)
......
459 626
    } p;
460 627

  
461 628
    /* XXX: higher bits are not supposed to be significant.
462
     *      to make tests easier, return the same as a real PowerPC 750 (aka G3)
629
     *     to make tests easier, return the same as a real PowerPC 750 (aka G3)
463 630
     */
464 631
    p.i = float64_to_int32_round_to_zero(FT0, &env->fp_status);
465 632
    p.i |= 0xFFF80000ULL << 32;
......
596 763
#if !defined (CONFIG_USER_ONLY)
597 764
void do_rfi (void)
598 765
{
599
    env->nip = env->spr[SPR_SRR0] & ~0x00000003;
600
    T0 = env->spr[SPR_SRR1] & ~0xFFFF0000UL;
766
    env->nip = (target_ulong)(env->spr[SPR_SRR0] & ~0x00000003);
767
    T0 = (target_ulong)(env->spr[SPR_SRR1] & ~0xFFFF0000UL);
601 768
    do_store_msr(env, T0);
602 769
#if defined (DEBUG_OP)
603 770
    dump_rfi();
604 771
#endif
605 772
    env->interrupt_request |= CPU_INTERRUPT_EXITTB;
606 773
}
774

  
775
#if defined(TARGET_PPC64)
776
void do_rfi_32 (void)
777
{
778
    env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
779
    T0 = (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL);
780
    do_store_msr(env, T0);
781
#if defined (DEBUG_OP)
782
    dump_rfi();
783
#endif
784
    env->interrupt_request |= CPU_INTERRUPT_EXITTB;
785
}
786
#endif
607 787
#endif
608 788

  
609 789
void do_tw (int flags)
610 790
{
611
    if (!likely(!((Ts0 < Ts1 && (flags & 0x10)) ||
612
                  (Ts0 > Ts1 && (flags & 0x08)) ||
613
                  (Ts0 == Ts1 && (flags & 0x04)) ||
614
                  (T0 < T1 && (flags & 0x02)) ||
615
                  (T0 > T1 && (flags & 0x01)))))
791
    if (!likely(!(((int32_t)T0 < (int32_t)T1 && (flags & 0x10)) ||
792
                  ((int32_t)T0 > (int32_t)T1 && (flags & 0x08)) ||
793
                  ((int32_t)T0 == (int32_t)T1 && (flags & 0x04)) ||
794
                  ((uint32_t)T0 < (uint32_t)T1 && (flags & 0x02)) ||
795
                  ((uint32_t)T0 > (uint32_t)T1 && (flags & 0x01)))))
616 796
        do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP);
617 797
}
618 798

  
799
#if defined(TARGET_PPC64)
800
void do_td (int flags)
801
{
802
    if (!likely(!(((int64_t)T0 < (int64_t)T1 && (flags & 0x10)) ||
803
                  ((int64_t)T0 > (int64_t)T1 && (flags & 0x08)) ||
804
                  ((int64_t)T0 == (int64_t)T1 && (flags & 0x04)) ||
805
                  ((uint64_t)T0 < (uint64_t)T1 && (flags & 0x02)) ||
806
                  ((uint64_t)T0 > (uint64_t)T1 && (flags & 0x01)))))
807
        do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP);
808
}
809
#endif
810

  
619 811
/* Instruction cache invalidation helper */
620 812
void do_icbi (void)
621 813
{
......
625 817
     * (not a fetch) by the MMU. To be sure it will be so,
626 818
     * do the load "by hand".
627 819
     */
820
    tmp = ldl_kernel((uint32_t)T0);
821
    T0 &= ~(ICACHE_LINE_SIZE - 1);
822
    tb_invalidate_page_range((uint32_t)T0, (uint32_t)(T0 + ICACHE_LINE_SIZE));
823
}
824

  
628 825
#if defined(TARGET_PPC64)
629
    if (!msr_sf)
630
        T0 &= 0xFFFFFFFFULL;
631
#endif
632
    tmp = ldl_kernel(T0);
826
void do_icbi_64 (void)
827
{
828
    uint64_t tmp;
829
    /* Invalidate one cache line :
830
     * PowerPC specification says this is to be treated like a load
831
     * (not a fetch) by the MMU. To be sure it will be so,
832
     * do the load "by hand".
833
     */
834
    tmp = ldq_kernel((uint64_t)T0);
633 835
    T0 &= ~(ICACHE_LINE_SIZE - 1);
634
    tb_invalidate_page_range(T0, T0 + ICACHE_LINE_SIZE);
836
    tb_invalidate_page_range((uint64_t)T0, (uint64_t)(T0 + ICACHE_LINE_SIZE));
635 837
}
838
#endif
636 839

  
637 840
/*****************************************************************************/
638 841
/* PowerPC 601 specific instructions (POWER bridge) */
639 842
void do_POWER_abso (void)
640 843
{
641
    if (T0 == INT32_MIN) {
844
    if ((uint32_t)T0 == INT32_MIN) {
642 845
        T0 = INT32_MAX;
643 846
        xer_ov = 1;
644 847
        xer_so = 1;
......
679 882
{
680 883
    uint64_t tmp;
681 884

  
682
    if ((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0) {
885
    if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
683 886
        T0 = (long)((-1) * (T0 >> 31));
684 887
        env->spr[SPR_MQ] = 0;
685 888
    } else {
686 889
        tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
687 890
        env->spr[SPR_MQ] = tmp % T1;
688
        T0 = tmp / Ts1;
891
        T0 = tmp / (int32_t)T1;
689 892
    }
690 893
}
691 894

  
......
693 896
{
694 897
    int64_t tmp;
695 898

  
696
    if ((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0) {
899
    if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
697 900
        T0 = (long)((-1) * (T0 >> 31));
698 901
        env->spr[SPR_MQ] = 0;
699 902
        xer_ov = 1;
......
701 904
    } else {
702 905
        tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
703 906
        env->spr[SPR_MQ] = tmp % T1;
704
        tmp /= Ts1;
907
        tmp /= (int32_t)T1;
705 908
        if (tmp > (int64_t)INT32_MAX || tmp < (int64_t)INT32_MIN) {
706 909
            xer_ov = 1;
707 910
            xer_so = 1;
......
714 917

  
715 918
void do_POWER_divs (void)
716 919
{
717
    if ((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0) {
920
    if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
718 921
        T0 = (long)((-1) * (T0 >> 31));
719 922
        env->spr[SPR_MQ] = 0;
720 923
    } else {
721 924
        env->spr[SPR_MQ] = T0 % T1;
722
        T0 = Ts0 / Ts1;
925
        T0 = (int32_t)T0 / (int32_t)T1;
723 926
    }
724 927
}
725 928

  
726 929
void do_POWER_divso (void)
727 930
{
728
    if ((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0) {
931
    if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
729 932
        T0 = (long)((-1) * (T0 >> 31));
730 933
        env->spr[SPR_MQ] = 0;
731 934
        xer_ov = 1;
732 935
        xer_so = 1;
733 936
    } else {
734
        T0 = Ts0 / Ts1;
735
        env->spr[SPR_MQ] = Ts0 % Ts1;
937
        T0 = (int32_t)T0 / (int32_t)T1;
938
        env->spr[SPR_MQ] = (int32_t)T0 % (int32_t)T1;
736 939
        xer_ov = 0;
737 940
    }
738 941
}
739 942

  
740 943
void do_POWER_dozo (void)
741 944
{
742
    if (Ts1 > Ts0) {
945
    if ((int32_t)T1 > (int32_t)T0) {
743 946
        T2 = T0;
744 947
        T0 = T1 - T0;
745
        if (((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)) {
948
        if (((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) &
949
            ((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)) {
746 950
            xer_so = 1;
747 951
            xer_ov = 1;
748 952
        } else {
......
758 962
{
759 963
    uint32_t ret;
760 964

  
761
    if (T0 == T1 + 1) {
965
    if ((uint32_t)T0 == (uint32_t)(T1 + 1)) {
762 966
        ret = -1;
763 967
    } else {
764
        ret = (((uint32_t)(-1)) >> (T0)) ^
765
            (((uint32_t)(-1) >> (T1)) >> 1);
766
        if (T0 > T1)
968
        ret = (((uint32_t)(-1)) >> ((uint32_t)T0)) ^
969
            (((uint32_t)(-1) >> ((uint32_t)T1)) >> 1);
970
        if ((uint32_t)T0 > (uint32_t)T1)
767 971
            ret = ~ret;
768 972
    }
769 973
    T0 = ret;
......
812 1016
/* PowerPC 601 BAT management helper */
813 1017
void do_store_601_batu (int nr)
814 1018
{
815
    do_store_ibatu(env, nr, T0);
1019
    do_store_ibatu(env, nr, (uint32_t)T0);
816 1020
    env->DBAT[0][nr] = env->IBAT[0][nr];
817 1021
    env->DBAT[1][nr] = env->IBAT[1][nr];
818 1022
}
......
826 1030
void do_op_602_mfrom (void)
827 1031
{
828 1032
    if (likely(T0 < 602)) {
829
#ifdef USE_MFROM_ROM_TABLE
1033
#if defined(USE_MFROM_ROM_TABLE)
830 1034
#include "mfrom_table.c"
831 1035
        T0 = mfrom_ROM_table[T0];
832 1036
#else
......
854 1058
/* Embedded PowerPC specific helpers */
855 1059
void do_405_check_ov (void)
856 1060
{
857
    if (likely(((T1 ^ T2) >> 31) || !((T0 ^ T2) >> 31))) {
1061
    if (likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) ||
1062
               !(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
858 1063
        xer_ov = 0;
859 1064
    } else {
860 1065
        xer_ov = 1;
......
864 1069

  
865 1070
void do_405_check_sat (void)
866 1071
{
867
    if (!likely(((T1 ^ T2) >> 31) || !((T0 ^ T2) >> 31))) {
1072
    if (!likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) ||
1073
                !(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
868 1074
        /* Saturate result */
869 1075
        if (T2 >> 31) {
870 1076
            T0 = INT32_MIN;
......
1010 1216

  
1011 1217
void do_tlbie (void)
1012 1218
{
1219
    T0 = (uint32_t)T0;
1013 1220
#if !defined(FLUSH_ALL_TLBS)
1014 1221
    if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_6xx)) {
1015 1222
        ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0);
......
1050 1257
#endif
1051 1258
}
1052 1259

  
1260
#if defined(TARGET_PPC64)
1261
void do_tlbie_64 (void)
1262
{
1263
    T0 = (uint64_t)T0;
1264
#if !defined(FLUSH_ALL_TLBS)
1265
    if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_6xx)) {
1266
        ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0);
1267
        if (env->id_tlbs == 1)
1268
            ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 1);
1269
    } else if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_4xx)) {
1270
        /* XXX: TODO */
1271
#if 0
1272
        ppcbooke_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK,
1273
                                     env->spr[SPR_BOOKE_PID]);
1274
#endif
1275
    } else {
1276
        /* tlbie invalidate TLBs for all segments
1277
         * As we have 2^36 segments, invalidate all qemu TLBs
1278
         */
1279
#if 0
1280
        T0 &= TARGET_PAGE_MASK;
1281
        T0 &= ~((target_ulong)-1 << 28);
1282
        /* XXX: this case should be optimized,
1283
         * giving a mask to tlb_flush_page
1284
         */
1285
        tlb_flush_page(env, T0 | (0x0 << 28));
1286
        tlb_flush_page(env, T0 | (0x1 << 28));
1287
        tlb_flush_page(env, T0 | (0x2 << 28));
1288
        tlb_flush_page(env, T0 | (0x3 << 28));
1289
        tlb_flush_page(env, T0 | (0x4 << 28));
1290
        tlb_flush_page(env, T0 | (0x5 << 28));
1291
        tlb_flush_page(env, T0 | (0x6 << 28));
1292
        tlb_flush_page(env, T0 | (0x7 << 28));
1293
        tlb_flush_page(env, T0 | (0x8 << 28));
1294
        tlb_flush_page(env, T0 | (0x9 << 28));
1295
        tlb_flush_page(env, T0 | (0xA << 28));
1296
        tlb_flush_page(env, T0 | (0xB << 28));
1297
        tlb_flush_page(env, T0 | (0xC << 28));
1298
        tlb_flush_page(env, T0 | (0xD << 28));
1299
        tlb_flush_page(env, T0 | (0xE << 28));
1300
        tlb_flush_page(env, T0 | (0xF << 28));
1301
#else
1302
        tlb_flush(env, 1);
1303
#endif
1304
    }
1305
#else
1306
    do_tlbia();
1307
#endif
1308
}
1309
#endif
1310

  
1311
#if defined(TARGET_PPC64)
1312
void do_slbia (void)
1313
{
1314
    /* XXX: TODO */
1315
    tlb_flush(env, 1);
1316
}
1317

  
1318
void do_slbie (void)
1319
{
1320
    /* XXX: TODO */
1321
    tlb_flush(env, 1);
1322
}
1323
#endif
1324

  
1053 1325
/* Software driven TLBs management */
1054 1326
/* PowerPC 602/603 software TLB load instructions helpers */
1055 1327
void do_load_6xx_tlb (int is_code)
1056 1328
{
1057 1329
    target_ulong RPN, CMP, EPN;
1058 1330
    int way;
1059
    
1331

  
1060 1332
    RPN = env->spr[SPR_RPA];
1061 1333
    if (is_code) {
1062 1334
        CMP = env->spr[SPR_ICMP];
......
1074 1346
    }
1075 1347
#endif
1076 1348
    /* Store this TLB */
1077
    ppc6xx_tlb_store(env, T0 & TARGET_PAGE_MASK, way, is_code, CMP, RPN);
1349
    ppc6xx_tlb_store(env, (uint32_t)(T0 & TARGET_PAGE_MASK),
1350
                     way, is_code, CMP, RPN);
1078 1351
}
1079 1352

  
1080 1353
/* Helpers for 4xx TLB management */

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