Revision d9bce9d9 target-ppc/translate.c

b/target-ppc/translate.c
31 31
//#define PPC_DEBUG_DISAS
32 32
//#define DO_PPC_STATISTICS
33 33

  
34
#ifdef USE_DIRECT_JUMP
34
#if defined(USE_DIRECT_JUMP)
35 35
#define TBPARAM(x)
36 36
#else
37 37
#define TBPARAM(x) (long)(x)
......
49 49

  
50 50
#include "gen-op.h"
51 51

  
52
#define GEN8(func, NAME) \
52
static inline void gen_set_T0 (target_ulong val)
53
{
54
#if defined(TARGET_PPC64)
55
    if (val >> 32)
56
        gen_op_set_T0_64(val >> 32, val);
57
    else
58
#endif
59
        gen_op_set_T0(val);
60
}
61

  
62
static inline void gen_set_T1 (target_ulong val)
63
{
64
#if defined(TARGET_PPC64)
65
    if (val >> 32)
66
        gen_op_set_T1_64(val >> 32, val);
67
    else
68
#endif
69
        gen_op_set_T1(val);
70
}
71

  
72
#define GEN8(func, NAME)                                                      \
53 73
static GenOpFunc *NAME ## _table [8] = {                                      \
54 74
NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3,                                   \
55 75
NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7,                                   \
......
71 91
    NAME ## _table[n]();                                                      \
72 92
}
73 93

  
74
#define GEN32(func, NAME) \
94
#define GEN32(func, NAME)                                                     \
75 95
static GenOpFunc *NAME ## _table [32] = {                                     \
76 96
NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3,                                   \
77 97
NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7,                                   \
......
136 156
#if !defined(CONFIG_USER_ONLY)
137 157
    int supervisor;
138 158
#endif
159
#if defined(TARGET_PPC64)
160
    int sf_mode;
161
#endif
139 162
    int fpu_enabled;
140 163
    ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */
141 164
    int singlestep_enabled;
......
156 179

  
157 180
static inline void gen_set_Rc0 (DisasContext *ctx)
158 181
{
159
    gen_op_cmpi(0);
182
#if defined(TARGET_PPC64)
183
    if (ctx->sf_mode)
184
        gen_op_cmpi_64(0);
185
    else
186
#endif
187
        gen_op_cmpi(0);
160 188
    gen_op_set_Rc0();
161 189
}
162 190

  
191
static inline void gen_update_nip (DisasContext *ctx, target_ulong nip)
192
{
193
#if defined(TARGET_PPC64)
194
    if (ctx->sf_mode)
195
        gen_op_update_nip_64(nip >> 32, nip);
196
    else
197
#endif
198
        gen_op_update_nip(nip);
199
}
200

  
163 201
#define RET_EXCP(ctx, excp, error)                                            \
164 202
do {                                                                          \
165 203
    if ((ctx)->exception == EXCP_NONE) {                                      \
166
        gen_op_update_nip((ctx)->nip);                                        \
204
        gen_update_nip(ctx, (ctx)->nip);                                      \
167 205
    }                                                                         \
168 206
    gen_op_raise_exception_err((excp), (error));                              \
169 207
    ctx->exception = (excp);                                                  \
......
181 219
/* Stop translation */
182 220
static inline void RET_STOP (DisasContext *ctx)
183 221
{
184
    gen_op_update_nip((ctx)->nip);
222
    gen_update_nip(ctx, ctx->nip);
185 223
    ctx->exception = EXCP_MTMSR;
186 224
}
187 225

  
......
209 247

  
210 248
/***                           Instruction decoding                        ***/
211 249
#define EXTRACT_HELPER(name, shift, nb)                                       \
212
static inline target_ulong name (uint32_t opcode)                             \
250
static inline uint32_t name (uint32_t opcode)                                 \
213 251
{                                                                             \
214 252
    return (opcode >> (shift)) & ((1 << (nb)) - 1);                           \
215 253
}
216 254

  
217 255
#define EXTRACT_SHELPER(name, shift, nb)                                      \
218
static inline target_long name (uint32_t opcode)                              \
256
static inline int32_t name (uint32_t opcode)                                  \
219 257
{                                                                             \
220 258
    return (int16_t)((opcode >> (shift)) & ((1 << (nb)) - 1));                \
221 259
}
......
329 367
#define OPC_ALIGN 4
330 368
#endif
331 369
#if defined(__APPLE__)
332
#define OPCODES_SECTION \
370
#define OPCODES_SECTION                                                       \
333 371
    __attribute__ ((section("__TEXT,__opcodes"), unused, aligned (OPC_ALIGN) ))
334 372
#else
335
#define OPCODES_SECTION \
373
#define OPCODES_SECTION                                                       \
336 374
    __attribute__ ((section(".opcodes"), unused, aligned (OPC_ALIGN) ))
337 375
#endif
338 376

  
......
397 435
};
398 436

  
399 437
/***                           Integer arithmetic                          ***/
400
#define __GEN_INT_ARITH2(name, opc1, opc2, opc3, inval)                       \
401
GEN_HANDLER(name, opc1, opc2, opc3, inval, PPC_INTEGER)                       \
438
#define __GEN_INT_ARITH2(name, opc1, opc2, opc3, inval, type)                 \
439
GEN_HANDLER(name, opc1, opc2, opc3, inval, type)                              \
402 440
{                                                                             \
403 441
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
404 442
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
......
408 446
        gen_set_Rc0(ctx);                                                     \
409 447
}
410 448

  
411
#define __GEN_INT_ARITH2_O(name, opc1, opc2, opc3, inval)                     \
412
GEN_HANDLER(name, opc1, opc2, opc3, inval, PPC_INTEGER)                       \
449
#define __GEN_INT_ARITH2_O(name, opc1, opc2, opc3, inval, type)               \
450
GEN_HANDLER(name, opc1, opc2, opc3, inval, type)                              \
413 451
{                                                                             \
414 452
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
415 453
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
......
419 457
        gen_set_Rc0(ctx);                                                     \
420 458
}
421 459

  
422
#define __GEN_INT_ARITH1(name, opc1, opc2, opc3)                              \
423
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, PPC_INTEGER)                  \
460
#define __GEN_INT_ARITH1(name, opc1, opc2, opc3, type)                        \
461
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type)                         \
424 462
{                                                                             \
425 463
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
426 464
    gen_op_##name();                                                          \
......
428 466
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
429 467
        gen_set_Rc0(ctx);                                                     \
430 468
}
431
#define __GEN_INT_ARITH1_O(name, opc1, opc2, opc3)                            \
432
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, PPC_INTEGER)                  \
469
#define __GEN_INT_ARITH1_O(name, opc1, opc2, opc3, type)                      \
470
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type)                         \
433 471
{                                                                             \
434 472
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
435 473
    gen_op_##name();                                                          \
......
439 477
}
440 478

  
441 479
/* Two operands arithmetic functions */
442
#define GEN_INT_ARITH2(name, opc1, opc2, opc3)                                \
443
__GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000000)                          \
444
__GEN_INT_ARITH2_O(name##o, opc1, opc2, opc3 | 0x10, 0x00000000)
480
#define GEN_INT_ARITH2(name, opc1, opc2, opc3, type)                          \
481
__GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000000, type)                    \
482
__GEN_INT_ARITH2_O(name##o, opc1, opc2, opc3 | 0x10, 0x00000000, type)
483

  
484
/* Two operands arithmetic functions with no overflow allowed */
485
#define GEN_INT_ARITHN(name, opc1, opc2, opc3, type)                          \
486
__GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000400, type)
487

  
488
/* One operand arithmetic functions */
489
#define GEN_INT_ARITH1(name, opc1, opc2, opc3, type)                          \
490
__GEN_INT_ARITH1(name, opc1, opc2, opc3, type)                                \
491
__GEN_INT_ARITH1_O(name##o, opc1, opc2, opc3 | 0x10, type)
492

  
493
#if defined(TARGET_PPC64)
494
#define __GEN_INT_ARITH2_64(name, opc1, opc2, opc3, inval, type)              \
495
GEN_HANDLER(name, opc1, opc2, opc3, inval, type)                              \
496
{                                                                             \
497
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
498
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
499
    if (ctx->sf_mode)                                                         \
500
        gen_op_##name##_64();                                                 \
501
    else                                                                      \
502
        gen_op_##name();                                                      \
503
    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
504
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
505
        gen_set_Rc0(ctx);                                                     \
506
}
507

  
508
#define __GEN_INT_ARITH2_O_64(name, opc1, opc2, opc3, inval, type)            \
509
GEN_HANDLER(name, opc1, opc2, opc3, inval, type)                              \
510
{                                                                             \
511
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
512
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
513
    if (ctx->sf_mode)                                                         \
514
        gen_op_##name##_64();                                                 \
515
    else                                                                      \
516
        gen_op_##name();                                                      \
517
    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
518
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
519
        gen_set_Rc0(ctx);                                                     \
520
}
521

  
522
#define __GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type)                     \
523
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type)                         \
524
{                                                                             \
525
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
526
    if (ctx->sf_mode)                                                         \
527
        gen_op_##name##_64();                                                 \
528
    else                                                                      \
529
        gen_op_##name();                                                      \
530
    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
531
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
532
        gen_set_Rc0(ctx);                                                     \
533
}
534
#define __GEN_INT_ARITH1_O_64(name, opc1, opc2, opc3, type)                   \
535
GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type)                         \
536
{                                                                             \
537
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
538
    if (ctx->sf_mode)                                                         \
539
        gen_op_##name##_64();                                                 \
540
    else                                                                      \
541
        gen_op_##name();                                                      \
542
    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \
543
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
544
        gen_set_Rc0(ctx);                                                     \
545
}
546

  
547
/* Two operands arithmetic functions */
548
#define GEN_INT_ARITH2_64(name, opc1, opc2, opc3, type)                       \
549
__GEN_INT_ARITH2_64(name, opc1, opc2, opc3, 0x00000000, type)                 \
550
__GEN_INT_ARITH2_O_64(name##o, opc1, opc2, opc3 | 0x10, 0x00000000, type)
445 551

  
446 552
/* Two operands arithmetic functions with no overflow allowed */
447
#define GEN_INT_ARITHN(name, opc1, opc2, opc3)                                \
448
__GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000400)
553
#define GEN_INT_ARITHN_64(name, opc1, opc2, opc3, type)                       \
554
__GEN_INT_ARITH2_64(name, opc1, opc2, opc3, 0x00000400, type)
449 555

  
450 556
/* One operand arithmetic functions */
451
#define GEN_INT_ARITH1(name, opc1, opc2, opc3)                                \
452
__GEN_INT_ARITH1(name, opc1, opc2, opc3)                                      \
453
__GEN_INT_ARITH1_O(name##o, opc1, opc2, opc3 | 0x10)
557
#define GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type)                       \
558
__GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type)                             \
559
__GEN_INT_ARITH1_O_64(name##o, opc1, opc2, opc3 | 0x10, type)
560
#else
561
#define GEN_INT_ARITH2_64 GEN_INT_ARITH2
562
#define GEN_INT_ARITHN_64 GEN_INT_ARITHN
563
#define GEN_INT_ARITH1_64 GEN_INT_ARITH1
564
#endif
454 565

  
455 566
/* add    add.    addo    addo.    */
456
GEN_INT_ARITH2 (add,    0x1F, 0x0A, 0x08);
567
static inline void gen_op_addo (void)
568
{
569
    gen_op_move_T2_T0();
570
    gen_op_add();
571
    gen_op_check_addo();
572
}
573
#if defined(TARGET_PPC64)
574
#define gen_op_add_64 gen_op_add
575
static inline void gen_op_addo_64 (void)
576
{
577
    gen_op_move_T2_T0();
578
    gen_op_add();
579
    gen_op_check_addo_64();
580
}
581
#endif
582
GEN_INT_ARITH2_64 (add,    0x1F, 0x0A, 0x08, PPC_INTEGER);
457 583
/* addc   addc.   addco   addco.   */
458
GEN_INT_ARITH2 (addc,   0x1F, 0x0A, 0x00);
584
static inline void gen_op_addc (void)
585
{
586
    gen_op_move_T2_T0();
587
    gen_op_add();
588
    gen_op_check_addc();
589
}
590
static inline void gen_op_addco (void)
591
{
592
    gen_op_move_T2_T0();
593
    gen_op_add();
594
    gen_op_check_addc();
595
    gen_op_check_addo();
596
}
597
#if defined(TARGET_PPC64)
598
static inline void gen_op_addc_64 (void)
599
{
600
    gen_op_move_T2_T0();
601
    gen_op_add();
602
    gen_op_check_addc_64();
603
}
604
static inline void gen_op_addco_64 (void)
605
{
606
    gen_op_move_T2_T0();
607
    gen_op_add();
608
    gen_op_check_addc_64();
609
    gen_op_check_addo_64();
610
}
611
#endif
612
GEN_INT_ARITH2_64 (addc,   0x1F, 0x0A, 0x00, PPC_INTEGER);
459 613
/* adde   adde.   addeo   addeo.   */
460
GEN_INT_ARITH2 (adde,   0x1F, 0x0A, 0x04);
614
static inline void gen_op_addeo (void)
615
{
616
    gen_op_move_T2_T0();
617
    gen_op_adde();
618
    gen_op_check_addo();
619
}
620
#if defined(TARGET_PPC64)
621
static inline void gen_op_addeo_64 (void)
622
{
623
    gen_op_move_T2_T0();
624
    gen_op_adde_64();
625
    gen_op_check_addo_64();
626
}
627
#endif
628
GEN_INT_ARITH2_64 (adde,   0x1F, 0x0A, 0x04, PPC_INTEGER);
461 629
/* addme  addme.  addmeo  addmeo.  */
462
GEN_INT_ARITH1 (addme,  0x1F, 0x0A, 0x07);
630
static inline void gen_op_addme (void)
631
{
632
    gen_op_move_T1_T0();
633
    gen_op_add_me();
634
}
635
#if defined(TARGET_PPC64)
636
static inline void gen_op_addme_64 (void)
637
{
638
    gen_op_move_T1_T0();
639
    gen_op_add_me_64();
640
}
641
#endif
642
GEN_INT_ARITH1_64 (addme,  0x1F, 0x0A, 0x07, PPC_INTEGER);
463 643
/* addze  addze.  addzeo  addzeo.  */
464
GEN_INT_ARITH1 (addze,  0x1F, 0x0A, 0x06);
644
static inline void gen_op_addze (void)
645
{
646
    gen_op_move_T2_T0();
647
    gen_op_add_ze();
648
    gen_op_check_addc();
649
}
650
static inline void gen_op_addzeo (void)
651
{
652
    gen_op_move_T2_T0();
653
    gen_op_add_ze();
654
    gen_op_check_addc();
655
    gen_op_check_addo();
656
}
657
#if defined(TARGET_PPC64)
658
static inline void gen_op_addze_64 (void)
659
{
660
    gen_op_move_T2_T0();
661
    gen_op_add_ze();
662
    gen_op_check_addc_64();
663
}
664
static inline void gen_op_addzeo_64 (void)
665
{
666
    gen_op_move_T2_T0();
667
    gen_op_add_ze();
668
    gen_op_check_addc_64();
669
    gen_op_check_addo_64();
670
}
671
#endif
672
GEN_INT_ARITH1_64 (addze,  0x1F, 0x0A, 0x06, PPC_INTEGER);
465 673
/* divw   divw.   divwo   divwo.   */
466
GEN_INT_ARITH2 (divw,   0x1F, 0x0B, 0x0F);
674
GEN_INT_ARITH2 (divw,   0x1F, 0x0B, 0x0F, PPC_INTEGER);
467 675
/* divwu  divwu.  divwuo  divwuo.  */
468
GEN_INT_ARITH2 (divwu,  0x1F, 0x0B, 0x0E);
676
GEN_INT_ARITH2 (divwu,  0x1F, 0x0B, 0x0E, PPC_INTEGER);
469 677
/* mulhw  mulhw.                   */
470
GEN_INT_ARITHN (mulhw,  0x1F, 0x0B, 0x02);
678
GEN_INT_ARITHN (mulhw,  0x1F, 0x0B, 0x02, PPC_INTEGER);
471 679
/* mulhwu mulhwu.                  */
472
GEN_INT_ARITHN (mulhwu, 0x1F, 0x0B, 0x00);
680
GEN_INT_ARITHN (mulhwu, 0x1F, 0x0B, 0x00, PPC_INTEGER);
473 681
/* mullw  mullw.  mullwo  mullwo.  */
474
GEN_INT_ARITH2 (mullw,  0x1F, 0x0B, 0x07);
682
GEN_INT_ARITH2 (mullw,  0x1F, 0x0B, 0x07, PPC_INTEGER);
475 683
/* neg    neg.    nego    nego.    */
476
GEN_INT_ARITH1 (neg,    0x1F, 0x08, 0x03);
684
GEN_INT_ARITH1_64 (neg,    0x1F, 0x08, 0x03, PPC_INTEGER);
477 685
/* subf   subf.   subfo   subfo.   */
478
GEN_INT_ARITH2 (subf,   0x1F, 0x08, 0x01);
686
static inline void gen_op_subfo (void)
687
{
688
    gen_op_move_T2_T0();
689
    gen_op_subf();
690
    gen_op_check_subfo();
691
}
692
#if defined(TARGET_PPC64)
693
#define gen_op_subf_64 gen_op_subf
694
static inline void gen_op_subfo_64 (void)
695
{
696
    gen_op_move_T2_T0();
697
    gen_op_subf();
698
    gen_op_check_subfo_64();
699
}
700
#endif
701
GEN_INT_ARITH2_64 (subf,   0x1F, 0x08, 0x01, PPC_INTEGER);
479 702
/* subfc  subfc.  subfco  subfco.  */
480
GEN_INT_ARITH2 (subfc,  0x1F, 0x08, 0x00);
703
static inline void gen_op_subfc (void)
704
{
705
    gen_op_subf();
706
    gen_op_check_subfc();
707
}
708
static inline void gen_op_subfco (void)
709
{
710
    gen_op_move_T2_T0();
711
    gen_op_subf();
712
    gen_op_check_subfc();
713
    gen_op_check_subfo();
714
}
715
#if defined(TARGET_PPC64)
716
static inline void gen_op_subfc_64 (void)
717
{
718
    gen_op_subf();
719
    gen_op_check_subfc_64();
720
}
721
static inline void gen_op_subfco_64 (void)
722
{
723
    gen_op_move_T2_T0();
724
    gen_op_subf();
725
    gen_op_check_subfc_64();
726
    gen_op_check_subfo_64();
727
}
728
#endif
729
GEN_INT_ARITH2_64 (subfc,  0x1F, 0x08, 0x00, PPC_INTEGER);
481 730
/* subfe  subfe.  subfeo  subfeo.  */
482
GEN_INT_ARITH2 (subfe,  0x1F, 0x08, 0x04);
731
static inline void gen_op_subfeo (void)
732
{
733
    gen_op_move_T2_T0();
734
    gen_op_subfe();
735
    gen_op_check_subfo();
736
}
737
#if defined(TARGET_PPC64)
738
#define gen_op_subfe_64 gen_op_subfe
739
static inline void gen_op_subfeo_64 (void)
740
{
741
    gen_op_move_T2_T0();
742
    gen_op_subfe_64();
743
    gen_op_check_subfo_64();
744
}
745
#endif
746
GEN_INT_ARITH2_64 (subfe,  0x1F, 0x08, 0x04, PPC_INTEGER);
483 747
/* subfme subfme. subfmeo subfmeo. */
484
GEN_INT_ARITH1 (subfme, 0x1F, 0x08, 0x07);
748
GEN_INT_ARITH1_64 (subfme, 0x1F, 0x08, 0x07, PPC_INTEGER);
485 749
/* subfze subfze. subfzeo subfzeo. */
486
GEN_INT_ARITH1 (subfze, 0x1F, 0x08, 0x06);
750
GEN_INT_ARITH1_64 (subfze, 0x1F, 0x08, 0x06, PPC_INTEGER);
487 751
/* addi */
488 752
GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
489 753
{
......
491 755

  
492 756
    if (rA(ctx->opcode) == 0) {
493 757
        /* li case */
494
        gen_op_set_T0(simm);
758
        gen_set_T0(simm);
495 759
    } else {
496 760
        gen_op_load_gpr_T0(rA(ctx->opcode));
497 761
        if (likely(simm != 0))
......
505 769
    target_long simm = SIMM(ctx->opcode);
506 770

  
507 771
    gen_op_load_gpr_T0(rA(ctx->opcode));
508
    if (likely(simm != 0))
509
        gen_op_addic(SIMM(ctx->opcode));
772
    if (likely(simm != 0)) {
773
        gen_op_move_T2_T0();
774
        gen_op_addi(simm);
775
#if defined(TARGET_PPC64)
776
        if (ctx->sf_mode)
777
            gen_op_check_addc_64();
778
        else
779
#endif
780
            gen_op_check_addc();
781
    }
510 782
    gen_op_store_T0_gpr(rD(ctx->opcode));
511 783
}
512 784
/* addic. */
......
515 787
    target_long simm = SIMM(ctx->opcode);
516 788

  
517 789
    gen_op_load_gpr_T0(rA(ctx->opcode));
518
    if (likely(simm != 0))
519
        gen_op_addic(SIMM(ctx->opcode));
790
    if (likely(simm != 0)) {
791
        gen_op_move_T2_T0();
792
        gen_op_addi(simm);
793
#if defined(TARGET_PPC64)
794
        if (ctx->sf_mode)
795
            gen_op_check_addc_64();
796
        else
797
#endif
798
            gen_op_check_addc();
799
    }
520 800
    gen_op_store_T0_gpr(rD(ctx->opcode));
521 801
    gen_set_Rc0(ctx);
522 802
}
......
527 807

  
528 808
    if (rA(ctx->opcode) == 0) {
529 809
        /* lis case */
530
        gen_op_set_T0(simm << 16);
810
        gen_set_T0(simm << 16);
531 811
    } else {
532 812
        gen_op_load_gpr_T0(rA(ctx->opcode));
533 813
        if (likely(simm != 0))
......
546 826
GEN_HANDLER(subfic, 0x08, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
547 827
{
548 828
    gen_op_load_gpr_T0(rA(ctx->opcode));
549
    gen_op_subfic(SIMM(ctx->opcode));
829
#if defined(TARGET_PPC64)
830
    if (ctx->sf_mode)
831
        gen_op_subfic_64(SIMM(ctx->opcode));
832
    else
833
#endif
834
        gen_op_subfic(SIMM(ctx->opcode));
550 835
    gen_op_store_T0_gpr(rD(ctx->opcode));
551 836
}
552 837

  
838
#if defined(TARGET_PPC64)
839
/* mulhd  mulhd.                   */
840
GEN_INT_ARITHN (mulhd,  0x1F, 0x09, 0x02, PPC_INTEGER);
841
/* mulhdu mulhdu.                  */
842
GEN_INT_ARITHN (mulhdu, 0x1F, 0x09, 0x00, PPC_INTEGER);
843
/* mulld  mulld.  mulldo  mulldo.  */
844
GEN_INT_ARITH2 (mulld,  0x1F, 0x09, 0x07, PPC_INTEGER);
845
/* divd   divd.   divdo   divdo.   */
846
GEN_INT_ARITH2 (divd,   0x1F, 0x09, 0x0F, PPC_INTEGER);
847
/* divdu  divdu.  divduo  divduo.  */
848
GEN_INT_ARITH2 (divdu,  0x1F, 0x09, 0x0E, PPC_INTEGER);
849
#endif
850

  
553 851
/***                           Integer comparison                          ***/
554
#define GEN_CMP(name, opc)                                                    \
555
GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, PPC_INTEGER)                   \
852
#if defined(TARGET_PPC64)
853
#define GEN_CMP(name, opc, type)                                              \
854
GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, type)                          \
855
{                                                                             \
856
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
857
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
858
    if (ctx->sf_mode)                                                         \
859
        gen_op_##name##_64();                                                 \
860
    else                                                                      \
861
        gen_op_##name();                                                      \
862
    gen_op_store_T0_crf(crfD(ctx->opcode));                                   \
863
}
864
#else
865
#define GEN_CMP(name, opc, type)                                              \
866
GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, type)                          \
556 867
{                                                                             \
557 868
    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \
558 869
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
559 870
    gen_op_##name();                                                          \
560 871
    gen_op_store_T0_crf(crfD(ctx->opcode));                                   \
561 872
}
873
#endif
562 874

  
563 875
/* cmp */
564
GEN_CMP(cmp, 0x00);
876
GEN_CMP(cmp, 0x00, PPC_INTEGER);
565 877
/* cmpi */
566 878
GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)
567 879
{
568 880
    gen_op_load_gpr_T0(rA(ctx->opcode));
569
    gen_op_cmpi(SIMM(ctx->opcode));
881
#if defined(TARGET_PPC64)
882
    if (ctx->sf_mode)
883
        gen_op_cmpi_64(SIMM(ctx->opcode));
884
    else
885
#endif
886
        gen_op_cmpi(SIMM(ctx->opcode));
570 887
    gen_op_store_T0_crf(crfD(ctx->opcode));
571 888
}
572 889
/* cmpl */
573
GEN_CMP(cmpl, 0x01);
890
GEN_CMP(cmpl, 0x01, PPC_INTEGER);
574 891
/* cmpli */
575 892
GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)
576 893
{
577 894
    gen_op_load_gpr_T0(rA(ctx->opcode));
578
    gen_op_cmpli(UIMM(ctx->opcode));
895
#if defined(TARGET_PPC64)
896
    if (ctx->sf_mode)
897
        gen_op_cmpli_64(UIMM(ctx->opcode));
898
    else
899
#endif
900
        gen_op_cmpli(UIMM(ctx->opcode));
579 901
    gen_op_store_T0_crf(crfD(ctx->opcode));
580 902
}
581 903

  
904
/* isel (PowerPC 2.03 specification) */
905
GEN_HANDLER(isel, 0x1F, 0x0F, 0x00, 0x00000001, PPC_203)
906
{
907
    uint32_t bi = rC(ctx->opcode);
908
    uint32_t mask;
909

  
910
    if (rA(ctx->opcode) == 0) {
911
        gen_set_T0(0);
912
    } else {
913
        gen_op_load_gpr_T1(rA(ctx->opcode));
914
    }
915
    gen_op_load_gpr_T2(rB(ctx->opcode));
916
    mask = 1 << (3 - (bi & 0x03));
917
    gen_op_load_crf_T0(bi >> 2);
918
    gen_op_test_true(mask);
919
    gen_op_isel();
920
    gen_op_store_T0_gpr(rD(ctx->opcode));
921
}
922

  
582 923
/***                            Integer logical                            ***/
583
#define __GEN_LOGICAL2(name, opc2, opc3)                                      \
584
GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000000, PPC_INTEGER)                  \
924
#define __GEN_LOGICAL2(name, opc2, opc3, type)                                \
925
GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000000, type)                         \
585 926
{                                                                             \
586 927
    gen_op_load_gpr_T0(rS(ctx->opcode));                                      \
587 928
    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \
......
590 931
    if (unlikely(Rc(ctx->opcode) != 0))                                       \
591 932
        gen_set_Rc0(ctx);                                                     \
592 933
}
593
#define GEN_LOGICAL2(name, opc)                                               \
594
__GEN_LOGICAL2(name, 0x1C, opc)
934
#define GEN_LOGICAL2(name, opc, type)                                         \
935
__GEN_LOGICAL2(name, 0x1C, opc, type)
595 936

  
596
#define GEN_LOGICAL1(name, opc)                                               \
597
GEN_HANDLER(name, 0x1F, 0x1A, opc, 0x00000000, PPC_INTEGER)                   \
937
#define GEN_LOGICAL1(name, opc, type)                                         \
938
GEN_HANDLER(name, 0x1F, 0x1A, opc, 0x00000000, type)                          \
598 939
{                                                                             \
599 940
    gen_op_load_gpr_T0(rS(ctx->opcode));                                      \
600 941
    gen_op_##name();                                                          \
......
604 945
}
605 946

  
606 947
/* and & and. */
607
GEN_LOGICAL2(and, 0x00);
948
GEN_LOGICAL2(and, 0x00, PPC_INTEGER);
608 949
/* andc & andc. */
609
GEN_LOGICAL2(andc, 0x01);
950
GEN_LOGICAL2(andc, 0x01, PPC_INTEGER);
610 951
/* andi. */
611 952
GEN_HANDLER(andi_, 0x1C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
612 953
{
......
625 966
}
626 967

  
627 968
/* cntlzw */
628
GEN_LOGICAL1(cntlzw, 0x00);
969
GEN_LOGICAL1(cntlzw, 0x00, PPC_INTEGER);
629 970
/* eqv & eqv. */
630
GEN_LOGICAL2(eqv, 0x08);
971
GEN_LOGICAL2(eqv, 0x08, PPC_INTEGER);
631 972
/* extsb & extsb. */
632
GEN_LOGICAL1(extsb, 0x1D);
973
GEN_LOGICAL1(extsb, 0x1D, PPC_INTEGER);
633 974
/* extsh & extsh. */
634
GEN_LOGICAL1(extsh, 0x1C);
975
GEN_LOGICAL1(extsh, 0x1C, PPC_INTEGER);
635 976
/* nand & nand. */
636
GEN_LOGICAL2(nand, 0x0E);
977
GEN_LOGICAL2(nand, 0x0E, PPC_INTEGER);
637 978
/* nor & nor. */
638
GEN_LOGICAL2(nor, 0x03);
979
GEN_LOGICAL2(nor, 0x03, PPC_INTEGER);
639 980

  
640 981
/* or & or. */
641 982
GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER)
......
662 1003
}
663 1004

  
664 1005
/* orc & orc. */
665
GEN_LOGICAL2(orc, 0x0C);
1006
GEN_LOGICAL2(orc, 0x0C, PPC_INTEGER);
666 1007
/* xor & xor. */
667 1008
GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER)
668 1009
{
......
737 1078
    gen_op_store_T0_gpr(rA(ctx->opcode));
738 1079
}
739 1080

  
1081
/* popcntb : PowerPC 2.03 specification */
1082
GEN_HANDLER(popcntb, 0x1F, 0x03, 0x03, 0x0000F801, PPC_203)
1083
{
1084
    gen_op_load_gpr_T0(rS(ctx->opcode));
1085
#if defined(TARGET_PPC64)
1086
    if (ctx->sf_mode)
1087
        gen_op_popcntb_64();
1088
    else
1089
#endif
1090
        gen_op_popcntb();
1091
    gen_op_store_T0_gpr(rA(ctx->opcode));
1092
}
1093

  
1094
#if defined(TARGET_PPC64)
1095
/* extsw & extsw. */
1096
GEN_LOGICAL1(extsw, 0x1E, PPC_64B);
1097
/* cntlzd */
1098
GEN_LOGICAL1(cntlzd, 0x01, PPC_64B);
1099
#endif
1100

  
740 1101
/***                             Integer rotate                            ***/
741 1102
/* rlwimi & rlwimi. */
742 1103
GEN_HANDLER(rlwimi, 0x14, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
......
838 1199
        gen_set_Rc0(ctx);
839 1200
}
840 1201

  
1202
#if defined(TARGET_PPC64)
1203
#define GEN_PPC64_R2(name, opc1, opc2)                                        \
1204
GEN_HANDLER(name##0, opc1, opc2, 0xFF, 0x00000000, PPC_64B)                   \
1205
{                                                                             \
1206
    gen_##name(ctx, 0);                                                       \
1207
}                                                                             \
1208
GEN_HANDLER(name##1, opc1, opc2 | 0x10, 0xFF, 0x00000000, PPC_64B)            \
1209
{                                                                             \
1210
    gen_##name(ctx, 1);                                                       \
1211
}
1212
#define GEN_PPC64_R4(name, opc1, opc2)                                        \
1213
GEN_HANDLER(name##0, opc1, opc2, 0xFF, 0x00000000, PPC_64B)                   \
1214
{                                                                             \
1215
    gen_##name(ctx, 0, 0);                                                    \
1216
}                                                                             \
1217
GEN_HANDLER(name##1, opc1, opc2 | 0x01, 0xFF, 0x00000000, PPC_64B)            \
1218
{                                                                             \
1219
    gen_##name(ctx, 0, 1);                                                    \
1220
}                                                                             \
1221
GEN_HANDLER(name##2, opc1, opc2 | 0x10, 0xFF, 0x00000000, PPC_64B)            \
1222
{                                                                             \
1223
    gen_##name(ctx, 1, 0);                                                    \
1224
}                                                                             \
1225
GEN_HANDLER(name##3, opc1, opc2 | 0x11, 0xFF, 0x00000000, PPC_64B)            \
1226
{                                                                             \
1227
    gen_##name(ctx, 1, 1);                                                    \
1228
}
1229
/* rldicl - rldicl. */
1230
static inline void gen_rldicl (DisasContext *ctx, int mbn, int shn)
1231
{
1232
    int sh, mb;
1233

  
1234
    sh = SH(ctx->opcode) | (1 << shn);
1235
    mb = (MB(ctx->opcode) << 1) | mbn;
1236
    /* XXX: TODO */
1237
    RET_INVAL(ctx);
1238
}
1239
GEN_PPC64_R4(rldicl, 0x1E, 0x00)
1240
/* rldicr - rldicr. */
1241
static inline void gen_rldicr (DisasContext *ctx, int men, int shn)
1242
{
1243
    int sh, me;
1244

  
1245
    sh = SH(ctx->opcode) | (1 << shn);
1246
    me = (MB(ctx->opcode) << 1) | men;
1247
    /* XXX: TODO */
1248
    RET_INVAL(ctx);
1249
}
1250
GEN_PPC64_R4(rldicr, 0x1E, 0x02)
1251
/* rldic - rldic. */
1252
static inline void gen_rldic (DisasContext *ctx, int mbn, int shn)
1253
{
1254
    int sh, mb;
1255

  
1256
    sh = SH(ctx->opcode) | (1 << shn);
1257
    mb = (MB(ctx->opcode) << 1) | mbn;
1258
    /* XXX: TODO */
1259
    RET_INVAL(ctx);
1260
}
1261
GEN_PPC64_R4(rldic, 0x1E, 0x04)
1262
/* rldcl - rldcl. */
1263
static inline void gen_rldcl (DisasContext *ctx, int mbn)
1264
{
1265
    int mb;
1266

  
1267
    mb = (MB(ctx->opcode) << 1) | mbn;
1268
    /* XXX: TODO */
1269
    RET_INVAL(ctx);
1270
}
1271
GEN_PPC64_R2(rldcl, 0x1E, 0x08)
1272
/* rldcr - rldcr. */
1273
static inline void gen_rldcr (DisasContext *ctx, int men)
1274
{
1275
    int me;
1276

  
1277
    me = (MB(ctx->opcode) << 1) | men;
1278
    /* XXX: TODO */
1279
    RET_INVAL(ctx);
1280
}
1281
GEN_PPC64_R2(rldcr, 0x1E, 0x09)
1282
/* rldimi - rldimi. */
1283
static inline void gen_rldimi (DisasContext *ctx, int mbn, int shn)
1284
{
1285
    int sh, mb;
1286

  
1287
    sh = SH(ctx->opcode) | (1 << shn);
1288
    mb = (MB(ctx->opcode) << 1) | mbn;
1289
    /* XXX: TODO */
1290
    RET_INVAL(ctx);
1291
}
1292
GEN_PPC64_R4(rldimi, 0x1E, 0x06)
1293
#endif
1294

  
841 1295
/***                             Integer shift                             ***/
842 1296
/* slw & slw. */
843
__GEN_LOGICAL2(slw, 0x18, 0x00);
1297
__GEN_LOGICAL2(slw, 0x18, 0x00, PPC_INTEGER);
844 1298
/* sraw & sraw. */
845
__GEN_LOGICAL2(sraw, 0x18, 0x18);
1299
__GEN_LOGICAL2(sraw, 0x18, 0x18, PPC_INTEGER);
846 1300
/* srawi & srawi. */
847 1301
GEN_HANDLER(srawi, 0x1F, 0x18, 0x19, 0x00000000, PPC_INTEGER)
848 1302
{
1303
    int mb, me;
849 1304
    gen_op_load_gpr_T0(rS(ctx->opcode));
850
    if (SH(ctx->opcode) != 0)
851
        gen_op_srawi(SH(ctx->opcode), MASK(32 - SH(ctx->opcode), 31));
1305
    if (SH(ctx->opcode) != 0) {
1306
        gen_op_move_T1_T0();
1307
        mb = 32 - SH(ctx->opcode);
1308
        me = 31;
1309
#if defined(TARGET_PPC64)
1310
        mb += 32;
1311
        me += 32;
1312
#endif
1313
        gen_op_srawi(SH(ctx->opcode), MASK(mb, me));
1314
    }
852 1315
    gen_op_store_T0_gpr(rA(ctx->opcode));
853 1316
    if (unlikely(Rc(ctx->opcode) != 0))
854 1317
        gen_set_Rc0(ctx);
855 1318
}
856 1319
/* srw & srw. */
857
__GEN_LOGICAL2(srw, 0x18, 0x10);
1320
__GEN_LOGICAL2(srw, 0x18, 0x10, PPC_INTEGER);
1321

  
1322
#if defined(TARGET_PPC64)
1323
/* sld & sld. */
1324
__GEN_LOGICAL2(sld, 0x1B, 0x00, PPC_64B);
1325
/* srad & srad. */
1326
__GEN_LOGICAL2(srad, 0x1A, 0x18, PPC_64B);
1327
/* sradi & sradi. */
1328
static inline void gen_sradi (DisasContext *ctx, int n)
1329
{
1330
    uint64_t mask;
1331
    int sh, mb, me;
1332

  
1333
    gen_op_load_gpr_T0(rS(ctx->opcode));
1334
    sh = SH(ctx->opcode) + (n << 5);
1335
    if (sh != 0) {
1336
        gen_op_move_T1_T0();
1337
        mb = 64 - SH(ctx->opcode);
1338
        me = 63;
1339
        mask = MASK(mb, me);
1340
        gen_op_sradi(sh, mask >> 32, mask);
1341
    }
1342
    gen_op_store_T0_gpr(rA(ctx->opcode));
1343
    if (unlikely(Rc(ctx->opcode) != 0))
1344
        gen_set_Rc0(ctx);
1345
}
1346
GEN_HANDLER(sradi0, 0x1F, 0x1A, 0x19, 0x00000000, PPC_64B)
1347
{
1348
    gen_sradi(ctx, 0);
1349
}
1350
GEN_HANDLER(sradi1, 0x1F, 0x1B, 0x19, 0x00000000, PPC_64B)
1351
{
1352
    gen_sradi(ctx, 1);
1353
}
1354
/* srd & srd. */
1355
__GEN_LOGICAL2(srd, 0x1B, 0x10, PPC_64B);
1356
#endif
858 1357

  
859 1358
/***                       Floating-Point arithmetic                       ***/
860 1359
#define _GEN_FLOAT_ACB(name, op, op1, op2, isfloat)                           \
......
1165 1664
    target_long simm = SIMM(ctx->opcode);
1166 1665

  
1167 1666
    if (rA(ctx->opcode) == 0) {
1168
        gen_op_set_T0(simm);
1667
        gen_set_T0(simm);
1169 1668
    } else {
1170 1669
        gen_op_load_gpr_T0(rA(ctx->opcode));
1171 1670
        if (likely(simm != 0))
......
1196 1695
/***                             Integer load                              ***/
1197 1696
#define op_ldst(name)        (*gen_op_##name[ctx->mem_idx])()
1198 1697
#if defined(CONFIG_USER_ONLY)
1698
#if defined(TARGET_PPC64)
1199 1699
#define OP_LD_TABLE(width)                                                    \
1200 1700
static GenOpFunc *gen_op_l##width[] = {                                       \
1201 1701
    &gen_op_l##width##_raw,                                                   \
1202 1702
    &gen_op_l##width##_le_raw,                                                \
1703
    &gen_op_l##width##_64_raw,                                                \
1704
    &gen_op_l##width##_le_64_raw,                                             \
1203 1705
};
1204 1706
#define OP_ST_TABLE(width)                                                    \
1205 1707
static GenOpFunc *gen_op_st##width[] = {                                      \
1206 1708
    &gen_op_st##width##_raw,                                                  \
1207 1709
    &gen_op_st##width##_le_raw,                                               \
1710
    &gen_op_st##width##_64_raw,                                               \
1711
    &gen_op_st##width##_le_64_raw,                                            \
1208 1712
};
1209 1713
/* Byte access routine are endian safe */
1714
#define gen_op_stb_le_64_raw gen_op_stb_64_raw
1715
#define gen_op_lbz_le_64_raw gen_op_lbz_64_raw
1716
#else
1717
#define OP_LD_TABLE(width)                                                    \
1718
static GenOpFunc *gen_op_l##width[] = {                                       \
1719
    &gen_op_l##width##_raw,                                                   \
1720
    &gen_op_l##width##_le_raw,                                                \
1721
};
1722
#define OP_ST_TABLE(width)                                                    \
1723
static GenOpFunc *gen_op_st##width[] = {                                      \
1724
    &gen_op_st##width##_raw,                                                  \
1725
    &gen_op_st##width##_le_raw,                                               \
1726
};
1727
#endif
1728
/* Byte access routine are endian safe */
1210 1729
#define gen_op_stb_le_raw gen_op_stb_raw
1211 1730
#define gen_op_lbz_le_raw gen_op_lbz_raw
1212 1731
#else
1732
#if defined(TARGET_PPC64)
1213 1733
#define OP_LD_TABLE(width)                                                    \
1214 1734
static GenOpFunc *gen_op_l##width[] = {                                       \
1215 1735
    &gen_op_l##width##_user,                                                  \
1216 1736
    &gen_op_l##width##_le_user,                                               \
1217 1737
    &gen_op_l##width##_kernel,                                                \
1218 1738
    &gen_op_l##width##_le_kernel,                                             \
1739
    &gen_op_l##width##_64_user,                                               \
1740
    &gen_op_l##width##_le_64_user,                                            \
1741
    &gen_op_l##width##_64_kernel,                                             \
1742
    &gen_op_l##width##_le_64_kernel,                                          \
1219 1743
};
1220 1744
#define OP_ST_TABLE(width)                                                    \
1221 1745
static GenOpFunc *gen_op_st##width[] = {                                      \
......
1223 1747
    &gen_op_st##width##_le_user,                                              \
1224 1748
    &gen_op_st##width##_kernel,                                               \
1225 1749
    &gen_op_st##width##_le_kernel,                                            \
1750
    &gen_op_st##width##_64_user,                                              \
1751
    &gen_op_st##width##_le_64_user,                                           \
1752
    &gen_op_st##width##_64_kernel,                                            \
1753
    &gen_op_st##width##_le_64_kernel,                                         \
1226 1754
};
1227 1755
/* Byte access routine are endian safe */
1756
#define gen_op_stb_le_64_user gen_op_stb_64_user
1757
#define gen_op_lbz_le_64_user gen_op_lbz_64_user
1758
#define gen_op_stb_le_64_kernel gen_op_stb_64_kernel
1759
#define gen_op_lbz_le_64_kernel gen_op_lbz_64_kernel
1760
#else
1761
#define OP_LD_TABLE(width)                                                    \
1762
static GenOpFunc *gen_op_l##width[] = {                                       \
1763
    &gen_op_l##width##_user,                                                  \
1764
    &gen_op_l##width##_le_user,                                               \
1765
    &gen_op_l##width##_kernel,                                                \
1766
    &gen_op_l##width##_le_kernel,                                             \
1767
};
1768
#define OP_ST_TABLE(width)                                                    \
1769
static GenOpFunc *gen_op_st##width[] = {                                      \
1770
    &gen_op_st##width##_user,                                                 \
1771
    &gen_op_st##width##_le_user,                                              \
1772
    &gen_op_st##width##_kernel,                                               \
1773
    &gen_op_st##width##_le_kernel,                                            \
1774
};
1775
#endif
1776
/* Byte access routine are endian safe */
1228 1777
#define gen_op_stb_le_user gen_op_stb_user
1229 1778
#define gen_op_lbz_le_user gen_op_lbz_user
1230 1779
#define gen_op_stb_le_kernel gen_op_stb_kernel
1231 1780
#define gen_op_lbz_le_kernel gen_op_lbz_kernel
1232 1781
#endif
1233 1782

  
1234
#define GEN_LD(width, opc)                                                    \
1235
GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)               \
1783
#define GEN_LD(width, opc, type)                                              \
1784
GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, type)                      \
1236 1785
{                                                                             \
1237 1786
    gen_addr_imm_index(ctx);                                                  \
1238 1787
    op_ldst(l##width);                                                        \
1239 1788
    gen_op_store_T1_gpr(rD(ctx->opcode));                                     \
1240 1789
}
1241 1790

  
1242
#define GEN_LDU(width, opc)                                                   \
1243
GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)            \
1791
#define GEN_LDU(width, opc, type)                                             \
1792
GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, type)                   \
1244 1793
{                                                                             \
1245 1794
    if (unlikely(rA(ctx->opcode) == 0 ||                                      \
1246 1795
                 rA(ctx->opcode) == rD(ctx->opcode))) {                       \
......
1253 1802
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
1254 1803
}
1255 1804

  
1256
#define GEN_LDUX(width, opc)                                                  \
1257
GEN_HANDLER(l##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_INTEGER)           \
1805
#define GEN_LDUX(width, opc2, opc3, type)                                     \
1806
GEN_HANDLER(l##width##ux, 0x1F, opc2, opc3, 0x00000001, type)                 \
1258 1807
{                                                                             \
1259 1808
    if (unlikely(rA(ctx->opcode) == 0 ||                                      \
1260 1809
                 rA(ctx->opcode) == rD(ctx->opcode))) {                       \
......
1267 1816
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
1268 1817
}
1269 1818

  
1270
#define GEN_LDX(width, opc2, opc3)                                            \
1271
GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_INTEGER)           \
1819
#define GEN_LDX(width, opc2, opc3, type)                                      \
1820
GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, type)                  \
1272 1821
{                                                                             \
1273 1822
    gen_addr_reg_index(ctx);                                                  \
1274 1823
    op_ldst(l##width);                                                        \
1275 1824
    gen_op_store_T1_gpr(rD(ctx->opcode));                                     \
1276 1825
}
1277 1826

  
1278
#define GEN_LDS(width, op)                                                    \
1827
#define GEN_LDS(width, op, type)                                              \
1279 1828
OP_LD_TABLE(width);                                                           \
1280
GEN_LD(width, op | 0x20);                                                     \
1281
GEN_LDU(width, op | 0x21);                                                    \
1282
GEN_LDUX(width, op | 0x01);                                                   \
1283
GEN_LDX(width, 0x17, op | 0x00)
1829
GEN_LD(width, op | 0x20, type);                                               \
1830
GEN_LDU(width, op | 0x21, type);                                              \
1831
GEN_LDUX(width, 0x17, op | 0x01, type);                                       \
1832
GEN_LDX(width, 0x17, op | 0x00, type)
1284 1833

  
1285 1834
/* lbz lbzu lbzux lbzx */
1286
GEN_LDS(bz, 0x02);
1835
GEN_LDS(bz, 0x02, PPC_INTEGER);
1287 1836
/* lha lhau lhaux lhax */
1288
GEN_LDS(ha, 0x0A);
1837
GEN_LDS(ha, 0x0A, PPC_INTEGER);
1289 1838
/* lhz lhzu lhzux lhzx */
1290
GEN_LDS(hz, 0x08);
1839
GEN_LDS(hz, 0x08, PPC_INTEGER);
1291 1840
/* lwz lwzu lwzux lwzx */
1292
GEN_LDS(wz, 0x00);
1841
GEN_LDS(wz, 0x00, PPC_INTEGER);
1842
#if defined(TARGET_PPC64)
1843
OP_LD_TABLE(wa);
1844
OP_LD_TABLE(d);
1845
/* lwaux */
1846
GEN_LDUX(wa, 0x15, 0x0B, PPC_64B);
1847
/* lwax */
1848
GEN_LDX(wa, 0x15, 0x0A, PPC_64B);
1849
/* ldux */
1850
GEN_LDUX(d, 0x15, 0x01, PPC_64B);
1851
/* ldx */
1852
GEN_LDX(d, 0x15, 0x00, PPC_64B);
1853
GEN_HANDLER(ld, 0x3A, 0xFF, 0xFF, 0x00000000, PPC_64B)
1854
{
1855
    if (Rc(ctx->opcode)) {
1856
        if (unlikely(rA(ctx->opcode) == 0 ||
1857
                     rA(ctx->opcode) == rD(ctx->opcode))) {
1858
            RET_INVAL(ctx);
1859
            return;
1860
        }
1861
    }
1862
    gen_addr_imm_index(ctx);
1863
    if (ctx->opcode & 0x02) {
1864
        /* lwa (lwau is undefined) */
1865
        op_ldst(lwa);
1866
    } else {
1867
        /* ld - ldu */
1868
        op_ldst(ld);
1869
    }
1870
    gen_op_store_T1_gpr(rD(ctx->opcode));
1871
    if (Rc(ctx->opcode))
1872
        gen_op_store_T0_gpr(rA(ctx->opcode));
1873
}
1874
#endif
1293 1875

  
1294 1876
/***                              Integer store                            ***/
1295
#define GEN_ST(width, opc)                                                    \
1296
GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)              \
1877
#define GEN_ST(width, opc, type)                                              \
1878
GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, type)                     \
1297 1879
{                                                                             \
1298 1880
    gen_addr_imm_index(ctx);                                                  \
1299 1881
    gen_op_load_gpr_T1(rS(ctx->opcode));                                      \
1300 1882
    op_ldst(st##width);                                                       \
1301 1883
}
1302 1884

  
1303
#define GEN_STU(width, opc)                                                   \
1304
GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)           \
1885
#define GEN_STU(width, opc, type)                                             \
1886
GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, type)                  \
1305 1887
{                                                                             \
1306 1888
    if (unlikely(rA(ctx->opcode) == 0)) {                                     \
1307 1889
        RET_INVAL(ctx);                                                       \
......
1313 1895
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
1314 1896
}
1315 1897

  
1316
#define GEN_STUX(width, opc)                                                  \
1317
GEN_HANDLER(st##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_INTEGER)          \
1898
#define GEN_STUX(width, opc2, opc3, type)                                     \
1899
GEN_HANDLER(st##width##ux, 0x1F, opc2, opc3, 0x00000001, type)                \
1318 1900
{                                                                             \
1319 1901
    if (unlikely(rA(ctx->opcode) == 0)) {                                     \
1320 1902
        RET_INVAL(ctx);                                                       \
......
1326 1908
    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \
1327 1909
}
1328 1910

  
1329
#define GEN_STX(width, opc2, opc3)                                            \
1330
GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_INTEGER)          \
1911
#define GEN_STX(width, opc2, opc3, type)                                      \
1912
GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, type)                 \
1331 1913
{                                                                             \
1332 1914
    gen_addr_reg_index(ctx);                                                  \
1333 1915
    gen_op_load_gpr_T1(rS(ctx->opcode));                                      \
1334 1916
    op_ldst(st##width);                                                       \
1335 1917
}
1336 1918

  
1337
#define GEN_STS(width, op)                                                    \
1919
#define GEN_STS(width, op, type)                                              \
1338 1920
OP_ST_TABLE(width);                                                           \
1339
GEN_ST(width, op | 0x20);                                                     \
1340
GEN_STU(width, op | 0x21);                                                    \
1341
GEN_STUX(width, op | 0x01);                                                   \
1342
GEN_STX(width, 0x17, op | 0x00)
1921
GEN_ST(width, op | 0x20, type);                                               \
1922
GEN_STU(width, op | 0x21, type);                                              \
1923
GEN_STUX(width, 0x17, op | 0x01, type);                                       \
1924
GEN_STX(width, 0x17, op | 0x00, type)
1343 1925

  
1344 1926
/* stb stbu stbux stbx */
1345
GEN_STS(b, 0x06);
1927
GEN_STS(b, 0x06, PPC_INTEGER);
1346 1928
/* sth sthu sthux sthx */
1347
GEN_STS(h, 0x0C);
1929
GEN_STS(h, 0x0C, PPC_INTEGER);
1348 1930
/* stw stwu stwux stwx */
1349
GEN_STS(w, 0x04);
1350

  
1931
GEN_STS(w, 0x04, PPC_INTEGER);
1932
#if defined(TARGET_PPC64)
1933
OP_ST_TABLE(d);
1934
GEN_STUX(d, 0x15, 0x01, PPC_64B);
1935
GEN_STX(d, 0x15, 0x00, PPC_64B);
1936
GEN_HANDLER(std, 0x3E, 0xFF, 0xFF, 0x00000002, PPC_64B)
1937
{
1938
    if (Rc(ctx->opcode)) {
1939
        if (unlikely(rA(ctx->opcode) == 0)) {
1940
            RET_INVAL(ctx);
1941
            return;
1942
        }
1943
    }
1944
    gen_addr_imm_index(ctx);
1945
    gen_op_load_gpr_T1(rS(ctx->opcode));
1946
    op_ldst(std);
1947
    if (Rc(ctx->opcode))
1948
        gen_op_store_T0_gpr(rA(ctx->opcode));
1949
}
1950
#endif
1351 1951
/***                Integer load and store with byte reverse               ***/
1352 1952
/* lhbrx */
1353 1953
OP_LD_TABLE(hbr);
1354
GEN_LDX(hbr, 0x16, 0x18);
1954
GEN_LDX(hbr, 0x16, 0x18, PPC_INTEGER);
1355 1955
/* lwbrx */
1356 1956
OP_LD_TABLE(wbr);
1357
GEN_LDX(wbr, 0x16, 0x10);
1957
GEN_LDX(wbr, 0x16, 0x10, PPC_INTEGER);
1358 1958
/* sthbrx */
1359 1959
OP_ST_TABLE(hbr);
1360
GEN_STX(hbr, 0x16, 0x1C);
1960
GEN_STX(hbr, 0x16, 0x1C, PPC_INTEGER);
1361 1961
/* stwbrx */
1362 1962
OP_ST_TABLE(wbr);
1363
GEN_STX(wbr, 0x16, 0x14);
1963
GEN_STX(wbr, 0x16, 0x14, PPC_INTEGER);
1364 1964

  
1365 1965
/***                    Integer load and store multiple                    ***/
1366 1966
#define op_ldstm(name, reg) (*gen_op_##name[ctx->mem_idx])(reg)
1967
#if defined(TARGET_PPC64)
1968
#if defined(CONFIG_USER_ONLY)
1969
static GenOpFunc1 *gen_op_lmw[] = {
1970
    &gen_op_lmw_raw,
1971
    &gen_op_lmw_le_raw,
1972
    &gen_op_lmw_64_raw,
1973
    &gen_op_lmw_le_64_raw,
1974
};
1975
static GenOpFunc1 *gen_op_stmw[] = {
1976
    &gen_op_stmw_64_raw,
1977
    &gen_op_stmw_le_64_raw,
1978
};
1979
#else
1980
static GenOpFunc1 *gen_op_lmw[] = {
1981
    &gen_op_lmw_user,
1982
    &gen_op_lmw_le_user,
1983
    &gen_op_lmw_kernel,
1984
    &gen_op_lmw_le_kernel,
1985
    &gen_op_lmw_64_user,
1986
    &gen_op_lmw_le_64_user,
1987
    &gen_op_lmw_64_kernel,
1988
    &gen_op_lmw_le_64_kernel,
1989
};
1990
static GenOpFunc1 *gen_op_stmw[] = {
1991
    &gen_op_stmw_user,
1992
    &gen_op_stmw_le_user,
1993
    &gen_op_stmw_kernel,
1994
    &gen_op_stmw_le_kernel,
1995
    &gen_op_stmw_64_user,
1996
    &gen_op_stmw_le_64_user,
1997
    &gen_op_stmw_64_kernel,
1998
    &gen_op_stmw_le_64_kernel,
1999
};
2000
#endif
2001
#else
1367 2002
#if defined(CONFIG_USER_ONLY)
1368 2003
static GenOpFunc1 *gen_op_lmw[] = {
1369 2004
    &gen_op_lmw_raw,
......
1387 2022
    &gen_op_stmw_le_kernel,
1388 2023
};
1389 2024
#endif
2025
#endif
1390 2026

  
1391 2027
/* lmw */
1392 2028
GEN_HANDLER(lmw, 0x2E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1393 2029
{
1394 2030
    /* NIP cannot be restored if the memory exception comes from an helper */
1395
    gen_op_update_nip(ctx->nip - 4);
2031
    gen_update_nip(ctx, ctx->nip - 4);
1396 2032
    gen_addr_imm_index(ctx);
1397 2033
    op_ldstm(lmw, rD(ctx->opcode));
1398 2034
}
......
1401 2037
GEN_HANDLER(stmw, 0x2F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
1402 2038
{
1403 2039
    /* NIP cannot be restored if the memory exception comes from an helper */
1404
    gen_op_update_nip(ctx->nip - 4);
2040
    gen_update_nip(ctx, ctx->nip - 4);
1405 2041
    gen_addr_imm_index(ctx);
1406 2042
    op_ldstm(stmw, rS(ctx->opcode));
1407 2043
}
......
1409 2045
/***                    Integer load and store strings                     ***/
1410 2046
#define op_ldsts(name, start) (*gen_op_##name[ctx->mem_idx])(start)
1411 2047
#define op_ldstsx(name, rd, ra, rb) (*gen_op_##name[ctx->mem_idx])(rd, ra, rb)
2048
#if defined(TARGET_PPC64)
2049
#if defined(CONFIG_USER_ONLY)
2050
static GenOpFunc1 *gen_op_lswi[] = {
2051
    &gen_op_lswi_raw,
2052
    &gen_op_lswi_le_raw,
2053
    &gen_op_lswi_64_raw,
2054
    &gen_op_lswi_le_64_raw,
2055
};
2056
static GenOpFunc3 *gen_op_lswx[] = {
2057
    &gen_op_lswx_raw,
2058
    &gen_op_lswx_le_raw,
2059
    &gen_op_lswx_64_raw,
2060
    &gen_op_lswx_le_64_raw,
2061
};
2062
static GenOpFunc1 *gen_op_stsw[] = {
2063
    &gen_op_stsw_raw,
2064
    &gen_op_stsw_le_raw,
2065
    &gen_op_stsw_64_raw,
2066
    &gen_op_stsw_le_64_raw,
2067
};
2068
#else
2069
static GenOpFunc1 *gen_op_lswi[] = {
2070
    &gen_op_lswi_user,
2071
    &gen_op_lswi_le_user,
2072
    &gen_op_lswi_kernel,
2073
    &gen_op_lswi_le_kernel,
2074
    &gen_op_lswi_64_user,
2075
    &gen_op_lswi_le_64_user,
2076
    &gen_op_lswi_64_kernel,
2077
    &gen_op_lswi_le_64_kernel,
2078
};
2079
static GenOpFunc3 *gen_op_lswx[] = {
2080
    &gen_op_lswx_user,
2081
    &gen_op_lswx_le_user,
2082
    &gen_op_lswx_kernel,
2083
    &gen_op_lswx_le_kernel,
2084
    &gen_op_lswx_64_user,
2085
    &gen_op_lswx_le_64_user,
2086
    &gen_op_lswx_64_kernel,
2087
    &gen_op_lswx_le_64_kernel,
2088
};
2089
static GenOpFunc1 *gen_op_stsw[] = {
2090
    &gen_op_stsw_user,
2091
    &gen_op_stsw_le_user,
2092
    &gen_op_stsw_kernel,
2093
    &gen_op_stsw_le_kernel,
2094
    &gen_op_stsw_64_user,
2095
    &gen_op_stsw_le_64_user,
2096
    &gen_op_stsw_64_kernel,
2097
    &gen_op_stsw_le_64_kernel,
2098
};
2099
#endif
2100
#else
1412 2101
#if defined(CONFIG_USER_ONLY)
1413 2102
static GenOpFunc1 *gen_op_lswi[] = {
1414 2103
    &gen_op_lswi_raw,
......
1442 2131
    &gen_op_stsw_le_kernel,
1443 2132
};
1444 2133
#endif
2134
#endif
1445 2135

  
1446 2136
/* lswi */
1447 2137
/* PowerPC32 specification says we must generate an exception if
......
1466 2156
        return;
1467 2157
    }
1468 2158
    /* NIP cannot be restored if the memory exception comes from an helper */
1469
    gen_op_update_nip(ctx->nip - 4);
2159
    gen_update_nip(ctx, ctx->nip - 4);
1470 2160
    gen_addr_register(ctx);
1471 2161
    gen_op_set_T1(nb);
1472 2162
    op_ldsts(lswi, start);
......
1479 2169
    int rb = rB(ctx->opcode);
1480 2170

  
1481 2171
    /* NIP cannot be restored if the memory exception comes from an helper */
1482
    gen_op_update_nip(ctx->nip - 4);
2172
    gen_update_nip(ctx, ctx->nip - 4);
1483 2173
    gen_addr_reg_index(ctx);
1484 2174
    if (ra == 0) {
1485 2175
        ra = rb;
......
1494 2184
    int nb = NB(ctx->opcode);
1495 2185

  
1496 2186
    /* NIP cannot be restored if the memory exception comes from an helper */
1497
    gen_op_update_nip(ctx->nip - 4);
2187
    gen_update_nip(ctx, ctx->nip - 4);
1498 2188
    gen_addr_register(ctx);
1499 2189
    if (nb == 0)
1500 2190
        nb = 32;
......
1506 2196
GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_INTEGER)
1507 2197
{
1508 2198
    /* NIP cannot be restored if the memory exception comes from an helper */
1509
    gen_op_update_nip(ctx->nip - 4); 
2199
    gen_update_nip(ctx, ctx->nip - 4); 
1510 2200
    gen_addr_reg_index(ctx);
1511 2201
    gen_op_load_xer_bc();
1512 2202
    op_ldsts(stsw, rS(ctx->opcode));
......
1525 2215

  
1526 2216
#define op_lwarx() (*gen_op_lwarx[ctx->mem_idx])()
1527 2217
#define op_stwcx() (*gen_op_stwcx[ctx->mem_idx])()
2218
#if defined(TARGET_PPC64)
1528 2219
#if defined(CONFIG_USER_ONLY)
1529 2220
static GenOpFunc *gen_op_lwarx[] = {
1530 2221
    &gen_op_lwarx_raw,
1531 2222
    &gen_op_lwarx_le_raw,
2223
    &gen_op_lwarx_64_raw,
2224
    &gen_op_lwarx_le_64_raw,
1532 2225
};
1533 2226
static GenOpFunc *gen_op_stwcx[] = {
1534 2227
    &gen_op_stwcx_raw,
1535 2228
    &gen_op_stwcx_le_raw,
2229
    &gen_op_stwcx_64_raw,
2230
    &gen_op_stwcx_le_64_raw,
1536 2231
};
1537 2232
#else
1538 2233
static GenOpFunc *gen_op_lwarx[] = {
......
1540 2235
    &gen_op_lwarx_le_user,
1541 2236
    &gen_op_lwarx_kernel,
1542 2237
    &gen_op_lwarx_le_kernel,
2238
    &gen_op_lwarx_64_user,
2239
    &gen_op_lwarx_le_64_user,
2240
    &gen_op_lwarx_64_kernel,
2241
    &gen_op_lwarx_le_64_kernel,
1543 2242
};
1544 2243
static GenOpFunc *gen_op_stwcx[] = {
1545 2244
    &gen_op_stwcx_user,
1546 2245
    &gen_op_stwcx_le_user,
1547 2246
    &gen_op_stwcx_kernel,
1548 2247
    &gen_op_stwcx_le_kernel,
2248
    &gen_op_stwcx_64_user,
2249
    &gen_op_stwcx_le_64_user,
2250
    &gen_op_stwcx_64_kernel,
2251
    &gen_op_stwcx_le_64_kernel,
1549 2252
};
1550 2253
#endif
2254
#else
2255
#if defined(CONFIG_USER_ONLY)
2256
static GenOpFunc *gen_op_lwarx[] = {
2257
    &gen_op_lwarx_raw,
2258
    &gen_op_lwarx_le_raw,
2259
};
2260
static GenOpFunc *gen_op_stwcx[] = {
2261
    &gen_op_stwcx_raw,
2262
    &gen_op_stwcx_le_raw,
2263
};
2264
#else
2265
static GenOpFunc *gen_op_lwarx[] = {
2266
    &gen_op_lwarx_user,
2267
    &gen_op_lwarx_le_user,
2268
    &gen_op_lwarx_kernel,
2269
    &gen_op_lwarx_le_kernel,
2270
};
2271
static GenOpFunc *gen_op_stwcx[] = {
2272
    &gen_op_stwcx_user,
2273
    &gen_op_stwcx_le_user,
2274
    &gen_op_stwcx_kernel,
2275
    &gen_op_stwcx_le_kernel,
2276
};
2277
#endif
2278
#endif
1551 2279

  
1552 2280
/* lwarx */
1553 2281
GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000001, PPC_RES)
......
1736 2464
            gen_op_goto_tb0(TBPARAM(tb));
1737 2465
        else
1738 2466
            gen_op_goto_tb1(TBPARAM(tb));
1739
        gen_op_set_T1(dest);
1740
        gen_op_b_T1();
2467
        gen_set_T1(dest);
2468
#if defined(TARGET_PPC64)
2469
        if (ctx->sf_mode)
2470
            gen_op_b_T1_64();
2471
        else
2472
#endif
2473
            gen_op_b_T1();
1741 2474
        gen_op_set_T0((long)tb + n);
1742 2475
        if (ctx->singlestep_enabled)
1743 2476
            gen_op_debug();
1744 2477
        gen_op_exit_tb();
1745 2478
    } else {
1746
        gen_op_set_T1(dest);
1747
        gen_op_b_T1();
2479
        gen_set_T1(dest);
2480
#if defined(TARGET_PPC64)
2481
        if (ctx->sf_mode)
2482
            gen_op_b_T1_64();
2483
        else
2484
#endif
2485
            gen_op_b_T1();
1748 2486
        gen_op_reset_T0();
1749 2487
        if (ctx->singlestep_enabled)
1750 2488
            gen_op_debug();
......
1759 2497

  
1760 2498
    /* sign extend LI */
1761 2499
#if defined(TARGET_PPC64)
1762
    li = ((target_long)LI(ctx->opcode) << 38) >> 38;
1763
#else
1764
    li = ((target_long)LI(ctx->opcode) << 6) >> 6;
2500
    if (ctx->sf_mode)
2501
        li = ((int64_t)LI(ctx->opcode) << 38) >> 38;
2502
    else
1765 2503
#endif
2504
        li = ((int32_t)LI(ctx->opcode) << 6) >> 6;
1766 2505
    if (likely(AA(ctx->opcode) == 0))
1767 2506
        target = ctx->nip + li - 4;
1768 2507
    else
1769 2508
        target = li;
1770 2509
    if (LK(ctx->opcode)) {
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