Revision d9f4bb27 target-i386/translate.c

b/target-i386/translate.c
2826 2826
    [0x28] = { SSE_SPECIAL, SSE_SPECIAL },  /* movaps, movapd */
2827 2827
    [0x29] = { SSE_SPECIAL, SSE_SPECIAL },  /* movaps, movapd */
2828 2828
    [0x2a] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* cvtpi2ps, cvtpi2pd, cvtsi2ss, cvtsi2sd */
2829
    [0x2b] = { SSE_SPECIAL, SSE_SPECIAL },  /* movntps, movntpd */
2829
    [0x2b] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* movntps, movntpd, movntss, movntsd */
2830 2830
    [0x2c] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* cvttps2pi, cvttpd2pi, cvttsd2si, cvttss2si */
2831 2831
    [0x2d] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* cvtps2pi, cvtpd2pi, cvtsd2si, cvtss2si */
2832 2832
    [0x2e] = { gen_helper_ucomiss, gen_helper_ucomisd },
......
2883 2883
    [0x75] = MMX_OP2(pcmpeqw),
2884 2884
    [0x76] = MMX_OP2(pcmpeql),
2885 2885
    [0x77] = { SSE_DUMMY }, /* emms */
2886
    [0x78] = { NULL, SSE_SPECIAL, NULL, SSE_SPECIAL }, /* extrq_i, insertq_i */
2887
    [0x79] = { NULL, gen_helper_extrq_r, NULL, gen_helper_insertq_r },
2886 2888
    [0x7c] = { NULL, gen_helper_haddpd, NULL, gen_helper_haddps },
2887 2889
    [0x7d] = { NULL, gen_helper_hsubpd, NULL, gen_helper_hsubps },
2888 2890
    [0x7e] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* movd, movd, , movq */
......
3169 3171
            gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
3170 3172
            gen_sto_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg]));
3171 3173
            break;
3174
        case 0x22b: /* movntss */
3175
        case 0x32b: /* movntsd */
3176
            if (mod == 3)
3177
                goto illegal_op;
3178
            gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
3179
            if (b1 & 1) {
3180
                gen_stq_env_A0(s->mem_index, offsetof(CPUX86State,
3181
                    xmm_regs[reg]));
3182
            } else {
3183
                tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,
3184
                    xmm_regs[reg].XMM_L(0)));
3185
                gen_op_st_T0_A0(OT_LONG + s->mem_index);
3186
            }
3187
            break;
3172 3188
        case 0x6e: /* movd mm, ea */
3173 3189
#ifdef TARGET_X86_64
3174 3190
            if (s->dflag == 2) {
......
3324 3340
            gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)),
3325 3341
                        offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)));
3326 3342
            break;
3343
        case 0x178:
3344
        case 0x378:
3345
            {
3346
                int bit_index, field_length;
3347

  
3348
                if (b1 == 1 && reg != 0)
3349
                    goto illegal_op;
3350
                field_length = ldub_code(s->pc++) & 0x3F;
3351
                bit_index = ldub_code(s->pc++) & 0x3F;
3352
                tcg_gen_addi_ptr(cpu_ptr0, cpu_env,
3353
                    offsetof(CPUX86State,xmm_regs[reg]));
3354
                if (b1 == 1)
3355
                    gen_helper_extrq_i(cpu_ptr0, tcg_const_i32(bit_index),
3356
                        tcg_const_i32(field_length));
3357
                else
3358
                    gen_helper_insertq_i(cpu_ptr0, tcg_const_i32(bit_index),
3359
                        tcg_const_i32(field_length));
3360
            }
3361
            break;
3327 3362
        case 0x7e: /* movd ea, mm */
3328 3363
#ifdef TARGET_X86_64
3329 3364
            if (s->dflag == 2) {
......
7555 7590
    case 0x110 ... 0x117:
7556 7591
    case 0x128 ... 0x12f:
7557 7592
    case 0x138 ... 0x13a:
7558
    case 0x150 ... 0x177:
7593
    case 0x150 ... 0x179:
7559 7594
    case 0x17c ... 0x17f:
7560 7595
    case 0x1c2:
7561 7596
    case 0x1c4 ... 0x1c6:

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