Revision da87dd7b
| b/Makefile | ||
|---|---|---|
| 293 | 293 |
BLOBS=bios.bin sgabios.bin vgabios.bin vgabios-cirrus.bin \ |
| 294 | 294 |
vgabios-stdvga.bin vgabios-vmware.bin vgabios-qxl.bin \ |
| 295 | 295 |
acpi-dsdt.aml q35-acpi-dsdt.aml \ |
| 296 |
ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc \ |
|
| 296 |
ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc QEMU,tcx.bin \
|
|
| 297 | 297 |
pxe-e1000.rom pxe-eepro100.rom pxe-ne2k_pci.rom \ |
| 298 | 298 |
pxe-pcnet.rom pxe-rtl8139.rom pxe-virtio.rom \ |
| 299 | 299 |
efi-e1000.rom efi-eepro100.rom efi-ne2k_pci.rom \ |
| b/hw/display/tcx.c | ||
|---|---|---|
| 25 | 25 |
#include "qemu-common.h" |
| 26 | 26 |
#include "ui/console.h" |
| 27 | 27 |
#include "ui/pixel_ops.h" |
| 28 |
#include "hw/loader.h" |
|
| 28 | 29 |
#include "hw/sysbus.h" |
| 29 | 30 |
|
| 31 |
#define TCX_ROM_FILE "QEMU,tcx.bin" |
|
| 32 |
#define FCODE_MAX_ROM_SIZE 0x10000 |
|
| 33 |
|
|
| 30 | 34 |
#define MAXX 1024 |
| 31 | 35 |
#define MAXY 768 |
| 32 | 36 |
#define TCX_DAC_NREGS 16 |
| ... | ... | |
| 43 | 47 |
QemuConsole *con; |
| 44 | 48 |
uint8_t *vram; |
| 45 | 49 |
uint32_t *vram24, *cplane; |
| 50 |
hwaddr prom_addr; |
|
| 51 |
MemoryRegion rom; |
|
| 46 | 52 |
MemoryRegion vram_mem; |
| 47 | 53 |
MemoryRegion vram_8bit; |
| 48 | 54 |
MemoryRegion vram_24bit; |
| ... | ... | |
| 529 | 535 |
{
|
| 530 | 536 |
TCXState *s = TCX(dev); |
| 531 | 537 |
ram_addr_t vram_offset = 0; |
| 532 |
int size; |
|
| 538 |
int size, ret;
|
|
| 533 | 539 |
uint8_t *vram_base; |
| 540 |
char *fcode_filename; |
|
| 534 | 541 |
|
| 535 | 542 |
memory_region_init_ram(&s->vram_mem, OBJECT(s), "tcx.vram", |
| 536 | 543 |
s->vram_size * (1 + 4 + 4)); |
| 537 | 544 |
vmstate_register_ram_global(&s->vram_mem); |
| 538 | 545 |
vram_base = memory_region_get_ram_ptr(&s->vram_mem); |
| 539 | 546 |
|
| 547 |
/* FCode ROM */ |
|
| 548 |
memory_region_init_ram(&s->rom, NULL, "tcx.prom", FCODE_MAX_ROM_SIZE); |
|
| 549 |
vmstate_register_ram_global(&s->rom); |
|
| 550 |
memory_region_set_readonly(&s->rom, true); |
|
| 551 |
sysbus_init_mmio(dev, &s->rom); |
|
| 552 |
|
|
| 553 |
fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, TCX_ROM_FILE); |
|
| 554 |
if (fcode_filename) {
|
|
| 555 |
ret = load_image_targphys(fcode_filename, s->prom_addr, |
|
| 556 |
FCODE_MAX_ROM_SIZE); |
|
| 557 |
if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) {
|
|
| 558 |
fprintf(stderr, "tcx: could not load prom '%s'\n", TCX_ROM_FILE); |
|
| 559 |
return -1; |
|
| 560 |
} |
|
| 561 |
} |
|
| 562 |
|
|
| 540 | 563 |
/* 8-bit plane */ |
| 541 | 564 |
s->vram = vram_base; |
| 542 | 565 |
size = s->vram_size; |
| ... | ... | |
| 598 | 621 |
DEFINE_PROP_UINT16("width", TCXState, width, -1),
|
| 599 | 622 |
DEFINE_PROP_UINT16("height", TCXState, height, -1),
|
| 600 | 623 |
DEFINE_PROP_UINT16("depth", TCXState, depth, -1),
|
| 624 |
DEFINE_PROP_HEX64("prom_addr", TCXState, prom_addr, -1),
|
|
| 601 | 625 |
DEFINE_PROP_END_OF_LIST(), |
| 602 | 626 |
}; |
| 603 | 627 |
|
| b/hw/sparc/sun4m.c | ||
|---|---|---|
| 537 | 537 |
qdev_prop_set_uint16(dev, "width", width); |
| 538 | 538 |
qdev_prop_set_uint16(dev, "height", height); |
| 539 | 539 |
qdev_prop_set_uint16(dev, "depth", depth); |
| 540 |
qdev_prop_set_uint64(dev, "prom_addr", addr); |
|
| 540 | 541 |
qdev_init_nofail(dev); |
| 541 | 542 |
s = SYS_BUS_DEVICE(dev); |
| 543 |
/* FCode ROM */ |
|
| 544 |
sysbus_mmio_map(s, 0, addr); |
|
| 542 | 545 |
/* 8-bit plane */ |
| 543 |
sysbus_mmio_map(s, 0, addr + 0x00800000ULL);
|
|
| 546 |
sysbus_mmio_map(s, 1, addr + 0x00800000ULL);
|
|
| 544 | 547 |
/* DAC */ |
| 545 |
sysbus_mmio_map(s, 1, addr + 0x00200000ULL);
|
|
| 548 |
sysbus_mmio_map(s, 2, addr + 0x00200000ULL);
|
|
| 546 | 549 |
/* TEC (dummy) */ |
| 547 |
sysbus_mmio_map(s, 2, addr + 0x00700000ULL);
|
|
| 550 |
sysbus_mmio_map(s, 3, addr + 0x00700000ULL);
|
|
| 548 | 551 |
/* THC 24 bit: NetBSD writes here even with 8-bit display: dummy */ |
| 549 |
sysbus_mmio_map(s, 3, addr + 0x00301000ULL);
|
|
| 552 |
sysbus_mmio_map(s, 4, addr + 0x00301000ULL);
|
|
| 550 | 553 |
if (depth == 24) {
|
| 551 | 554 |
/* 24-bit plane */ |
| 552 |
sysbus_mmio_map(s, 4, addr + 0x02000000ULL);
|
|
| 555 |
sysbus_mmio_map(s, 5, addr + 0x02000000ULL);
|
|
| 553 | 556 |
/* Control plane */ |
| 554 |
sysbus_mmio_map(s, 5, addr + 0x0a000000ULL);
|
|
| 557 |
sysbus_mmio_map(s, 6, addr + 0x0a000000ULL);
|
|
| 555 | 558 |
} else {
|
| 556 | 559 |
/* THC 8 bit (dummy) */ |
| 557 |
sysbus_mmio_map(s, 4, addr + 0x00300000ULL);
|
|
| 560 |
sysbus_mmio_map(s, 5, addr + 0x00300000ULL);
|
|
| 558 | 561 |
} |
| 559 | 562 |
} |
| 560 | 563 |
|
| b/pc-bios/README | ||
|---|---|---|
| 11 | 11 |
firmware implementation. The goal is to implement a 100% IEEE |
| 12 | 12 |
1275-1994 (referred to as Open Firmware) compliant firmware. |
| 13 | 13 |
The included images for PowerPC (for 32 and 64 bit PPC CPUs), |
| 14 |
Sparc32 and Sparc64 are built from OpenBIOS SVN revision
|
|
| 15 |
1229. |
|
| 14 |
Sparc32 (including QEMU,tcx.bin) and Sparc64 are built from OpenBIOS SVN
|
|
| 15 |
revision 1229.
|
|
| 16 | 16 |
|
| 17 | 17 |
- SLOF (Slimline Open Firmware) is a free IEEE 1275 Open Firmware |
| 18 | 18 |
implementation for certain IBM POWER hardware. The sources are at |
Also available in: Unified diff