root / hw / mips_jazz.c @ dcac9679
History | View | Annotate | Download (8.7 kB)
1 |
/*
|
---|---|
2 |
* QEMU MIPS Jazz support
|
3 |
*
|
4 |
* Copyright (c) 2007-2008 Hervé Poussineau
|
5 |
*
|
6 |
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 |
* of this software and associated documentation files (the "Software"), to deal
|
8 |
* in the Software without restriction, including without limitation the rights
|
9 |
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 |
* copies of the Software, and to permit persons to whom the Software is
|
11 |
* furnished to do so, subject to the following conditions:
|
12 |
*
|
13 |
* The above copyright notice and this permission notice shall be included in
|
14 |
* all copies or substantial portions of the Software.
|
15 |
*
|
16 |
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 |
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 |
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 |
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 |
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 |
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 |
* THE SOFTWARE.
|
23 |
*/
|
24 |
|
25 |
#include "hw.h" |
26 |
#include "mips.h" |
27 |
#include "pc.h" |
28 |
#include "isa.h" |
29 |
#include "fdc.h" |
30 |
#include "sysemu.h" |
31 |
#include "audio/audio.h" |
32 |
#include "boards.h" |
33 |
#include "net.h" |
34 |
#include "scsi.h" |
35 |
|
36 |
#ifdef TARGET_WORDS_BIGENDIAN
|
37 |
#define BIOS_FILENAME "mips_bios.bin" |
38 |
#else
|
39 |
#define BIOS_FILENAME "mipsel_bios.bin" |
40 |
#endif
|
41 |
|
42 |
enum jazz_model_e
|
43 |
{ |
44 |
JAZZ_MAGNUM, |
45 |
JAZZ_PICA61, |
46 |
}; |
47 |
|
48 |
static void main_cpu_reset(void *opaque) |
49 |
{ |
50 |
CPUState *env = opaque; |
51 |
cpu_reset(env); |
52 |
} |
53 |
|
54 |
static uint32_t rtc_readb(void *opaque, target_phys_addr_t addr) |
55 |
{ |
56 |
CPUState *env = opaque; |
57 |
return cpu_inw(env, 0x71); |
58 |
} |
59 |
|
60 |
static void rtc_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
61 |
{ |
62 |
CPUState *env = opaque; |
63 |
cpu_outw(env, 0x71, val & 0xff); |
64 |
} |
65 |
|
66 |
static CPUReadMemoryFunc *rtc_read[3] = { |
67 |
rtc_readb, |
68 |
rtc_readb, |
69 |
rtc_readb, |
70 |
}; |
71 |
|
72 |
static CPUWriteMemoryFunc *rtc_write[3] = { |
73 |
rtc_writeb, |
74 |
rtc_writeb, |
75 |
rtc_writeb, |
76 |
}; |
77 |
|
78 |
static void dma_dummy_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
79 |
{ |
80 |
/* Nothing to do. That is only to ensure that
|
81 |
* the current DMA acknowledge cycle is completed. */
|
82 |
} |
83 |
|
84 |
static CPUReadMemoryFunc *dma_dummy_read[3] = { |
85 |
NULL,
|
86 |
NULL,
|
87 |
NULL,
|
88 |
}; |
89 |
|
90 |
static CPUWriteMemoryFunc *dma_dummy_write[3] = { |
91 |
dma_dummy_writeb, |
92 |
dma_dummy_writeb, |
93 |
dma_dummy_writeb, |
94 |
}; |
95 |
|
96 |
#ifdef HAS_AUDIO
|
97 |
static void audio_init(qemu_irq *pic) |
98 |
{ |
99 |
struct soundhw *c;
|
100 |
int audio_enabled = 0; |
101 |
|
102 |
for (c = soundhw; !audio_enabled && c->name; ++c) {
|
103 |
audio_enabled = c->enabled; |
104 |
} |
105 |
|
106 |
if (audio_enabled) {
|
107 |
AudioState *s; |
108 |
|
109 |
s = AUD_init(); |
110 |
if (s) {
|
111 |
for (c = soundhw; c->name; ++c) {
|
112 |
if (c->enabled) {
|
113 |
if (c->isa) {
|
114 |
c->init.init_isa(s, pic); |
115 |
} |
116 |
} |
117 |
} |
118 |
} |
119 |
} |
120 |
} |
121 |
#endif
|
122 |
|
123 |
#define MAGNUM_BIOS_SIZE_MAX 0x7e000 |
124 |
#define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
|
125 |
|
126 |
static
|
127 |
void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size, |
128 |
const char *cpu_model, |
129 |
enum jazz_model_e jazz_model)
|
130 |
{ |
131 |
char buf[1024]; |
132 |
int bios_size, n;
|
133 |
CPUState *env; |
134 |
qemu_irq *rc4030, *i8259; |
135 |
rc4030_dma *dmas; |
136 |
rc4030_dma_function dma_read, dma_write; |
137 |
void *scsi_hba;
|
138 |
int hd;
|
139 |
int s_rtc, s_dma_dummy;
|
140 |
PITState *pit; |
141 |
BlockDriverState *fds[MAX_FD]; |
142 |
qemu_irq esp_reset; |
143 |
ram_addr_t ram_offset; |
144 |
ram_addr_t bios_offset; |
145 |
ram_addr_t vga_ram_offset; |
146 |
|
147 |
/* init CPUs */
|
148 |
if (cpu_model == NULL) { |
149 |
#ifdef TARGET_MIPS64
|
150 |
cpu_model = "R4000";
|
151 |
#else
|
152 |
/* FIXME: All wrong, this maybe should be R3000 for the older JAZZs. */
|
153 |
cpu_model = "24Kf";
|
154 |
#endif
|
155 |
} |
156 |
env = cpu_init(cpu_model); |
157 |
if (!env) {
|
158 |
fprintf(stderr, "Unable to find CPU definition\n");
|
159 |
exit(1);
|
160 |
} |
161 |
qemu_register_reset(main_cpu_reset, env); |
162 |
|
163 |
/* allocate RAM */
|
164 |
ram_offset = qemu_ram_alloc(ram_size); |
165 |
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
|
166 |
|
167 |
vga_ram_offset = qemu_ram_alloc(vga_ram_size); |
168 |
bios_offset = qemu_ram_alloc(MAGNUM_BIOS_SIZE); |
169 |
cpu_register_physical_memory(0x1fc00000LL,
|
170 |
MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM); |
171 |
cpu_register_physical_memory(0xfff00000LL,
|
172 |
MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM); |
173 |
|
174 |
/* load the BIOS image. */
|
175 |
if (bios_name == NULL) |
176 |
bios_name = BIOS_FILENAME; |
177 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
178 |
bios_size = load_image_targphys(buf, 0xfff00000LL, MAGNUM_BIOS_SIZE);
|
179 |
if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) { |
180 |
fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n",
|
181 |
buf); |
182 |
exit(1);
|
183 |
} |
184 |
|
185 |
/* Init CPU internal devices */
|
186 |
cpu_mips_irq_init_cpu(env); |
187 |
cpu_mips_clock_init(env); |
188 |
|
189 |
/* Chipset */
|
190 |
rc4030 = rc4030_init(env->irq[6], env->irq[3], |
191 |
&dmas, &dma_read, &dma_write); |
192 |
s_dma_dummy = cpu_register_io_memory(0, dma_dummy_read, dma_dummy_write, NULL); |
193 |
cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy); |
194 |
|
195 |
/* ISA devices */
|
196 |
i8259 = i8259_init(env->irq[4]);
|
197 |
DMA_init(0);
|
198 |
pit = pit_init(0x40, i8259[0]); |
199 |
pcspk_init(pit); |
200 |
|
201 |
/* ISA IO space at 0x90000000 */
|
202 |
isa_mmio_init(0x90000000, 0x01000000); |
203 |
isa_mem_base = 0x11000000;
|
204 |
|
205 |
/* Video card */
|
206 |
switch (jazz_model) {
|
207 |
case JAZZ_MAGNUM:
|
208 |
g364fb_mm_init(phys_ram_base + vga_ram_offset, ram_size, vga_ram_size, |
209 |
0x40000000, 0x60000000, 0, rc4030[3]); |
210 |
break;
|
211 |
case JAZZ_PICA61:
|
212 |
isa_vga_mm_init(phys_ram_base + vga_ram_offset, ram_size, vga_ram_size, |
213 |
0x40000000, 0x60000000, 0); |
214 |
break;
|
215 |
default:
|
216 |
break;
|
217 |
} |
218 |
|
219 |
/* Network controller */
|
220 |
/* FIXME: missing NS SONIC DP83932 */
|
221 |
|
222 |
/* SCSI adapter */
|
223 |
scsi_hba = esp_init(0x80002000, 0, |
224 |
dma_read, dma_write, dmas[0],
|
225 |
rc4030[5], &esp_reset);
|
226 |
for (n = 0; n < ESP_MAX_DEVS; n++) { |
227 |
hd = drive_get_index(IF_SCSI, 0, n);
|
228 |
if (hd != -1) { |
229 |
esp_scsi_attach(scsi_hba, drives_table[hd].bdrv, n); |
230 |
} |
231 |
} |
232 |
|
233 |
/* Floppy */
|
234 |
if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) {
|
235 |
fprintf(stderr, "qemu: too many floppy drives\n");
|
236 |
exit(1);
|
237 |
} |
238 |
for (n = 0; n < MAX_FD; n++) { |
239 |
int fd = drive_get_index(IF_FLOPPY, 0, n); |
240 |
if (fd != -1) |
241 |
fds[n] = drives_table[fd].bdrv; |
242 |
else
|
243 |
fds[n] = NULL;
|
244 |
} |
245 |
fdctrl_init(rc4030[1], 0, 1, 0x80003000, fds); |
246 |
|
247 |
/* Real time clock */
|
248 |
rtc_init(0x70, i8259[8], 1980); |
249 |
s_rtc = cpu_register_io_memory(0, rtc_read, rtc_write, env);
|
250 |
cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc); |
251 |
|
252 |
/* Keyboard (i8042) */
|
253 |
i8042_mm_init(rc4030[6], rc4030[7], 0x80005000, 0x1000, 0x1); |
254 |
|
255 |
/* Serial ports */
|
256 |
if (serial_hds[0]) |
257 |
serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1); |
258 |
if (serial_hds[1]) |
259 |
serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1); |
260 |
|
261 |
/* Parallel port */
|
262 |
if (parallel_hds[0]) |
263 |
parallel_mm_init(0x80008000, 0, rc4030[0], parallel_hds[0]); |
264 |
|
265 |
/* Sound card */
|
266 |
/* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
|
267 |
#ifdef HAS_AUDIO
|
268 |
audio_init(i8259); |
269 |
#endif
|
270 |
|
271 |
/* NVRAM: Unprotected at 0x9000, Protected at 0xa000, Read only at 0xb000 */
|
272 |
ds1225y_init(0x80009000, "nvram"); |
273 |
|
274 |
/* LED indicator */
|
275 |
jazz_led_init(0x8000f000);
|
276 |
} |
277 |
|
278 |
static
|
279 |
void mips_magnum_init (ram_addr_t ram_size, int vga_ram_size, |
280 |
const char *boot_device, |
281 |
const char *kernel_filename, const char *kernel_cmdline, |
282 |
const char *initrd_filename, const char *cpu_model) |
283 |
{ |
284 |
mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_MAGNUM); |
285 |
} |
286 |
|
287 |
static
|
288 |
void mips_pica61_init (ram_addr_t ram_size, int vga_ram_size, |
289 |
const char *boot_device, |
290 |
const char *kernel_filename, const char *kernel_cmdline, |
291 |
const char *initrd_filename, const char *cpu_model) |
292 |
{ |
293 |
mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_PICA61); |
294 |
} |
295 |
|
296 |
QEMUMachine mips_magnum_machine = { |
297 |
.name = "magnum",
|
298 |
.desc = "MIPS Magnum",
|
299 |
.init = mips_magnum_init, |
300 |
.ram_require = MAGNUM_BIOS_SIZE + VGA_RAM_SIZE, |
301 |
.use_scsi = 1,
|
302 |
}; |
303 |
|
304 |
QEMUMachine mips_pica61_machine = { |
305 |
.name = "pica61",
|
306 |
.desc = "Acer Pica 61",
|
307 |
.init = mips_pica61_init, |
308 |
.ram_require = MAGNUM_BIOS_SIZE + VGA_RAM_SIZE, |
309 |
.use_scsi = 1,
|
310 |
}; |