Revision dd37a5e4 hw/ppc_chrp.c
| b/hw/ppc_chrp.c | ||
|---|---|---|
| 409 | 409 |
|
| 410 | 410 |
if (is_heathrow) {
|
| 411 | 411 |
isa_mem_base = 0x80000000; |
| 412 |
|
|
| 412 |
|
|
| 413 | 413 |
/* Register 2 MB of ISA IO space */ |
| 414 | 414 |
isa_mmio_init(0xfe000000, 0x00200000); |
| 415 | 415 |
|
| 416 | 416 |
/* init basic PC hardware */ |
| 417 |
if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
|
|
| 418 |
cpu_abort(env, "Only 6xx bus is supported on heathrow machine\n"); |
|
| 419 |
exit(1); |
|
| 420 |
} |
|
| 417 | 421 |
pic = heathrow_pic_init(&heathrow_pic_mem_index); |
| 418 | 422 |
pci_bus = pci_grackle_init(0xfec00000, pic); |
| 419 |
pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
|
|
| 423 |
pci_vga_init(pci_bus, ds, phys_ram_base + ram_size, |
|
| 420 | 424 |
ram_size, vga_ram_size, |
| 421 | 425 |
vga_bios_offset, vga_bios_size); |
| 422 | 426 |
|
| ... | ... | |
| 468 | 472 |
/* Mac99 IRQ connection between OpenPIC outputs pins |
| 469 | 473 |
* and PowerPC input pins |
| 470 | 474 |
*/ |
| 471 |
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); |
|
| 472 |
openpic_irqs[i][OPENPIC_OUTPUT_INT] = |
|
| 473 |
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
|
| 474 |
openpic_irqs[i][OPENPIC_OUTPUT_CINT] = |
|
| 475 |
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
|
| 476 |
openpic_irqs[i][OPENPIC_OUTPUT_MCK] = |
|
| 477 |
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; |
|
| 478 |
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; /* Not connected ? */ |
|
| 479 |
openpic_irqs[i][OPENPIC_OUTPUT_RESET] = |
|
| 480 |
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; /* Check this */ |
|
| 475 |
switch (PPC_INPUT(env)) {
|
|
| 476 |
case PPC_FLAGS_INPUT_6xx: |
|
| 477 |
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); |
|
| 478 |
openpic_irqs[i][OPENPIC_OUTPUT_INT] = |
|
| 479 |
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
|
| 480 |
openpic_irqs[i][OPENPIC_OUTPUT_CINT] = |
|
| 481 |
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
|
| 482 |
openpic_irqs[i][OPENPIC_OUTPUT_MCK] = |
|
| 483 |
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; |
|
| 484 |
/* Not connected ? */ |
|
| 485 |
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; |
|
| 486 |
/* Check this */ |
|
| 487 |
openpic_irqs[i][OPENPIC_OUTPUT_RESET] = |
|
| 488 |
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; |
|
| 489 |
break; |
|
| 490 |
case PPC_FLAGS_INPUT_970: |
|
| 491 |
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); |
|
| 492 |
openpic_irqs[i][OPENPIC_OUTPUT_INT] = |
|
| 493 |
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; |
|
| 494 |
openpic_irqs[i][OPENPIC_OUTPUT_CINT] = |
|
| 495 |
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; |
|
| 496 |
openpic_irqs[i][OPENPIC_OUTPUT_MCK] = |
|
| 497 |
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; |
|
| 498 |
/* Not connected ? */ |
|
| 499 |
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; |
|
| 500 |
/* Check this */ |
|
| 501 |
openpic_irqs[i][OPENPIC_OUTPUT_RESET] = |
|
| 502 |
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; |
|
| 503 |
break; |
|
| 504 |
default: |
|
| 505 |
cpu_abort(env, |
|
| 506 |
"Only bus model not supported on mac99 machine\n"); |
|
| 507 |
exit(1); |
|
| 508 |
} |
|
| 481 | 509 |
} |
| 482 | 510 |
pic = openpic_init(NULL, &openpic_mem_index, smp_cpus, |
| 483 | 511 |
openpic_irqs, NULL); |
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