Revision dd5e6304 target-sparc/translate.c
| b/target-sparc/translate.c | ||
|---|---|---|
| 386 | 386 |
tcg_gen_xori_tl(r_temp, r_temp, -1); |
| 387 | 387 |
tcg_gen_xor_tl(cpu_tmp0, src1, dst); |
| 388 | 388 |
tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0); |
| 389 |
tcg_gen_andi_tl(r_temp, r_temp, (1 << 31)); |
|
| 389 |
tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 31));
|
|
| 390 | 390 |
tcg_gen_shri_tl(r_temp, r_temp, 31 - PSR_OVF_SHIFT); |
| 391 | 391 |
tcg_gen_trunc_tl_i32(cpu_tmp32, r_temp); |
| 392 | 392 |
tcg_temp_free(r_temp); |
| ... | ... | |
| 423 | 423 |
tcg_gen_xori_tl(r_temp, r_temp, -1); |
| 424 | 424 |
tcg_gen_xor_tl(cpu_tmp0, src1, dst); |
| 425 | 425 |
tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0); |
| 426 |
tcg_gen_andi_tl(r_temp, r_temp, (1 << 31)); |
|
| 426 |
tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 31));
|
|
| 427 | 427 |
tcg_gen_brcondi_tl(TCG_COND_EQ, r_temp, 0, l1); |
| 428 | 428 |
r_const = tcg_const_i32(TT_TOVF); |
| 429 | 429 |
tcg_gen_helper_0_1(raise_exception, r_const); |
| ... | ... | |
| 584 | 584 |
tcg_gen_xor_tl(r_temp, src1, src2); |
| 585 | 585 |
tcg_gen_xor_tl(cpu_tmp0, src1, dst); |
| 586 | 586 |
tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0); |
| 587 |
tcg_gen_andi_tl(r_temp, r_temp, (1 << 31)); |
|
| 587 |
tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 31));
|
|
| 588 | 588 |
tcg_gen_shri_tl(r_temp, r_temp, 31 - PSR_OVF_SHIFT); |
| 589 | 589 |
tcg_gen_trunc_tl_i32(cpu_tmp32, r_temp); |
| 590 | 590 |
tcg_gen_or_i32(cpu_psr, cpu_psr, cpu_tmp32); |
| ... | ... | |
| 619 | 619 |
tcg_gen_xor_tl(r_temp, src1, src2); |
| 620 | 620 |
tcg_gen_xor_tl(cpu_tmp0, src1, dst); |
| 621 | 621 |
tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0); |
| 622 |
tcg_gen_andi_tl(r_temp, r_temp, (1 << 31)); |
|
| 622 |
tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 31));
|
|
| 623 | 623 |
tcg_gen_brcondi_tl(TCG_COND_EQ, r_temp, 0, l1); |
| 624 | 624 |
r_const = tcg_const_i32(TT_TOVF); |
| 625 | 625 |
tcg_gen_helper_0_1(raise_exception, r_const); |
Also available in: Unified diff