Revision defdb20e hw/parallel.c
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#define PARA_CTR_SIGNAL (PARA_CTR_SELECT|PARA_CTR_INIT|PARA_CTR_AUTOLF|PARA_CTR_STROBE) |
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struct ParallelState {
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typedef struct ParallelState {
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uint8_t dataw; |
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uint8_t datar; |
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uint8_t status; |
| ... | ... | |
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uint32_t last_read_offset; /* For debugging */ |
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/* Memory-mapped interface */ |
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int it_shift; |
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}; |
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} ParallelState;
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typedef struct ISAParallelState {
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ISADevice dev; |
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return 0; |
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} |
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ParallelState *parallel_init(int index, CharDriverState *chr) |
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{
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ISADevice *dev; |
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dev = isa_create("isa-parallel");
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qdev_prop_set_uint32(&dev->qdev, "index", index); |
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qdev_prop_set_chr(&dev->qdev, "chardev", chr); |
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if (qdev_init(&dev->qdev) < 0) |
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return NULL; |
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return &DO_UPCAST(ISAParallelState, dev, dev)->state; |
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} |
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/* Memory mapped interface */ |
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static uint32_t parallel_mm_readb (void *opaque, target_phys_addr_t addr) |
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{
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}; |
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/* If fd is zero, it means that the parallel device uses the console */ |
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ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr) |
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bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, |
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CharDriverState *chr) |
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{
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ParallelState *s; |
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int io_sw; |
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io_sw = cpu_register_io_memory(parallel_mm_read_sw, parallel_mm_write_sw, |
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s, DEVICE_NATIVE_ENDIAN); |
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cpu_register_physical_memory(base, 8 << it_shift, io_sw); |
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return s;
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return true;
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} |
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static ISADeviceInfo parallel_isa_info = {
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