root / hw / pc.c @ df97b920
History | View | Annotate | Download (33.8 kB)
1 | 80cabfad | bellard | /*
|
---|---|---|---|
2 | 80cabfad | bellard | * QEMU PC System Emulator
|
3 | 5fafdf24 | ths | *
|
4 | 80cabfad | bellard | * Copyright (c) 2003-2004 Fabrice Bellard
|
5 | 5fafdf24 | ths | *
|
6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
|
8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
|
9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
|
11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
|
12 | 80cabfad | bellard | *
|
13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
|
14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
|
15 | 80cabfad | bellard | *
|
16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 | 80cabfad | bellard | * THE SOFTWARE.
|
23 | 80cabfad | bellard | */
|
24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "pc.h" |
26 | 87ecb68b | pbrook | #include "fdc.h" |
27 | 87ecb68b | pbrook | #include "pci.h" |
28 | 87ecb68b | pbrook | #include "block.h" |
29 | 87ecb68b | pbrook | #include "sysemu.h" |
30 | 87ecb68b | pbrook | #include "audio/audio.h" |
31 | 87ecb68b | pbrook | #include "net.h" |
32 | 87ecb68b | pbrook | #include "smbus.h" |
33 | 87ecb68b | pbrook | #include "boards.h" |
34 | 376253ec | aliguori | #include "monitor.h" |
35 | 3cce6243 | blueswir1 | #include "fw_cfg.h" |
36 | 16b29ae1 | aliguori | #include "hpet_emul.h" |
37 | 9dd986cc | Richard W.M. Jones | #include "watchdog.h" |
38 | b6f6e3d3 | aliguori | #include "smbios.h" |
39 | 80cabfad | bellard | |
40 | b41a2cd1 | bellard | /* output Bochs bios info messages */
|
41 | b41a2cd1 | bellard | //#define DEBUG_BIOS
|
42 | b41a2cd1 | bellard | |
43 | 80cabfad | bellard | #define BIOS_FILENAME "bios.bin" |
44 | 80cabfad | bellard | #define VGABIOS_FILENAME "vgabios.bin" |
45 | de9258a8 | bellard | #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
46 | 80cabfad | bellard | |
47 | 7fb4fdcf | balrog | #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024) |
48 | 7fb4fdcf | balrog | |
49 | a80274c3 | pbrook | /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
|
50 | a80274c3 | pbrook | #define ACPI_DATA_SIZE 0x10000 |
51 | 3cce6243 | blueswir1 | #define BIOS_CFG_IOPORT 0x510 |
52 | 8a92ea2f | aliguori | #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0) |
53 | b6f6e3d3 | aliguori | #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1) |
54 | 80cabfad | bellard | |
55 | e4bcb14c | ths | #define MAX_IDE_BUS 2 |
56 | e4bcb14c | ths | |
57 | baca51fa | bellard | static fdctrl_t *floppy_controller;
|
58 | b0a21b53 | bellard | static RTCState *rtc_state;
|
59 | ec844b96 | bellard | static PITState *pit;
|
60 | d592d303 | bellard | static IOAPICState *ioapic;
|
61 | a5954d5c | bellard | static PCIDevice *i440fx_state;
|
62 | 80cabfad | bellard | |
63 | e28f9884 | Glauber Costa | typedef struct rom_reset_data { |
64 | e28f9884 | Glauber Costa | uint8_t *data; |
65 | e28f9884 | Glauber Costa | target_phys_addr_t addr; |
66 | e28f9884 | Glauber Costa | unsigned size;
|
67 | e28f9884 | Glauber Costa | } RomResetData; |
68 | e28f9884 | Glauber Costa | |
69 | e28f9884 | Glauber Costa | static void option_rom_reset(void *_rrd) |
70 | e28f9884 | Glauber Costa | { |
71 | e28f9884 | Glauber Costa | RomResetData *rrd = _rrd; |
72 | e28f9884 | Glauber Costa | |
73 | e28f9884 | Glauber Costa | cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size); |
74 | e28f9884 | Glauber Costa | } |
75 | e28f9884 | Glauber Costa | |
76 | e28f9884 | Glauber Costa | static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size) |
77 | e28f9884 | Glauber Costa | { |
78 | e28f9884 | Glauber Costa | RomResetData *rrd = qemu_malloc(sizeof *rrd);
|
79 | e28f9884 | Glauber Costa | |
80 | e28f9884 | Glauber Costa | rrd->data = qemu_malloc(size); |
81 | e28f9884 | Glauber Costa | cpu_physical_memory_read(addr, rrd->data, size); |
82 | e28f9884 | Glauber Costa | rrd->addr = addr; |
83 | e28f9884 | Glauber Costa | rrd->size = size; |
84 | 8217606e | Jan Kiszka | qemu_register_reset(option_rom_reset, 0, rrd);
|
85 | e28f9884 | Glauber Costa | } |
86 | e28f9884 | Glauber Costa | |
87 | b41a2cd1 | bellard | static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
88 | 80cabfad | bellard | { |
89 | 80cabfad | bellard | } |
90 | 80cabfad | bellard | |
91 | f929aad6 | bellard | /* MSDOS compatibility mode FPU exception support */
|
92 | d537cf6c | pbrook | static qemu_irq ferr_irq;
|
93 | f929aad6 | bellard | /* XXX: add IGNNE support */
|
94 | f929aad6 | bellard | void cpu_set_ferr(CPUX86State *s)
|
95 | f929aad6 | bellard | { |
96 | d537cf6c | pbrook | qemu_irq_raise(ferr_irq); |
97 | f929aad6 | bellard | } |
98 | f929aad6 | bellard | |
99 | f929aad6 | bellard | static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
100 | f929aad6 | bellard | { |
101 | d537cf6c | pbrook | qemu_irq_lower(ferr_irq); |
102 | f929aad6 | bellard | } |
103 | f929aad6 | bellard | |
104 | 28ab0e2e | bellard | /* TSC handling */
|
105 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
106 | 28ab0e2e | bellard | { |
107 | 1dce7c3c | bellard | /* Note: when using kqemu, it is more logical to return the host TSC
|
108 | 1dce7c3c | bellard | because kqemu does not trap the RDTSC instruction for
|
109 | 1dce7c3c | bellard | performance reasons */
|
110 | 640f42e4 | blueswir1 | #ifdef CONFIG_KQEMU
|
111 | 1dce7c3c | bellard | if (env->kqemu_enabled) {
|
112 | 1dce7c3c | bellard | return cpu_get_real_ticks();
|
113 | 5fafdf24 | ths | } else
|
114 | 1dce7c3c | bellard | #endif
|
115 | 1dce7c3c | bellard | { |
116 | 1dce7c3c | bellard | return cpu_get_ticks();
|
117 | 1dce7c3c | bellard | } |
118 | 28ab0e2e | bellard | } |
119 | 28ab0e2e | bellard | |
120 | a5954d5c | bellard | /* SMM support */
|
121 | a5954d5c | bellard | void cpu_smm_update(CPUState *env)
|
122 | a5954d5c | bellard | { |
123 | a5954d5c | bellard | if (i440fx_state && env == first_cpu)
|
124 | a5954d5c | bellard | i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
|
125 | a5954d5c | bellard | } |
126 | a5954d5c | bellard | |
127 | a5954d5c | bellard | |
128 | 3de388f6 | bellard | /* IRQ handling */
|
129 | 3de388f6 | bellard | int cpu_get_pic_interrupt(CPUState *env)
|
130 | 3de388f6 | bellard | { |
131 | 3de388f6 | bellard | int intno;
|
132 | 3de388f6 | bellard | |
133 | 3de388f6 | bellard | intno = apic_get_interrupt(env); |
134 | 3de388f6 | bellard | if (intno >= 0) { |
135 | 3de388f6 | bellard | /* set irq request if a PIC irq is still pending */
|
136 | 3de388f6 | bellard | /* XXX: improve that */
|
137 | 5fafdf24 | ths | pic_update_irq(isa_pic); |
138 | 3de388f6 | bellard | return intno;
|
139 | 3de388f6 | bellard | } |
140 | 3de388f6 | bellard | /* read the irq from the PIC */
|
141 | 0e21e12b | ths | if (!apic_accept_pic_intr(env))
|
142 | 0e21e12b | ths | return -1; |
143 | 0e21e12b | ths | |
144 | 3de388f6 | bellard | intno = pic_read_irq(isa_pic); |
145 | 3de388f6 | bellard | return intno;
|
146 | 3de388f6 | bellard | } |
147 | 3de388f6 | bellard | |
148 | d537cf6c | pbrook | static void pic_irq_request(void *opaque, int irq, int level) |
149 | 3de388f6 | bellard | { |
150 | a5b38b51 | aurel32 | CPUState *env = first_cpu; |
151 | a5b38b51 | aurel32 | |
152 | d5529471 | aurel32 | if (env->apic_state) {
|
153 | d5529471 | aurel32 | while (env) {
|
154 | d5529471 | aurel32 | if (apic_accept_pic_intr(env))
|
155 | 1a7de94a | aurel32 | apic_deliver_pic_intr(env, level); |
156 | d5529471 | aurel32 | env = env->next_cpu; |
157 | d5529471 | aurel32 | } |
158 | d5529471 | aurel32 | } else {
|
159 | b614106a | aurel32 | if (level)
|
160 | b614106a | aurel32 | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
161 | b614106a | aurel32 | else
|
162 | b614106a | aurel32 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
163 | a5b38b51 | aurel32 | } |
164 | 3de388f6 | bellard | } |
165 | 3de388f6 | bellard | |
166 | b0a21b53 | bellard | /* PC cmos mappings */
|
167 | b0a21b53 | bellard | |
168 | 80cabfad | bellard | #define REG_EQUIPMENT_BYTE 0x14 |
169 | 80cabfad | bellard | |
170 | 777428f2 | bellard | static int cmos_get_fd_drive_type(int fd0) |
171 | 777428f2 | bellard | { |
172 | 777428f2 | bellard | int val;
|
173 | 777428f2 | bellard | |
174 | 777428f2 | bellard | switch (fd0) {
|
175 | 777428f2 | bellard | case 0: |
176 | 777428f2 | bellard | /* 1.44 Mb 3"5 drive */
|
177 | 777428f2 | bellard | val = 4;
|
178 | 777428f2 | bellard | break;
|
179 | 777428f2 | bellard | case 1: |
180 | 777428f2 | bellard | /* 2.88 Mb 3"5 drive */
|
181 | 777428f2 | bellard | val = 5;
|
182 | 777428f2 | bellard | break;
|
183 | 777428f2 | bellard | case 2: |
184 | 777428f2 | bellard | /* 1.2 Mb 5"5 drive */
|
185 | 777428f2 | bellard | val = 2;
|
186 | 777428f2 | bellard | break;
|
187 | 777428f2 | bellard | default:
|
188 | 777428f2 | bellard | val = 0;
|
189 | 777428f2 | bellard | break;
|
190 | 777428f2 | bellard | } |
191 | 777428f2 | bellard | return val;
|
192 | 777428f2 | bellard | } |
193 | 777428f2 | bellard | |
194 | 5fafdf24 | ths | static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
195 | ba6c2377 | bellard | { |
196 | ba6c2377 | bellard | RTCState *s = rtc_state; |
197 | ba6c2377 | bellard | int cylinders, heads, sectors;
|
198 | ba6c2377 | bellard | bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
199 | ba6c2377 | bellard | rtc_set_memory(s, type_ofs, 47);
|
200 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs, cylinders); |
201 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
202 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 2, heads);
|
203 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 3, 0xff); |
204 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 4, 0xff); |
205 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
206 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 6, cylinders);
|
207 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
208 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 8, sectors);
|
209 | ba6c2377 | bellard | } |
210 | ba6c2377 | bellard | |
211 | 6ac0e82d | balrog | /* convert boot_device letter to something recognizable by the bios */
|
212 | 6ac0e82d | balrog | static int boot_device2nibble(char boot_device) |
213 | 6ac0e82d | balrog | { |
214 | 6ac0e82d | balrog | switch(boot_device) {
|
215 | 6ac0e82d | balrog | case 'a': |
216 | 6ac0e82d | balrog | case 'b': |
217 | 6ac0e82d | balrog | return 0x01; /* floppy boot */ |
218 | 6ac0e82d | balrog | case 'c': |
219 | 6ac0e82d | balrog | return 0x02; /* hard drive boot */ |
220 | 6ac0e82d | balrog | case 'd': |
221 | 6ac0e82d | balrog | return 0x03; /* CD-ROM boot */ |
222 | 6ac0e82d | balrog | case 'n': |
223 | 6ac0e82d | balrog | return 0x04; /* Network boot */ |
224 | 6ac0e82d | balrog | } |
225 | 6ac0e82d | balrog | return 0; |
226 | 6ac0e82d | balrog | } |
227 | 6ac0e82d | balrog | |
228 | 0ecdffbb | aurel32 | /* copy/pasted from cmos_init, should be made a general function
|
229 | 0ecdffbb | aurel32 | and used there as well */
|
230 | 3b4366de | blueswir1 | static int pc_boot_set(void *opaque, const char *boot_device) |
231 | 0ecdffbb | aurel32 | { |
232 | 376253ec | aliguori | Monitor *mon = cur_mon; |
233 | 0ecdffbb | aurel32 | #define PC_MAX_BOOT_DEVICES 3 |
234 | 3b4366de | blueswir1 | RTCState *s = (RTCState *)opaque; |
235 | 0ecdffbb | aurel32 | int nbds, bds[3] = { 0, }; |
236 | 0ecdffbb | aurel32 | int i;
|
237 | 0ecdffbb | aurel32 | |
238 | 0ecdffbb | aurel32 | nbds = strlen(boot_device); |
239 | 0ecdffbb | aurel32 | if (nbds > PC_MAX_BOOT_DEVICES) {
|
240 | 376253ec | aliguori | monitor_printf(mon, "Too many boot devices for PC\n");
|
241 | 0ecdffbb | aurel32 | return(1); |
242 | 0ecdffbb | aurel32 | } |
243 | 0ecdffbb | aurel32 | for (i = 0; i < nbds; i++) { |
244 | 0ecdffbb | aurel32 | bds[i] = boot_device2nibble(boot_device[i]); |
245 | 0ecdffbb | aurel32 | if (bds[i] == 0) { |
246 | 376253ec | aliguori | monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
|
247 | 376253ec | aliguori | boot_device[i]); |
248 | 0ecdffbb | aurel32 | return(1); |
249 | 0ecdffbb | aurel32 | } |
250 | 0ecdffbb | aurel32 | } |
251 | 0ecdffbb | aurel32 | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); |
252 | 0ecdffbb | aurel32 | rtc_set_memory(s, 0x38, (bds[2] << 4)); |
253 | 0ecdffbb | aurel32 | return(0); |
254 | 0ecdffbb | aurel32 | } |
255 | 0ecdffbb | aurel32 | |
256 | ba6c2377 | bellard | /* hd_table must contain 4 block drivers */
|
257 | 00f82b8a | aurel32 | static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, |
258 | 00f82b8a | aurel32 | const char *boot_device, BlockDriverState **hd_table) |
259 | 80cabfad | bellard | { |
260 | b0a21b53 | bellard | RTCState *s = rtc_state; |
261 | 28c5af54 | j_mayer | int nbds, bds[3] = { 0, }; |
262 | 80cabfad | bellard | int val;
|
263 | b41a2cd1 | bellard | int fd0, fd1, nb;
|
264 | ba6c2377 | bellard | int i;
|
265 | b0a21b53 | bellard | |
266 | b0a21b53 | bellard | /* various important CMOS locations needed by PC/Bochs bios */
|
267 | 80cabfad | bellard | |
268 | 80cabfad | bellard | /* memory size */
|
269 | 333190eb | bellard | val = 640; /* base memory in K */ |
270 | 333190eb | bellard | rtc_set_memory(s, 0x15, val);
|
271 | 333190eb | bellard | rtc_set_memory(s, 0x16, val >> 8); |
272 | 333190eb | bellard | |
273 | 80cabfad | bellard | val = (ram_size / 1024) - 1024; |
274 | 80cabfad | bellard | if (val > 65535) |
275 | 80cabfad | bellard | val = 65535;
|
276 | b0a21b53 | bellard | rtc_set_memory(s, 0x17, val);
|
277 | b0a21b53 | bellard | rtc_set_memory(s, 0x18, val >> 8); |
278 | b0a21b53 | bellard | rtc_set_memory(s, 0x30, val);
|
279 | b0a21b53 | bellard | rtc_set_memory(s, 0x31, val >> 8); |
280 | 80cabfad | bellard | |
281 | 00f82b8a | aurel32 | if (above_4g_mem_size) {
|
282 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16); |
283 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24); |
284 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32); |
285 | 00f82b8a | aurel32 | } |
286 | 00f82b8a | aurel32 | |
287 | 9da98861 | bellard | if (ram_size > (16 * 1024 * 1024)) |
288 | 9da98861 | bellard | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
289 | 9da98861 | bellard | else
|
290 | 9da98861 | bellard | val = 0;
|
291 | 80cabfad | bellard | if (val > 65535) |
292 | 80cabfad | bellard | val = 65535;
|
293 | b0a21b53 | bellard | rtc_set_memory(s, 0x34, val);
|
294 | b0a21b53 | bellard | rtc_set_memory(s, 0x35, val >> 8); |
295 | 3b46e624 | ths | |
296 | 298e01b6 | aurel32 | /* set the number of CPU */
|
297 | 298e01b6 | aurel32 | rtc_set_memory(s, 0x5f, smp_cpus - 1); |
298 | 298e01b6 | aurel32 | |
299 | 6ac0e82d | balrog | /* set boot devices, and disable floppy signature check if requested */
|
300 | 28c5af54 | j_mayer | #define PC_MAX_BOOT_DEVICES 3 |
301 | 28c5af54 | j_mayer | nbds = strlen(boot_device); |
302 | 28c5af54 | j_mayer | if (nbds > PC_MAX_BOOT_DEVICES) {
|
303 | 28c5af54 | j_mayer | fprintf(stderr, "Too many boot devices for PC\n");
|
304 | 28c5af54 | j_mayer | exit(1);
|
305 | 28c5af54 | j_mayer | } |
306 | 28c5af54 | j_mayer | for (i = 0; i < nbds; i++) { |
307 | 28c5af54 | j_mayer | bds[i] = boot_device2nibble(boot_device[i]); |
308 | 28c5af54 | j_mayer | if (bds[i] == 0) { |
309 | 28c5af54 | j_mayer | fprintf(stderr, "Invalid boot device for PC: '%c'\n",
|
310 | 28c5af54 | j_mayer | boot_device[i]); |
311 | 28c5af54 | j_mayer | exit(1);
|
312 | 28c5af54 | j_mayer | } |
313 | 28c5af54 | j_mayer | } |
314 | 28c5af54 | j_mayer | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); |
315 | 28c5af54 | j_mayer | rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); |
316 | 80cabfad | bellard | |
317 | b41a2cd1 | bellard | /* floppy type */
|
318 | b41a2cd1 | bellard | |
319 | baca51fa | bellard | fd0 = fdctrl_get_drive_type(floppy_controller, 0);
|
320 | baca51fa | bellard | fd1 = fdctrl_get_drive_type(floppy_controller, 1);
|
321 | 80cabfad | bellard | |
322 | 777428f2 | bellard | val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
|
323 | b0a21b53 | bellard | rtc_set_memory(s, 0x10, val);
|
324 | 3b46e624 | ths | |
325 | b0a21b53 | bellard | val = 0;
|
326 | b41a2cd1 | bellard | nb = 0;
|
327 | 80cabfad | bellard | if (fd0 < 3) |
328 | 80cabfad | bellard | nb++; |
329 | 80cabfad | bellard | if (fd1 < 3) |
330 | 80cabfad | bellard | nb++; |
331 | 80cabfad | bellard | switch (nb) {
|
332 | 80cabfad | bellard | case 0: |
333 | 80cabfad | bellard | break;
|
334 | 80cabfad | bellard | case 1: |
335 | b0a21b53 | bellard | val |= 0x01; /* 1 drive, ready for boot */ |
336 | 80cabfad | bellard | break;
|
337 | 80cabfad | bellard | case 2: |
338 | b0a21b53 | bellard | val |= 0x41; /* 2 drives, ready for boot */ |
339 | 80cabfad | bellard | break;
|
340 | 80cabfad | bellard | } |
341 | b0a21b53 | bellard | val |= 0x02; /* FPU is there */ |
342 | b0a21b53 | bellard | val |= 0x04; /* PS/2 mouse installed */ |
343 | b0a21b53 | bellard | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
344 | b0a21b53 | bellard | |
345 | ba6c2377 | bellard | /* hard drives */
|
346 | ba6c2377 | bellard | |
347 | ba6c2377 | bellard | rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
348 | ba6c2377 | bellard | if (hd_table[0]) |
349 | ba6c2377 | bellard | cmos_init_hd(0x19, 0x1b, hd_table[0]); |
350 | 5fafdf24 | ths | if (hd_table[1]) |
351 | ba6c2377 | bellard | cmos_init_hd(0x1a, 0x24, hd_table[1]); |
352 | ba6c2377 | bellard | |
353 | ba6c2377 | bellard | val = 0;
|
354 | 40b6ecc6 | bellard | for (i = 0; i < 4; i++) { |
355 | ba6c2377 | bellard | if (hd_table[i]) {
|
356 | 46d4767d | bellard | int cylinders, heads, sectors, translation;
|
357 | 46d4767d | bellard | /* NOTE: bdrv_get_geometry_hint() returns the physical
|
358 | 46d4767d | bellard | geometry. It is always such that: 1 <= sects <= 63, 1
|
359 | 46d4767d | bellard | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
|
360 | 46d4767d | bellard | geometry can be different if a translation is done. */
|
361 | 46d4767d | bellard | translation = bdrv_get_translation_hint(hd_table[i]); |
362 | 46d4767d | bellard | if (translation == BIOS_ATA_TRANSLATION_AUTO) {
|
363 | 46d4767d | bellard | bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
364 | 46d4767d | bellard | if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
365 | 46d4767d | bellard | /* No translation. */
|
366 | 46d4767d | bellard | translation = 0;
|
367 | 46d4767d | bellard | } else {
|
368 | 46d4767d | bellard | /* LBA translation. */
|
369 | 46d4767d | bellard | translation = 1;
|
370 | 46d4767d | bellard | } |
371 | 40b6ecc6 | bellard | } else {
|
372 | 46d4767d | bellard | translation--; |
373 | ba6c2377 | bellard | } |
374 | ba6c2377 | bellard | val |= translation << (i * 2);
|
375 | ba6c2377 | bellard | } |
376 | 40b6ecc6 | bellard | } |
377 | ba6c2377 | bellard | rtc_set_memory(s, 0x39, val);
|
378 | 80cabfad | bellard | } |
379 | 80cabfad | bellard | |
380 | 59b8ad81 | bellard | void ioport_set_a20(int enable) |
381 | 59b8ad81 | bellard | { |
382 | 59b8ad81 | bellard | /* XXX: send to all CPUs ? */
|
383 | 59b8ad81 | bellard | cpu_x86_set_a20(first_cpu, enable); |
384 | 59b8ad81 | bellard | } |
385 | 59b8ad81 | bellard | |
386 | 59b8ad81 | bellard | int ioport_get_a20(void) |
387 | 59b8ad81 | bellard | { |
388 | 59b8ad81 | bellard | return ((first_cpu->a20_mask >> 20) & 1); |
389 | 59b8ad81 | bellard | } |
390 | 59b8ad81 | bellard | |
391 | e1a23744 | bellard | static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
392 | e1a23744 | bellard | { |
393 | 59b8ad81 | bellard | ioport_set_a20((val >> 1) & 1); |
394 | e1a23744 | bellard | /* XXX: bit 0 is fast reset */
|
395 | e1a23744 | bellard | } |
396 | e1a23744 | bellard | |
397 | e1a23744 | bellard | static uint32_t ioport92_read(void *opaque, uint32_t addr) |
398 | e1a23744 | bellard | { |
399 | 59b8ad81 | bellard | return ioport_get_a20() << 1; |
400 | e1a23744 | bellard | } |
401 | e1a23744 | bellard | |
402 | 80cabfad | bellard | /***********************************************************/
|
403 | 80cabfad | bellard | /* Bochs BIOS debug ports */
|
404 | 80cabfad | bellard | |
405 | 9596ebb7 | pbrook | static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
406 | 80cabfad | bellard | { |
407 | a2f659ee | bellard | static const char shutdown_str[8] = "Shutdown"; |
408 | a2f659ee | bellard | static int shutdown_index = 0; |
409 | 3b46e624 | ths | |
410 | 80cabfad | bellard | switch(addr) {
|
411 | 80cabfad | bellard | /* Bochs BIOS messages */
|
412 | 80cabfad | bellard | case 0x400: |
413 | 80cabfad | bellard | case 0x401: |
414 | 80cabfad | bellard | fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
|
415 | 80cabfad | bellard | exit(1);
|
416 | 80cabfad | bellard | case 0x402: |
417 | 80cabfad | bellard | case 0x403: |
418 | 80cabfad | bellard | #ifdef DEBUG_BIOS
|
419 | 80cabfad | bellard | fprintf(stderr, "%c", val);
|
420 | 80cabfad | bellard | #endif
|
421 | 80cabfad | bellard | break;
|
422 | a2f659ee | bellard | case 0x8900: |
423 | a2f659ee | bellard | /* same as Bochs power off */
|
424 | a2f659ee | bellard | if (val == shutdown_str[shutdown_index]) {
|
425 | a2f659ee | bellard | shutdown_index++; |
426 | a2f659ee | bellard | if (shutdown_index == 8) { |
427 | a2f659ee | bellard | shutdown_index = 0;
|
428 | a2f659ee | bellard | qemu_system_shutdown_request(); |
429 | a2f659ee | bellard | } |
430 | a2f659ee | bellard | } else {
|
431 | a2f659ee | bellard | shutdown_index = 0;
|
432 | a2f659ee | bellard | } |
433 | a2f659ee | bellard | break;
|
434 | 80cabfad | bellard | |
435 | 80cabfad | bellard | /* LGPL'ed VGA BIOS messages */
|
436 | 80cabfad | bellard | case 0x501: |
437 | 80cabfad | bellard | case 0x502: |
438 | 80cabfad | bellard | fprintf(stderr, "VGA BIOS panic, line %d\n", val);
|
439 | 80cabfad | bellard | exit(1);
|
440 | 80cabfad | bellard | case 0x500: |
441 | 80cabfad | bellard | case 0x503: |
442 | 80cabfad | bellard | #ifdef DEBUG_BIOS
|
443 | 80cabfad | bellard | fprintf(stderr, "%c", val);
|
444 | 80cabfad | bellard | #endif
|
445 | 80cabfad | bellard | break;
|
446 | 80cabfad | bellard | } |
447 | 80cabfad | bellard | } |
448 | 80cabfad | bellard | |
449 | 11c2fd3e | aliguori | extern uint64_t node_cpumask[MAX_NODES];
|
450 | 11c2fd3e | aliguori | |
451 | 9596ebb7 | pbrook | static void bochs_bios_init(void) |
452 | 80cabfad | bellard | { |
453 | 3cce6243 | blueswir1 | void *fw_cfg;
|
454 | b6f6e3d3 | aliguori | uint8_t *smbios_table; |
455 | b6f6e3d3 | aliguori | size_t smbios_len; |
456 | 11c2fd3e | aliguori | uint64_t *numa_fw_cfg; |
457 | 11c2fd3e | aliguori | int i, j;
|
458 | 3cce6243 | blueswir1 | |
459 | b41a2cd1 | bellard | register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
460 | b41a2cd1 | bellard | register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
461 | b41a2cd1 | bellard | register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
462 | b41a2cd1 | bellard | register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
463 | a2f659ee | bellard | register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
464 | b41a2cd1 | bellard | |
465 | b41a2cd1 | bellard | register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
466 | b41a2cd1 | bellard | register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
467 | b41a2cd1 | bellard | register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
468 | b41a2cd1 | bellard | register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
469 | 3cce6243 | blueswir1 | |
470 | 3cce6243 | blueswir1 | fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0); |
471 | 3cce6243 | blueswir1 | fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
|
472 | 905fdcb5 | blueswir1 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); |
473 | 80deece2 | blueswir1 | fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables, |
474 | 80deece2 | blueswir1 | acpi_tables_len); |
475 | b6f6e3d3 | aliguori | |
476 | b6f6e3d3 | aliguori | smbios_table = smbios_get_table(&smbios_len); |
477 | b6f6e3d3 | aliguori | if (smbios_table)
|
478 | b6f6e3d3 | aliguori | fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, |
479 | b6f6e3d3 | aliguori | smbios_table, smbios_len); |
480 | 11c2fd3e | aliguori | |
481 | 11c2fd3e | aliguori | /* allocate memory for the NUMA channel: one (64bit) word for the number
|
482 | 11c2fd3e | aliguori | * of nodes, one word for each VCPU->node and one word for each node to
|
483 | 11c2fd3e | aliguori | * hold the amount of memory.
|
484 | 11c2fd3e | aliguori | */
|
485 | 11c2fd3e | aliguori | numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8); |
486 | 11c2fd3e | aliguori | numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
|
487 | 11c2fd3e | aliguori | for (i = 0; i < smp_cpus; i++) { |
488 | 11c2fd3e | aliguori | for (j = 0; j < nb_numa_nodes; j++) { |
489 | 11c2fd3e | aliguori | if (node_cpumask[j] & (1 << i)) { |
490 | 11c2fd3e | aliguori | numa_fw_cfg[i + 1] = cpu_to_le64(j);
|
491 | 11c2fd3e | aliguori | break;
|
492 | 11c2fd3e | aliguori | } |
493 | 11c2fd3e | aliguori | } |
494 | 11c2fd3e | aliguori | } |
495 | 11c2fd3e | aliguori | for (i = 0; i < nb_numa_nodes; i++) { |
496 | 11c2fd3e | aliguori | numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
|
497 | 11c2fd3e | aliguori | } |
498 | 11c2fd3e | aliguori | fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg, |
499 | 11c2fd3e | aliguori | (1 + smp_cpus + nb_numa_nodes) * 8); |
500 | 80cabfad | bellard | } |
501 | 80cabfad | bellard | |
502 | 642a4f96 | ths | /* Generate an initial boot sector which sets state and jump to
|
503 | 642a4f96 | ths | a specified vector */
|
504 | 7ffa4767 | pbrook | static void generate_bootsect(target_phys_addr_t option_rom, |
505 | 4fc9af53 | aliguori | uint32_t gpr[8], uint16_t segs[6], uint16_t ip) |
506 | 642a4f96 | ths | { |
507 | 4fc9af53 | aliguori | uint8_t rom[512], *p, *reloc;
|
508 | 4fc9af53 | aliguori | uint8_t sum; |
509 | 642a4f96 | ths | int i;
|
510 | 642a4f96 | ths | |
511 | 4fc9af53 | aliguori | memset(rom, 0, sizeof(rom)); |
512 | 4fc9af53 | aliguori | |
513 | 4fc9af53 | aliguori | p = rom; |
514 | 4fc9af53 | aliguori | /* Make sure we have an option rom signature */
|
515 | 4fc9af53 | aliguori | *p++ = 0x55;
|
516 | 4fc9af53 | aliguori | *p++ = 0xaa;
|
517 | 642a4f96 | ths | |
518 | 4fc9af53 | aliguori | /* ROM size in sectors*/
|
519 | 4fc9af53 | aliguori | *p++ = 1;
|
520 | 642a4f96 | ths | |
521 | 4fc9af53 | aliguori | /* Hook int19 */
|
522 | 642a4f96 | ths | |
523 | 4fc9af53 | aliguori | *p++ = 0x50; /* push ax */ |
524 | 4fc9af53 | aliguori | *p++ = 0x1e; /* push ds */ |
525 | 4fc9af53 | aliguori | *p++ = 0x31; *p++ = 0xc0; /* xor ax, ax */ |
526 | 4fc9af53 | aliguori | *p++ = 0x8e; *p++ = 0xd8; /* mov ax, ds */ |
527 | 642a4f96 | ths | |
528 | 4fc9af53 | aliguori | *p++ = 0xc7; *p++ = 0x06; /* movvw _start,0x64 */ |
529 | 4fc9af53 | aliguori | *p++ = 0x64; *p++ = 0x00; |
530 | 4fc9af53 | aliguori | reloc = p; |
531 | 4fc9af53 | aliguori | *p++ = 0x00; *p++ = 0x00; |
532 | 4fc9af53 | aliguori | |
533 | 4fc9af53 | aliguori | *p++ = 0x8c; *p++ = 0x0e; /* mov cs,0x66 */ |
534 | 4fc9af53 | aliguori | *p++ = 0x66; *p++ = 0x00; |
535 | 4fc9af53 | aliguori | |
536 | 4fc9af53 | aliguori | *p++ = 0x1f; /* pop ds */ |
537 | 4fc9af53 | aliguori | *p++ = 0x58; /* pop ax */ |
538 | 4fc9af53 | aliguori | *p++ = 0xcb; /* lret */ |
539 | 4fc9af53 | aliguori | |
540 | 642a4f96 | ths | /* Actual code */
|
541 | 4fc9af53 | aliguori | *reloc = (p - rom); |
542 | 4fc9af53 | aliguori | |
543 | 642a4f96 | ths | *p++ = 0xfa; /* CLI */ |
544 | 642a4f96 | ths | *p++ = 0xfc; /* CLD */ |
545 | 642a4f96 | ths | |
546 | 642a4f96 | ths | for (i = 0; i < 6; i++) { |
547 | 642a4f96 | ths | if (i == 1) /* Skip CS */ |
548 | 642a4f96 | ths | continue;
|
549 | 642a4f96 | ths | |
550 | 642a4f96 | ths | *p++ = 0xb8; /* MOV AX,imm16 */ |
551 | 642a4f96 | ths | *p++ = segs[i]; |
552 | 642a4f96 | ths | *p++ = segs[i] >> 8;
|
553 | 642a4f96 | ths | *p++ = 0x8e; /* MOV <seg>,AX */ |
554 | 642a4f96 | ths | *p++ = 0xc0 + (i << 3); |
555 | 642a4f96 | ths | } |
556 | 642a4f96 | ths | |
557 | 642a4f96 | ths | for (i = 0; i < 8; i++) { |
558 | 642a4f96 | ths | *p++ = 0x66; /* 32-bit operand size */ |
559 | 642a4f96 | ths | *p++ = 0xb8 + i; /* MOV <reg>,imm32 */ |
560 | 642a4f96 | ths | *p++ = gpr[i]; |
561 | 642a4f96 | ths | *p++ = gpr[i] >> 8;
|
562 | 642a4f96 | ths | *p++ = gpr[i] >> 16;
|
563 | 642a4f96 | ths | *p++ = gpr[i] >> 24;
|
564 | 642a4f96 | ths | } |
565 | 642a4f96 | ths | |
566 | 642a4f96 | ths | *p++ = 0xea; /* JMP FAR */ |
567 | 642a4f96 | ths | *p++ = ip; /* IP */
|
568 | 642a4f96 | ths | *p++ = ip >> 8;
|
569 | 642a4f96 | ths | *p++ = segs[1]; /* CS */ |
570 | 642a4f96 | ths | *p++ = segs[1] >> 8; |
571 | 642a4f96 | ths | |
572 | 4fc9af53 | aliguori | /* sign rom */
|
573 | 4fc9af53 | aliguori | sum = 0;
|
574 | 4fc9af53 | aliguori | for (i = 0; i < (sizeof(rom) - 1); i++) |
575 | 4fc9af53 | aliguori | sum += rom[i]; |
576 | 4fc9af53 | aliguori | rom[sizeof(rom) - 1] = -sum; |
577 | 4fc9af53 | aliguori | |
578 | 7ffa4767 | pbrook | cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
|
579 | d6ecb036 | Glauber Costa | option_rom_setup_reset(option_rom, sizeof (rom));
|
580 | 642a4f96 | ths | } |
581 | 80cabfad | bellard | |
582 | 642a4f96 | ths | static long get_file_size(FILE *f) |
583 | 642a4f96 | ths | { |
584 | 642a4f96 | ths | long where, size;
|
585 | 642a4f96 | ths | |
586 | 642a4f96 | ths | /* XXX: on Unix systems, using fstat() probably makes more sense */
|
587 | 642a4f96 | ths | |
588 | 642a4f96 | ths | where = ftell(f); |
589 | 642a4f96 | ths | fseek(f, 0, SEEK_END);
|
590 | 642a4f96 | ths | size = ftell(f); |
591 | 642a4f96 | ths | fseek(f, where, SEEK_SET); |
592 | 642a4f96 | ths | |
593 | 642a4f96 | ths | return size;
|
594 | 642a4f96 | ths | } |
595 | 642a4f96 | ths | |
596 | 7ffa4767 | pbrook | static void load_linux(target_phys_addr_t option_rom, |
597 | 4fc9af53 | aliguori | const char *kernel_filename, |
598 | 642a4f96 | ths | const char *initrd_filename, |
599 | e6ade764 | Glauber Costa | const char *kernel_cmdline, |
600 | e6ade764 | Glauber Costa | target_phys_addr_t max_ram_size) |
601 | 642a4f96 | ths | { |
602 | 642a4f96 | ths | uint16_t protocol; |
603 | 642a4f96 | ths | uint32_t gpr[8];
|
604 | 642a4f96 | ths | uint16_t seg[6];
|
605 | 642a4f96 | ths | uint16_t real_seg; |
606 | 5cea8590 | Paul Brook | int setup_size, kernel_size, initrd_size = 0, cmdline_size; |
607 | 642a4f96 | ths | uint32_t initrd_max; |
608 | 642a4f96 | ths | uint8_t header[1024];
|
609 | 5cea8590 | Paul Brook | target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
|
610 | 642a4f96 | ths | FILE *f, *fi; |
611 | 642a4f96 | ths | |
612 | 642a4f96 | ths | /* Align to 16 bytes as a paranoia measure */
|
613 | 642a4f96 | ths | cmdline_size = (strlen(kernel_cmdline)+16) & ~15; |
614 | 642a4f96 | ths | |
615 | 642a4f96 | ths | /* load the kernel header */
|
616 | 642a4f96 | ths | f = fopen(kernel_filename, "rb");
|
617 | 642a4f96 | ths | if (!f || !(kernel_size = get_file_size(f)) ||
|
618 | 642a4f96 | ths | fread(header, 1, 1024, f) != 1024) { |
619 | 642a4f96 | ths | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
620 | 642a4f96 | ths | kernel_filename); |
621 | 642a4f96 | ths | exit(1);
|
622 | 642a4f96 | ths | } |
623 | 642a4f96 | ths | |
624 | 642a4f96 | ths | /* kernel protocol version */
|
625 | bc4edd79 | bellard | #if 0
|
626 | 642a4f96 | ths | fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
|
627 | bc4edd79 | bellard | #endif
|
628 | 642a4f96 | ths | if (ldl_p(header+0x202) == 0x53726448) |
629 | 642a4f96 | ths | protocol = lduw_p(header+0x206);
|
630 | 642a4f96 | ths | else
|
631 | 642a4f96 | ths | protocol = 0;
|
632 | 642a4f96 | ths | |
633 | 642a4f96 | ths | if (protocol < 0x200 || !(header[0x211] & 0x01)) { |
634 | 642a4f96 | ths | /* Low kernel */
|
635 | a37af289 | blueswir1 | real_addr = 0x90000;
|
636 | a37af289 | blueswir1 | cmdline_addr = 0x9a000 - cmdline_size;
|
637 | a37af289 | blueswir1 | prot_addr = 0x10000;
|
638 | 642a4f96 | ths | } else if (protocol < 0x202) { |
639 | 642a4f96 | ths | /* High but ancient kernel */
|
640 | a37af289 | blueswir1 | real_addr = 0x90000;
|
641 | a37af289 | blueswir1 | cmdline_addr = 0x9a000 - cmdline_size;
|
642 | a37af289 | blueswir1 | prot_addr = 0x100000;
|
643 | 642a4f96 | ths | } else {
|
644 | 642a4f96 | ths | /* High and recent kernel */
|
645 | a37af289 | blueswir1 | real_addr = 0x10000;
|
646 | a37af289 | blueswir1 | cmdline_addr = 0x20000;
|
647 | a37af289 | blueswir1 | prot_addr = 0x100000;
|
648 | 642a4f96 | ths | } |
649 | 642a4f96 | ths | |
650 | bc4edd79 | bellard | #if 0
|
651 | 642a4f96 | ths | fprintf(stderr,
|
652 | 526ccb7a | balrog | "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
|
653 | 526ccb7a | balrog | "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
|
654 | 526ccb7a | balrog | "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
|
655 | a37af289 | blueswir1 | real_addr,
|
656 | a37af289 | blueswir1 | cmdline_addr,
|
657 | a37af289 | blueswir1 | prot_addr);
|
658 | bc4edd79 | bellard | #endif
|
659 | 642a4f96 | ths | |
660 | 642a4f96 | ths | /* highest address for loading the initrd */
|
661 | 642a4f96 | ths | if (protocol >= 0x203) |
662 | 642a4f96 | ths | initrd_max = ldl_p(header+0x22c);
|
663 | 642a4f96 | ths | else
|
664 | 642a4f96 | ths | initrd_max = 0x37ffffff;
|
665 | 642a4f96 | ths | |
666 | e6ade764 | Glauber Costa | if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
|
667 | e6ade764 | Glauber Costa | initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
|
668 | 642a4f96 | ths | |
669 | 642a4f96 | ths | /* kernel command line */
|
670 | a37af289 | blueswir1 | pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
|
671 | 642a4f96 | ths | |
672 | 642a4f96 | ths | if (protocol >= 0x202) { |
673 | a37af289 | blueswir1 | stl_p(header+0x228, cmdline_addr);
|
674 | 642a4f96 | ths | } else {
|
675 | 642a4f96 | ths | stw_p(header+0x20, 0xA33F); |
676 | 642a4f96 | ths | stw_p(header+0x22, cmdline_addr-real_addr);
|
677 | 642a4f96 | ths | } |
678 | 642a4f96 | ths | |
679 | 642a4f96 | ths | /* loader type */
|
680 | 642a4f96 | ths | /* High nybble = B reserved for Qemu; low nybble is revision number.
|
681 | 642a4f96 | ths | If this code is substantially changed, you may want to consider
|
682 | 642a4f96 | ths | incrementing the revision. */
|
683 | 642a4f96 | ths | if (protocol >= 0x200) |
684 | 642a4f96 | ths | header[0x210] = 0xB0; |
685 | 642a4f96 | ths | |
686 | 642a4f96 | ths | /* heap */
|
687 | 642a4f96 | ths | if (protocol >= 0x201) { |
688 | 642a4f96 | ths | header[0x211] |= 0x80; /* CAN_USE_HEAP */ |
689 | 642a4f96 | ths | stw_p(header+0x224, cmdline_addr-real_addr-0x200); |
690 | 642a4f96 | ths | } |
691 | 642a4f96 | ths | |
692 | 642a4f96 | ths | /* load initrd */
|
693 | 642a4f96 | ths | if (initrd_filename) {
|
694 | 642a4f96 | ths | if (protocol < 0x200) { |
695 | 642a4f96 | ths | fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
|
696 | 642a4f96 | ths | exit(1);
|
697 | 642a4f96 | ths | } |
698 | 642a4f96 | ths | |
699 | 642a4f96 | ths | fi = fopen(initrd_filename, "rb");
|
700 | 642a4f96 | ths | if (!fi) {
|
701 | 642a4f96 | ths | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
702 | 642a4f96 | ths | initrd_filename); |
703 | 642a4f96 | ths | exit(1);
|
704 | 642a4f96 | ths | } |
705 | 642a4f96 | ths | |
706 | 642a4f96 | ths | initrd_size = get_file_size(fi); |
707 | a37af289 | blueswir1 | initrd_addr = (initrd_max-initrd_size) & ~4095;
|
708 | 642a4f96 | ths | |
709 | a37af289 | blueswir1 | if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
|
710 | 642a4f96 | ths | fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
|
711 | 642a4f96 | ths | initrd_filename); |
712 | 642a4f96 | ths | exit(1);
|
713 | 642a4f96 | ths | } |
714 | 642a4f96 | ths | fclose(fi); |
715 | 642a4f96 | ths | |
716 | a37af289 | blueswir1 | stl_p(header+0x218, initrd_addr);
|
717 | 642a4f96 | ths | stl_p(header+0x21c, initrd_size);
|
718 | 642a4f96 | ths | } |
719 | 642a4f96 | ths | |
720 | 642a4f96 | ths | /* store the finalized header and load the rest of the kernel */
|
721 | a37af289 | blueswir1 | cpu_physical_memory_write(real_addr, header, 1024);
|
722 | 642a4f96 | ths | |
723 | 642a4f96 | ths | setup_size = header[0x1f1];
|
724 | 642a4f96 | ths | if (setup_size == 0) |
725 | 642a4f96 | ths | setup_size = 4;
|
726 | 642a4f96 | ths | |
727 | 642a4f96 | ths | setup_size = (setup_size+1)*512; |
728 | 642a4f96 | ths | kernel_size -= setup_size; /* Size of protected-mode code */
|
729 | 642a4f96 | ths | |
730 | a37af289 | blueswir1 | if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) || |
731 | a37af289 | blueswir1 | !fread_targphys_ok(prot_addr, kernel_size, f)) { |
732 | 642a4f96 | ths | fprintf(stderr, "qemu: read error on kernel '%s'\n",
|
733 | 642a4f96 | ths | kernel_filename); |
734 | 642a4f96 | ths | exit(1);
|
735 | 642a4f96 | ths | } |
736 | 642a4f96 | ths | fclose(f); |
737 | 642a4f96 | ths | |
738 | 642a4f96 | ths | /* generate bootsector to set up the initial register state */
|
739 | a37af289 | blueswir1 | real_seg = real_addr >> 4;
|
740 | 642a4f96 | ths | seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg; |
741 | 642a4f96 | ths | seg[1] = real_seg+0x20; /* CS */ |
742 | 642a4f96 | ths | memset(gpr, 0, sizeof gpr); |
743 | 642a4f96 | ths | gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */ |
744 | 642a4f96 | ths | |
745 | d6ecb036 | Glauber Costa | option_rom_setup_reset(real_addr, setup_size); |
746 | d6ecb036 | Glauber Costa | option_rom_setup_reset(prot_addr, kernel_size); |
747 | d6ecb036 | Glauber Costa | option_rom_setup_reset(cmdline_addr, cmdline_size); |
748 | d6ecb036 | Glauber Costa | if (initrd_filename)
|
749 | d6ecb036 | Glauber Costa | option_rom_setup_reset(initrd_addr, initrd_size); |
750 | d6ecb036 | Glauber Costa | |
751 | 4fc9af53 | aliguori | generate_bootsect(option_rom, gpr, seg, 0);
|
752 | 642a4f96 | ths | } |
753 | 642a4f96 | ths | |
754 | 59b8ad81 | bellard | static void main_cpu_reset(void *opaque) |
755 | 59b8ad81 | bellard | { |
756 | 59b8ad81 | bellard | CPUState *env = opaque; |
757 | 59b8ad81 | bellard | cpu_reset(env); |
758 | 59b8ad81 | bellard | } |
759 | 59b8ad81 | bellard | |
760 | b41a2cd1 | bellard | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
761 | b41a2cd1 | bellard | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
762 | b41a2cd1 | bellard | static const int ide_irq[2] = { 14, 15 }; |
763 | b41a2cd1 | bellard | |
764 | b41a2cd1 | bellard | #define NE2000_NB_MAX 6 |
765 | b41a2cd1 | bellard | |
766 | 8d11df9e | bellard | static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
767 | b41a2cd1 | bellard | static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
768 | b41a2cd1 | bellard | |
769 | 8d11df9e | bellard | static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
770 | 8d11df9e | bellard | static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
771 | 8d11df9e | bellard | |
772 | 6508fe59 | bellard | static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
773 | 6508fe59 | bellard | static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
774 | 6508fe59 | bellard | |
775 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
776 | d537cf6c | pbrook | static void audio_init (PCIBus *pci_bus, qemu_irq *pic) |
777 | 6a36d84e | bellard | { |
778 | 6a36d84e | bellard | struct soundhw *c;
|
779 | 6a36d84e | bellard | |
780 | 3a8bae3e | malc | for (c = soundhw; c->name; ++c) {
|
781 | 3a8bae3e | malc | if (c->enabled) {
|
782 | 3a8bae3e | malc | if (c->isa) {
|
783 | 3a8bae3e | malc | c->init.init_isa(pic); |
784 | 3a8bae3e | malc | } else {
|
785 | 3a8bae3e | malc | if (pci_bus) {
|
786 | 3a8bae3e | malc | c->init.init_pci(pci_bus); |
787 | 6a36d84e | bellard | } |
788 | 6a36d84e | bellard | } |
789 | 6a36d84e | bellard | } |
790 | 6a36d84e | bellard | } |
791 | 6a36d84e | bellard | } |
792 | 6a36d84e | bellard | #endif
|
793 | 6a36d84e | bellard | |
794 | d537cf6c | pbrook | static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) |
795 | a41b2ff2 | pbrook | { |
796 | a41b2ff2 | pbrook | static int nb_ne2k = 0; |
797 | a41b2ff2 | pbrook | |
798 | a41b2ff2 | pbrook | if (nb_ne2k == NE2000_NB_MAX)
|
799 | a41b2ff2 | pbrook | return;
|
800 | d537cf6c | pbrook | isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd); |
801 | a41b2ff2 | pbrook | nb_ne2k++; |
802 | a41b2ff2 | pbrook | } |
803 | a41b2ff2 | pbrook | |
804 | f753ff16 | pbrook | static int load_option_rom(const char *oprom, target_phys_addr_t start, |
805 | f753ff16 | pbrook | target_phys_addr_t end) |
806 | f753ff16 | pbrook | { |
807 | f753ff16 | pbrook | int size;
|
808 | 5cea8590 | Paul Brook | char *filename;
|
809 | 5cea8590 | Paul Brook | |
810 | 5cea8590 | Paul Brook | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, oprom); |
811 | 5cea8590 | Paul Brook | if (filename) {
|
812 | 5cea8590 | Paul Brook | size = get_image_size(filename); |
813 | 5cea8590 | Paul Brook | if (size > 0 && start + size > end) { |
814 | 5cea8590 | Paul Brook | fprintf(stderr, "Not enough space to load option rom '%s'\n",
|
815 | 5cea8590 | Paul Brook | oprom); |
816 | 5cea8590 | Paul Brook | exit(1);
|
817 | 5cea8590 | Paul Brook | } |
818 | 5cea8590 | Paul Brook | size = load_image_targphys(filename, start, end - start); |
819 | 5cea8590 | Paul Brook | qemu_free(filename); |
820 | 5cea8590 | Paul Brook | } else {
|
821 | 5cea8590 | Paul Brook | size = -1;
|
822 | f753ff16 | pbrook | } |
823 | f753ff16 | pbrook | if (size < 0) { |
824 | f753ff16 | pbrook | fprintf(stderr, "Could not load option rom '%s'\n", oprom);
|
825 | f753ff16 | pbrook | exit(1);
|
826 | f753ff16 | pbrook | } |
827 | f753ff16 | pbrook | /* Round up optiom rom size to the next 2k boundary */
|
828 | f753ff16 | pbrook | size = (size + 2047) & ~2047; |
829 | e28f9884 | Glauber Costa | option_rom_setup_reset(start, size); |
830 | f753ff16 | pbrook | return size;
|
831 | f753ff16 | pbrook | } |
832 | f753ff16 | pbrook | |
833 | 80cabfad | bellard | /* PC hardware initialisation */
|
834 | fbe1b595 | Paul Brook | static void pc_init1(ram_addr_t ram_size, |
835 | 3023f332 | aliguori | const char *boot_device, |
836 | b5ff2d6e | bellard | const char *kernel_filename, const char *kernel_cmdline, |
837 | 3dbbdc25 | bellard | const char *initrd_filename, |
838 | a049de61 | bellard | int pci_enabled, const char *cpu_model) |
839 | 80cabfad | bellard | { |
840 | 5cea8590 | Paul Brook | char *filename;
|
841 | 642a4f96 | ths | int ret, linux_boot, i;
|
842 | b584726d | pbrook | ram_addr_t ram_addr, bios_offset, option_rom_offset; |
843 | 00f82b8a | aurel32 | ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
|
844 | f753ff16 | pbrook | int bios_size, isa_bios_size, oprom_area_size;
|
845 | 46e50e9d | bellard | PCIBus *pci_bus; |
846 | 5c3ff3a7 | pbrook | int piix3_devfn = -1; |
847 | 59b8ad81 | bellard | CPUState *env; |
848 | d537cf6c | pbrook | qemu_irq *cpu_irq; |
849 | d537cf6c | pbrook | qemu_irq *i8259; |
850 | e4bcb14c | ths | int index;
|
851 | e4bcb14c | ths | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
852 | e4bcb14c | ths | BlockDriverState *fd[MAX_FD]; |
853 | 34b39c2b | aliguori | int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
|
854 | d592d303 | bellard | |
855 | 00f82b8a | aurel32 | if (ram_size >= 0xe0000000 ) { |
856 | 00f82b8a | aurel32 | above_4g_mem_size = ram_size - 0xe0000000;
|
857 | 00f82b8a | aurel32 | below_4g_mem_size = 0xe0000000;
|
858 | 00f82b8a | aurel32 | } else {
|
859 | 00f82b8a | aurel32 | below_4g_mem_size = ram_size; |
860 | 00f82b8a | aurel32 | } |
861 | 00f82b8a | aurel32 | |
862 | 80cabfad | bellard | linux_boot = (kernel_filename != NULL);
|
863 | 80cabfad | bellard | |
864 | 59b8ad81 | bellard | /* init CPUs */
|
865 | a049de61 | bellard | if (cpu_model == NULL) { |
866 | a049de61 | bellard | #ifdef TARGET_X86_64
|
867 | a049de61 | bellard | cpu_model = "qemu64";
|
868 | a049de61 | bellard | #else
|
869 | a049de61 | bellard | cpu_model = "qemu32";
|
870 | a049de61 | bellard | #endif
|
871 | a049de61 | bellard | } |
872 | a049de61 | bellard | |
873 | 59b8ad81 | bellard | for(i = 0; i < smp_cpus; i++) { |
874 | aaed909a | bellard | env = cpu_init(cpu_model); |
875 | aaed909a | bellard | if (!env) {
|
876 | aaed909a | bellard | fprintf(stderr, "Unable to find x86 CPU definition\n");
|
877 | aaed909a | bellard | exit(1);
|
878 | aaed909a | bellard | } |
879 | 59b8ad81 | bellard | if (i != 0) |
880 | ce5232c5 | bellard | env->halted = 1;
|
881 | 59b8ad81 | bellard | if (smp_cpus > 1) { |
882 | 59b8ad81 | bellard | /* XXX: enable it in all cases */
|
883 | 59b8ad81 | bellard | env->cpuid_features |= CPUID_APIC; |
884 | 59b8ad81 | bellard | } |
885 | 8217606e | Jan Kiszka | qemu_register_reset(main_cpu_reset, 0, env);
|
886 | 59b8ad81 | bellard | if (pci_enabled) {
|
887 | 59b8ad81 | bellard | apic_init(env); |
888 | 59b8ad81 | bellard | } |
889 | 59b8ad81 | bellard | } |
890 | 59b8ad81 | bellard | |
891 | 26fb5e48 | aurel32 | vmport_init(); |
892 | 26fb5e48 | aurel32 | |
893 | 80cabfad | bellard | /* allocate RAM */
|
894 | 82b36dc3 | aliguori | ram_addr = qemu_ram_alloc(0xa0000);
|
895 | 82b36dc3 | aliguori | cpu_register_physical_memory(0, 0xa0000, ram_addr); |
896 | 82b36dc3 | aliguori | |
897 | 82b36dc3 | aliguori | /* Allocate, even though we won't register, so we don't break the
|
898 | 82b36dc3 | aliguori | * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
|
899 | 82b36dc3 | aliguori | * and some bios areas, which will be registered later
|
900 | 82b36dc3 | aliguori | */
|
901 | 82b36dc3 | aliguori | ram_addr = qemu_ram_alloc(0x100000 - 0xa0000); |
902 | 82b36dc3 | aliguori | ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
|
903 | 82b36dc3 | aliguori | cpu_register_physical_memory(0x100000,
|
904 | 82b36dc3 | aliguori | below_4g_mem_size - 0x100000,
|
905 | 82b36dc3 | aliguori | ram_addr); |
906 | 00f82b8a | aurel32 | |
907 | 00f82b8a | aurel32 | /* above 4giga memory allocation */
|
908 | 00f82b8a | aurel32 | if (above_4g_mem_size > 0) { |
909 | 8a637d44 | Paul Brook | #if TARGET_PHYS_ADDR_BITS == 32 |
910 | 8a637d44 | Paul Brook | hw_error("To much RAM for 32-bit physical address");
|
911 | 8a637d44 | Paul Brook | #else
|
912 | 82b36dc3 | aliguori | ram_addr = qemu_ram_alloc(above_4g_mem_size); |
913 | 82b36dc3 | aliguori | cpu_register_physical_memory(0x100000000ULL,
|
914 | 526ccb7a | balrog | above_4g_mem_size, |
915 | 82b36dc3 | aliguori | ram_addr); |
916 | 8a637d44 | Paul Brook | #endif
|
917 | 00f82b8a | aurel32 | } |
918 | 80cabfad | bellard | |
919 | 82b36dc3 | aliguori | |
920 | 970ac5a3 | bellard | /* BIOS load */
|
921 | 1192dad8 | j_mayer | if (bios_name == NULL) |
922 | 1192dad8 | j_mayer | bios_name = BIOS_FILENAME; |
923 | 5cea8590 | Paul Brook | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
924 | 5cea8590 | Paul Brook | if (filename) {
|
925 | 5cea8590 | Paul Brook | bios_size = get_image_size(filename); |
926 | 5cea8590 | Paul Brook | } else {
|
927 | 5cea8590 | Paul Brook | bios_size = -1;
|
928 | 5cea8590 | Paul Brook | } |
929 | 5fafdf24 | ths | if (bios_size <= 0 || |
930 | 970ac5a3 | bellard | (bios_size % 65536) != 0) { |
931 | 7587cf44 | bellard | goto bios_error;
|
932 | 7587cf44 | bellard | } |
933 | 970ac5a3 | bellard | bios_offset = qemu_ram_alloc(bios_size); |
934 | 5cea8590 | Paul Brook | ret = load_image(filename, qemu_get_ram_ptr(bios_offset)); |
935 | 7587cf44 | bellard | if (ret != bios_size) {
|
936 | 7587cf44 | bellard | bios_error:
|
937 | 5cea8590 | Paul Brook | fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
|
938 | 80cabfad | bellard | exit(1);
|
939 | 80cabfad | bellard | } |
940 | 5cea8590 | Paul Brook | if (filename) {
|
941 | 5cea8590 | Paul Brook | qemu_free(filename); |
942 | 5cea8590 | Paul Brook | } |
943 | 7587cf44 | bellard | /* map the last 128KB of the BIOS in ISA space */
|
944 | 7587cf44 | bellard | isa_bios_size = bios_size; |
945 | 7587cf44 | bellard | if (isa_bios_size > (128 * 1024)) |
946 | 7587cf44 | bellard | isa_bios_size = 128 * 1024; |
947 | 5fafdf24 | ths | cpu_register_physical_memory(0x100000 - isa_bios_size,
|
948 | 5fafdf24 | ths | isa_bios_size, |
949 | 7587cf44 | bellard | (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
950 | 9ae02555 | ths | |
951 | 4fc9af53 | aliguori | |
952 | f753ff16 | pbrook | |
953 | f753ff16 | pbrook | option_rom_offset = qemu_ram_alloc(0x20000);
|
954 | f753ff16 | pbrook | oprom_area_size = 0;
|
955 | 49669fc5 | Glauber Costa | cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset); |
956 | f753ff16 | pbrook | |
957 | f753ff16 | pbrook | if (using_vga) {
|
958 | 5cea8590 | Paul Brook | const char *vgabios_filename; |
959 | f753ff16 | pbrook | /* VGA BIOS load */
|
960 | f753ff16 | pbrook | if (cirrus_vga_enabled) {
|
961 | 5cea8590 | Paul Brook | vgabios_filename = VGABIOS_CIRRUS_FILENAME; |
962 | f753ff16 | pbrook | } else {
|
963 | 5cea8590 | Paul Brook | vgabios_filename = VGABIOS_FILENAME; |
964 | 970ac5a3 | bellard | } |
965 | 5cea8590 | Paul Brook | oprom_area_size = load_option_rom(vgabios_filename, 0xc0000, 0xe0000); |
966 | f753ff16 | pbrook | } |
967 | f753ff16 | pbrook | /* Although video roms can grow larger than 0x8000, the area between
|
968 | f753ff16 | pbrook | * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
|
969 | f753ff16 | pbrook | * for any other kind of option rom inside this area */
|
970 | f753ff16 | pbrook | if (oprom_area_size < 0x8000) |
971 | f753ff16 | pbrook | oprom_area_size = 0x8000;
|
972 | f753ff16 | pbrook | |
973 | f753ff16 | pbrook | if (linux_boot) {
|
974 | 7ffa4767 | pbrook | load_linux(0xc0000 + oprom_area_size,
|
975 | e6ade764 | Glauber Costa | kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size); |
976 | f753ff16 | pbrook | oprom_area_size += 2048;
|
977 | f753ff16 | pbrook | } |
978 | f753ff16 | pbrook | |
979 | f753ff16 | pbrook | for (i = 0; i < nb_option_roms; i++) { |
980 | f753ff16 | pbrook | oprom_area_size += load_option_rom(option_rom[i], |
981 | f753ff16 | pbrook | 0xc0000 + oprom_area_size, 0xe0000); |
982 | 9ae02555 | ths | } |
983 | 9ae02555 | ths | |
984 | 7587cf44 | bellard | /* map all the bios at the top of memory */
|
985 | 5fafdf24 | ths | cpu_register_physical_memory((uint32_t)(-bios_size), |
986 | 7587cf44 | bellard | bios_size, bios_offset | IO_MEM_ROM); |
987 | 3b46e624 | ths | |
988 | 80cabfad | bellard | bochs_bios_init(); |
989 | 80cabfad | bellard | |
990 | a5b38b51 | aurel32 | cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1); |
991 | d537cf6c | pbrook | i8259 = i8259_init(cpu_irq[0]);
|
992 | d537cf6c | pbrook | ferr_irq = i8259[13];
|
993 | d537cf6c | pbrook | |
994 | 69b91039 | bellard | if (pci_enabled) {
|
995 | d537cf6c | pbrook | pci_bus = i440fx_init(&i440fx_state, i8259); |
996 | 8f1c91d8 | ths | piix3_devfn = piix3_init(pci_bus, -1);
|
997 | 46e50e9d | bellard | } else {
|
998 | 46e50e9d | bellard | pci_bus = NULL;
|
999 | 69b91039 | bellard | } |
1000 | 69b91039 | bellard | |
1001 | 80cabfad | bellard | /* init basic PC hardware */
|
1002 | b41a2cd1 | bellard | register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
1003 | 80cabfad | bellard | |
1004 | f929aad6 | bellard | register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
1005 | f929aad6 | bellard | |
1006 | 1f04275e | bellard | if (cirrus_vga_enabled) {
|
1007 | 1f04275e | bellard | if (pci_enabled) {
|
1008 | fbe1b595 | Paul Brook | pci_cirrus_vga_init(pci_bus); |
1009 | 1f04275e | bellard | } else {
|
1010 | fbe1b595 | Paul Brook | isa_cirrus_vga_init(); |
1011 | 1f04275e | bellard | } |
1012 | d34cab9f | ths | } else if (vmsvga_enabled) { |
1013 | d34cab9f | ths | if (pci_enabled)
|
1014 | fbe1b595 | Paul Brook | pci_vmsvga_init(pci_bus); |
1015 | d34cab9f | ths | else
|
1016 | d34cab9f | ths | fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
1017 | c2b3b41a | aliguori | } else if (std_vga_enabled) { |
1018 | 89b6b508 | bellard | if (pci_enabled) {
|
1019 | fbe1b595 | Paul Brook | pci_vga_init(pci_bus, 0, 0); |
1020 | 89b6b508 | bellard | } else {
|
1021 | fbe1b595 | Paul Brook | isa_vga_init(); |
1022 | 89b6b508 | bellard | } |
1023 | 1f04275e | bellard | } |
1024 | 80cabfad | bellard | |
1025 | 42fc73a1 | aurel32 | rtc_state = rtc_init(0x70, i8259[8], 2000); |
1026 | 80cabfad | bellard | |
1027 | 3b4366de | blueswir1 | qemu_register_boot_set(pc_boot_set, rtc_state); |
1028 | 3b4366de | blueswir1 | |
1029 | e1a23744 | bellard | register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
1030 | e1a23744 | bellard | register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
1031 | e1a23744 | bellard | |
1032 | d592d303 | bellard | if (pci_enabled) {
|
1033 | d592d303 | bellard | ioapic = ioapic_init(); |
1034 | d592d303 | bellard | } |
1035 | d537cf6c | pbrook | pit = pit_init(0x40, i8259[0]); |
1036 | fd06c375 | bellard | pcspk_init(pit); |
1037 | 16b29ae1 | aliguori | if (!no_hpet) {
|
1038 | 16b29ae1 | aliguori | hpet_init(i8259); |
1039 | 16b29ae1 | aliguori | } |
1040 | d592d303 | bellard | if (pci_enabled) {
|
1041 | d592d303 | bellard | pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); |
1042 | d592d303 | bellard | } |
1043 | b41a2cd1 | bellard | |
1044 | 8d11df9e | bellard | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
1045 | 8d11df9e | bellard | if (serial_hds[i]) {
|
1046 | b6cd0ea1 | aurel32 | serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
|
1047 | b6cd0ea1 | aurel32 | serial_hds[i]); |
1048 | 8d11df9e | bellard | } |
1049 | 8d11df9e | bellard | } |
1050 | b41a2cd1 | bellard | |
1051 | 6508fe59 | bellard | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
1052 | 6508fe59 | bellard | if (parallel_hds[i]) {
|
1053 | d537cf6c | pbrook | parallel_init(parallel_io[i], i8259[parallel_irq[i]], |
1054 | d537cf6c | pbrook | parallel_hds[i]); |
1055 | 6508fe59 | bellard | } |
1056 | 6508fe59 | bellard | } |
1057 | 6508fe59 | bellard | |
1058 | 9dd986cc | Richard W.M. Jones | watchdog_pc_init(pci_bus); |
1059 | 9dd986cc | Richard W.M. Jones | |
1060 | a41b2ff2 | pbrook | for(i = 0; i < nb_nics; i++) { |
1061 | cb457d76 | aliguori | NICInfo *nd = &nd_table[i]; |
1062 | cb457d76 | aliguori | |
1063 | cb457d76 | aliguori | if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0)) |
1064 | d537cf6c | pbrook | pc_init_ne2k_isa(nd, i8259); |
1065 | cb457d76 | aliguori | else
|
1066 | cb457d76 | aliguori | pci_nic_init(pci_bus, nd, -1, "ne2k_pci"); |
1067 | a41b2ff2 | pbrook | } |
1068 | b41a2cd1 | bellard | |
1069 | 5e3cb534 | aliguori | qemu_system_hot_add_init(); |
1070 | 5e3cb534 | aliguori | |
1071 | e4bcb14c | ths | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
|
1072 | e4bcb14c | ths | fprintf(stderr, "qemu: too many IDE bus\n");
|
1073 | e4bcb14c | ths | exit(1);
|
1074 | e4bcb14c | ths | } |
1075 | e4bcb14c | ths | |
1076 | e4bcb14c | ths | for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { |
1077 | e4bcb14c | ths | index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); |
1078 | e4bcb14c | ths | if (index != -1) |
1079 | e4bcb14c | ths | hd[i] = drives_table[index].bdrv; |
1080 | e4bcb14c | ths | else
|
1081 | e4bcb14c | ths | hd[i] = NULL;
|
1082 | e4bcb14c | ths | } |
1083 | e4bcb14c | ths | |
1084 | a41b2ff2 | pbrook | if (pci_enabled) {
|
1085 | e4bcb14c | ths | pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
|
1086 | a41b2ff2 | pbrook | } else {
|
1087 | e4bcb14c | ths | for(i = 0; i < MAX_IDE_BUS; i++) { |
1088 | d537cf6c | pbrook | isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]], |
1089 | e4bcb14c | ths | hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
|
1090 | 69b91039 | bellard | } |
1091 | b41a2cd1 | bellard | } |
1092 | 69b91039 | bellard | |
1093 | d537cf6c | pbrook | i8042_init(i8259[1], i8259[12], 0x60); |
1094 | 7c29d0c0 | bellard | DMA_init(0);
|
1095 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
1096 | d537cf6c | pbrook | audio_init(pci_enabled ? pci_bus : NULL, i8259);
|
1097 | fb065187 | bellard | #endif
|
1098 | 80cabfad | bellard | |
1099 | e4bcb14c | ths | for(i = 0; i < MAX_FD; i++) { |
1100 | e4bcb14c | ths | index = drive_get_index(IF_FLOPPY, 0, i);
|
1101 | e4bcb14c | ths | if (index != -1) |
1102 | e4bcb14c | ths | fd[i] = drives_table[index].bdrv; |
1103 | e4bcb14c | ths | else
|
1104 | e4bcb14c | ths | fd[i] = NULL;
|
1105 | e4bcb14c | ths | } |
1106 | e4bcb14c | ths | floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd); |
1107 | b41a2cd1 | bellard | |
1108 | 00f82b8a | aurel32 | cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd); |
1109 | 69b91039 | bellard | |
1110 | bb36d470 | bellard | if (pci_enabled && usb_enabled) {
|
1111 | afcc3cdf | ths | usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
|
1112 | bb36d470 | bellard | } |
1113 | bb36d470 | bellard | |
1114 | 6515b203 | bellard | if (pci_enabled && acpi_enabled) {
|
1115 | 3fffc223 | ths | uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
1116 | 0ff596d0 | pbrook | i2c_bus *smbus; |
1117 | 0ff596d0 | pbrook | |
1118 | 0ff596d0 | pbrook | /* TODO: Populate SPD eeprom data. */
|
1119 | cf7a2fe2 | aurel32 | smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]); |
1120 | 3fffc223 | ths | for (i = 0; i < 8; i++) { |
1121 | 1ea96673 | Paul Brook | DeviceState *eeprom; |
1122 | 02e2da45 | Paul Brook | eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
|
1123 | 1ea96673 | Paul Brook | qdev_set_prop_int(eeprom, "address", 0x50 + i); |
1124 | 1ea96673 | Paul Brook | qdev_set_prop_ptr(eeprom, "data", eeprom_buf + (i * 256)); |
1125 | 1ea96673 | Paul Brook | qdev_init(eeprom); |
1126 | 3fffc223 | ths | } |
1127 | 6515b203 | bellard | } |
1128 | 3b46e624 | ths | |
1129 | a5954d5c | bellard | if (i440fx_state) {
|
1130 | a5954d5c | bellard | i440fx_init_memory_mappings(i440fx_state); |
1131 | a5954d5c | bellard | } |
1132 | e4bcb14c | ths | |
1133 | 7d8406be | pbrook | if (pci_enabled) {
|
1134 | e4bcb14c | ths | int max_bus;
|
1135 | 9be5dafe | Paul Brook | int bus;
|
1136 | 96d30e48 | ths | |
1137 | e4bcb14c | ths | max_bus = drive_get_max_bus(IF_SCSI); |
1138 | e4bcb14c | ths | for (bus = 0; bus <= max_bus; bus++) { |
1139 | 9be5dafe | Paul Brook | pci_create_simple(pci_bus, -1, "lsi53c895a"); |
1140 | e4bcb14c | ths | } |
1141 | 7d8406be | pbrook | } |
1142 | 6e02c38d | aliguori | |
1143 | 6e02c38d | aliguori | /* Add virtio block devices */
|
1144 | 6e02c38d | aliguori | if (pci_enabled) {
|
1145 | 6e02c38d | aliguori | int index;
|
1146 | 6e02c38d | aliguori | int unit_id = 0; |
1147 | 6e02c38d | aliguori | |
1148 | 6e02c38d | aliguori | while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) { |
1149 | 53c25cea | Paul Brook | pci_create_simple(pci_bus, -1, "virtio-blk-pci"); |
1150 | 6e02c38d | aliguori | unit_id++; |
1151 | 6e02c38d | aliguori | } |
1152 | 6e02c38d | aliguori | } |
1153 | bd322087 | aliguori | |
1154 | bd322087 | aliguori | /* Add virtio balloon device */
|
1155 | df97b920 | Eduardo Habkost | if (pci_enabled && !no_virtio_balloon) {
|
1156 | 53c25cea | Paul Brook | pci_create_simple(pci_bus, -1, "virtio-balloon-pci"); |
1157 | 2d72c572 | Paul Brook | } |
1158 | a2fa19f9 | aliguori | |
1159 | a2fa19f9 | aliguori | /* Add virtio console devices */
|
1160 | a2fa19f9 | aliguori | if (pci_enabled) {
|
1161 | a2fa19f9 | aliguori | for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) { |
1162 | 0e058a8a | Paul Brook | if (virtcon_hds[i]) {
|
1163 | 53c25cea | Paul Brook | pci_create_simple(pci_bus, -1, "virtio-console-pci"); |
1164 | 0e058a8a | Paul Brook | } |
1165 | a2fa19f9 | aliguori | } |
1166 | a2fa19f9 | aliguori | } |
1167 | 80cabfad | bellard | } |
1168 | b5ff2d6e | bellard | |
1169 | fbe1b595 | Paul Brook | static void pc_init_pci(ram_addr_t ram_size, |
1170 | 3023f332 | aliguori | const char *boot_device, |
1171 | 5fafdf24 | ths | const char *kernel_filename, |
1172 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
1173 | 94fc95cd | j_mayer | const char *initrd_filename, |
1174 | 94fc95cd | j_mayer | const char *cpu_model) |
1175 | 3dbbdc25 | bellard | { |
1176 | fbe1b595 | Paul Brook | pc_init1(ram_size, boot_device, |
1177 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
1178 | a049de61 | bellard | initrd_filename, 1, cpu_model);
|
1179 | 3dbbdc25 | bellard | } |
1180 | 3dbbdc25 | bellard | |
1181 | fbe1b595 | Paul Brook | static void pc_init_isa(ram_addr_t ram_size, |
1182 | 3023f332 | aliguori | const char *boot_device, |
1183 | 5fafdf24 | ths | const char *kernel_filename, |
1184 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
1185 | 94fc95cd | j_mayer | const char *initrd_filename, |
1186 | 94fc95cd | j_mayer | const char *cpu_model) |
1187 | 3dbbdc25 | bellard | { |
1188 | fbe1b595 | Paul Brook | pc_init1(ram_size, boot_device, |
1189 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
1190 | a049de61 | bellard | initrd_filename, 0, cpu_model);
|
1191 | 3dbbdc25 | bellard | } |
1192 | 3dbbdc25 | bellard | |
1193 | 0bacd130 | aliguori | /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
|
1194 | 0bacd130 | aliguori | BIOS will read it and start S3 resume at POST Entry */
|
1195 | 0bacd130 | aliguori | void cmos_set_s3_resume(void) |
1196 | 0bacd130 | aliguori | { |
1197 | 0bacd130 | aliguori | if (rtc_state)
|
1198 | 0bacd130 | aliguori | rtc_set_memory(rtc_state, 0xF, 0xFE); |
1199 | 0bacd130 | aliguori | } |
1200 | 0bacd130 | aliguori | |
1201 | f80f9ec9 | Anthony Liguori | static QEMUMachine pc_machine = {
|
1202 | a245f2e7 | aurel32 | .name = "pc",
|
1203 | a245f2e7 | aurel32 | .desc = "Standard PC",
|
1204 | a245f2e7 | aurel32 | .init = pc_init_pci, |
1205 | b2097003 | aliguori | .max_cpus = 255,
|
1206 | 0c257437 | Anthony Liguori | .is_default = 1,
|
1207 | 3dbbdc25 | bellard | }; |
1208 | 3dbbdc25 | bellard | |
1209 | f80f9ec9 | Anthony Liguori | static QEMUMachine isapc_machine = {
|
1210 | a245f2e7 | aurel32 | .name = "isapc",
|
1211 | a245f2e7 | aurel32 | .desc = "ISA-only PC",
|
1212 | a245f2e7 | aurel32 | .init = pc_init_isa, |
1213 | b2097003 | aliguori | .max_cpus = 1,
|
1214 | b5ff2d6e | bellard | }; |
1215 | f80f9ec9 | Anthony Liguori | |
1216 | f80f9ec9 | Anthony Liguori | static void pc_machine_init(void) |
1217 | f80f9ec9 | Anthony Liguori | { |
1218 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&pc_machine); |
1219 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&isapc_machine); |
1220 | f80f9ec9 | Anthony Liguori | } |
1221 | f80f9ec9 | Anthony Liguori | |
1222 | f80f9ec9 | Anthony Liguori | machine_init(pc_machine_init); |