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root / include / hw @ e00387d5

Name Size
  acpi
  arm
  audio
  block
  char
  cpu
  cris
  i2c
  i386
  input
  isa
  kvm
  lm32
  m68k
  mips
  misc
  nvram
  pci
  pci-host
  ppc
  s390x
  scsi
  sh4
  sparc
  timer
  unicore32
  virtio
  xen
boards.h 1.3 kB
bt.h 56.4 kB
devices.h 2.1 kB
elf_ops.h 9.4 kB
empty_slot.h 133 Bytes
hw.h 2.5 kB
ide.h 1 kB
irq.h 1.6 kB
loader.h 2 kB
pcmcia.h 1.9 kB
ptimer.h 1.3 kB
qdev-core.h 9.6 kB
qdev-dma.h 352 Bytes
qdev-properties.h 9.8 kB
qdev.h 116 Bytes
sd.h 2.9 kB
ssi.h 3.2 kB
stream.h 2 kB
sysbus.h 2.8 kB
usb.h 18.4 kB
xilinx.h 3 kB

Latest revisions

# Date Author Comment
2b7dc949 06/20/2013 05:32 pm Paolo Bonzini

spapr: convert TCE API to use an opaque type

The TCE table is currently returned as a DMAContext, and non-type-safe
APIs are called later passing back the DMAContext. Since we want to move
away from DMAContext, use an opaque type instead, and add an accessor...
a84bb436 06/20/2013 05:32 pm Paolo Bonzini

spapr: use memory core for iommu support

Now we can stop using a "translating" DMAContext, but we do not yet modify
the sPAPRTCETable users to get an AddressSpace; they keep using the table
via a DMAContext.

Acked-by: David Gibson <>...
e00387d5 06/20/2013 05:32 pm Avi Kivity

pci: use memory core for iommu support

Use the new iommu support in the memory core for iommu support. The only
user, spapr, is also converted, but it still provides a DMAContext
interface until the non-PCI bits switch to AddressSpace.

Reviewed-by: Michael S. Tsirkin <>...
083b79c9 06/19/2013 10:10 pm Markus Armbruster

vl: Rename *boot_devices to *boot_order, for consistency

Signed-off-by: Markus Armbruster <>
Reviewed-by: Anthony Liguori <>
Message-id:
Signed-off-by: Anthony Liguori <>
f3c507ad 06/17/2013 06:47 pm Keith Busch

NVMe: Initial commit for new storage interface

Initial commit for emulated Non-Volatile-Memory Express (NVMe) pci
storage device.

NVMe is an open, industry driven storage specification defining
an optimized register and command set designed to deliver the full...
371a775d 06/15/2013 01:53 pm Blue Swirl

Merge branch 'realize-isa.v2' of git://github.com/afaerber/qemu-cpu

  • 'realize-isa.v2' of git://github.com/afaerber/qemu-cpu:
    qdev: Drop FROM_QBUS() macro
    isa: QOM'ify ISADevice
    isa: QOM'ify ISABus
    i8259: Convert PICCommonState to use QOM realizefn...
ebc85e3f 06/14/2013 04:58 pm Markus Armbruster

smbios: Clean up smbios_add_field() parameters

Having size precede the associated pointer is odd. Swap them, and fix
up the types.

Signed-off-by: Markus Armbruster <>
Reviewed-by: Laszlo "ever the optimist" Ersek <>
Message-id: ...
301255e6 06/14/2013 03:51 pm Anthony Liguori

Merge remote-tracking branch 'mjt/trivial-patches-next' into staging

  1. By Michael Tokarev (4) and others
  2. Via Michael Tokarev
    • mjt/trivial-patches-next: (26 commits)
      piix: fix some printf errors when debug is enabled
      cputlb: fix debug logs
      create qemu_openpty_raw() helper function and move it to a separate file...
8e8638fa 06/11/2013 10:45 pm Peter Crosthwaite

char/serial: Use generic Fifo8

Use the generic Fifo8 helper provided by QEMU, rather than re-implement
privately.

Signed-off-by: Peter Crosthwaite <>
Signed-off-by: Michael Tokarev <>
6b11322e 06/11/2013 12:33 am Eduardo Habkost

target-i386: Set level=4 on Conroe/Penryn/Nehalem

The CPUID level value on Conroe, Penryn, and Nehalem are too low. This
causes at least one known problem: the -smp "threads" option doesn't
work as expect if level is < 4, because thread count information is...

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