Revision e034e2c3 target-mips/op.c

b/target-mips/op.c
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    /* 1k pages not implemented */
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    val = T0 & ((TARGET_PAGE_MASK << 1) | 0xFF);
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#ifdef TARGET_MIPS64
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    val = T0 & 0xC00000FFFFFFFFFFULL;
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    val &= env->SEGMask;
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#endif
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    old = env->CP0_EntryHi;
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    env->CP0_EntryHi = val;
......
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#ifdef TARGET_MIPS64
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void op_mtc0_xcontext (void)
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{
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    env->CP0_XContext = (env->CP0_XContext & 0x1ffffffffULL) | (T0 & ~0x1ffffffffULL);
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    target_ulong mask = (1ULL << (env->SEGBITS - 7)) - 1;
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    env->CP0_XContext = (env->CP0_XContext & mask) | (T0 & ~mask);
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    RETURN();
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}
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