Revision e034e2c3 target-mips/translate_init.c
b/target-mips/translate_init.c | ||
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71 | 71 |
int32_t CCRes; |
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int32_t Status_rw_bitmask; |
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int32_t CP1_fcr0; |
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int32_t SEGBITS; |
|
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}; |
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|
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/*****************************************************************************/ |
... | ... | |
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.SYNCI_Step = 32, |
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.CCRes = 2, |
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.Status_rw_bitmask = 0x3278FF17, |
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.SEGBITS = 32, |
|
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}, |
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{ |
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.name = "4KEcR1", |
... | ... | |
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.SYNCI_Step = 32, |
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.CCRes = 2, |
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.Status_rw_bitmask = 0x3278FF17, |
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.SEGBITS = 32, |
|
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}, |
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{ |
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.name = "4KEc", |
... | ... | |
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.SYNCI_Step = 32, |
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.CCRes = 2, |
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.Status_rw_bitmask = 0x3278FF17, |
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.SEGBITS = 32, |
|
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}, |
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{ |
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.name = "24Kc", |
... | ... | |
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.SYNCI_Step = 32, |
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.CCRes = 2, |
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.Status_rw_bitmask = 0x3278FF17, |
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.SEGBITS = 32, |
|
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}, |
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{ |
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.name = "24Kf", |
... | ... | |
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.Status_rw_bitmask = 0x3678FF17, |
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.CP1_fcr0 = (1 << FCR0_F64) | (1 << FCR0_L) | (1 << FCR0_W) | |
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(1 << FCR0_D) | (1 << FCR0_S) | (0x93 << FCR0_PRID), |
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.SEGBITS = 32, |
|
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}, |
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#ifdef TARGET_MIPS64 |
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{ |
... | ... | |
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.Status_rw_bitmask = 0x3678FFFF, |
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/* The R4000 has a full 64bit FPU doesn't use the fcr0 bits. */ |
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.CP1_fcr0 = (0x5 << FCR0_PRID) | (0x0 << FCR0_REV), |
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.SEGBITS = 40, |
|
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}, |
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{ |
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.name = "5Kc", |
... | ... | |
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.SYNCI_Step = 32, |
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.CCRes = 2, |
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.Status_rw_bitmask = 0x32F8FFFF, |
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.SEGBITS = 42, |
|
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}, |
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{ |
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.name = "5Kf", |
... | ... | |
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/* The 5Kf has F64 / L / W but doesn't use the fcr0 bits. */ |
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.CP1_fcr0 = (1 << FCR0_D) | (1 << FCR0_S) | |
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(0x81 << FCR0_PRID) | (0x0 << FCR0_REV), |
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.SEGBITS = 42, |
|
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}, |
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{ |
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.name = "20Kc", |
... | ... | |
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.CP1_fcr0 = (1 << FCR0_3D) | (1 << FCR0_PS) | |
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(1 << FCR0_D) | (1 << FCR0_S) | |
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(0x82 << FCR0_PRID) | (0x0 << FCR0_REV), |
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.SEGBITS = 40, |
|
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}, |
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#endif |
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}; |
... | ... | |
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env->CCRes = def->CCRes; |
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env->Status_rw_bitmask = def->Status_rw_bitmask; |
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env->fcr0 = def->CP1_fcr0; |
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#ifdef TARGET_MIPS64 |
|
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env->SEGBITS = def->SEGBITS; |
|
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env->SEGMask = (3ULL << 62) | ((1ULL << def->SEGBITS) - 1); |
|
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#endif |
|
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#ifdef CONFIG_USER_ONLY |
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if (env->CP0_Config1 & (1 << CP0C1_FP)) |
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env->hflags |= MIPS_HFLAG_FPU; |
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