Statistics
| Branch: | Revision:

root / target-ppc @ e06fcd75

Name Size
STATUS 10.6 kB
cpu.h 58 kB
exec.h 2 kB
helper.c 95.3 kB
helper.h 7.1 kB
helper_regs.h 3.4 kB
machine.c 418 Bytes
mfrom_table.c 3.3 kB
mfrom_table_gen.c 652 Bytes
op_helper.c 82.7 kB
translate.c 288.6 kB
translate_init.c 406.7 kB

Latest revisions

# Date Author Comment
e06fcd75 12/12/2008 12:42 am aurel32

target-ppc: rework exception code

... also remove two warnings.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5989 c046a42c-6fe2-441c-8c8c-71466251a162

2a3ec4b5 12/12/2008 12:42 am aurel32

target-ppc: remove dead code

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5988 c046a42c-6fe2-441c-8c8c-71466251a162

4c2ab988 12/10/2008 05:02 pm aurel32

target-ppc: enable SPE and Altivec in user mode

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5965 c046a42c-6fe2-441c-8c8c-71466251a162

fe463b7d 12/10/2008 05:02 pm aurel32

target-ppc: initialize MSR appropriately in user-mode

Mask the initial MSR with the mask from the PowerPC CPU definition.

Noticed by Nathan Froyd.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5964 c046a42c-6fe2-441c-8c8c-71466251a162

db9a16a7 12/08/2008 08:11 pm aurel32

target-ppc: kill a warning

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5952 c046a42c-6fe2-441c-8c8c-71466251a162

0e69805a 12/08/2008 08:11 pm aurel32

target-ppc: cleanup op_helper.c after TCG conversion

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5951 c046a42c-6fe2-441c-8c8c-71466251a162

b4cec7b4 12/08/2008 08:11 pm aurel32

target-ppc: enable access type in MMU

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5950 c046a42c-6fe2-441c-8c8c-71466251a162

76db3ba4 12/08/2008 08:11 pm aurel32

target-ppc: memory load/store rework

Rework the memory load/store:
- Unify load/store functions for 32-bit and 64-bit CPU
- Don't swap values twice for bit-reverse load/store functions
in little endian mode.
- On a 64-bit CPU in 32-bit mode, do the address truncation for...

0c34a5d7 12/08/2008 01:00 am aurel32

target-ppc: kill a few warnings

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5941 c046a42c-6fe2-441c-8c8c-71466251a162

e8fc4fa7 12/07/2008 06:23 pm aurel32

target-ppc: disable single stepping

... which left was enabled by mistake.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5918 c046a42c-6fe2-441c-8c8c-71466251a162

View revisions

Also available in: Atom