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Revision e0bcb9ca

IDe0bcb9ca36e4f3081c7e6841283646985ed9676b

Added by Aurelien Jarno over 12 years ago

sh7750: handle MMUCR TI bit

When the MMUCR TI bit is set, all the UTLB and ITLB entries should be
flushed.

Signed-off-by: Aurelien Jarno <>

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