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Revision e1d177b9

IDe1d177b922f52569e900e96d611caa09655bdec9

Added by Peter Maydell almost 10 years ago

target-arm: Set Q bit for overflow in SMUAD and SMLAD

SMUAD and SMLAD are supposed to set the Q bit if the addition of
the two 16x16 multiply products and optional accumulator overflows
considered as a signed value. However we were only doing this check
for the addition of the accumulator, not when adding the products,
with the effect that we were mishandling the edge case where
both inputs are 0x80008000.

Signed-off-by: Peter Maydell <>
Signed-off-by: Aurelien Jarno <>

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