target-arm: Set Q bit for overflow in SMUAD and SMLAD
SMUAD and SMLAD are supposed to set the Q bit if the addition ofthe two 16x16 multiply products and optional accumulator overflowsconsidered as a signed value. However we were only doing this checkfor the addition of the accumulator, not when adding the products,...
target-arm: Fix GE bits for v6media signed modulo arithmetic
Fix the signed modulo arithmetic helpers for the v6mediainstructions (SADD8, SSUB8, SADD16, SSUB16, SASX, SSAX) to setthe GE bits correctly (based on the result of the add or subtractbefore it is truncated to 16 bits, not after)....
target-arm: Fix UNDEF cases in Thumb load/store
Decode of Thumb load/store was merging together the cases of 'bit 11==0'(reg+reg LSL imm) and 'bit 11==1' (reg+imm). This happens to work forvalid instruction patterns but meant that we would not UNDEF for the...
linux-user: Fix unlock_user() call in return from poll()
Correct the broken attempt to calculate the third argumentto unlock_user() in the code path which unlocked the pollfdarray on return from poll() and ppoll() emulation. (Thisonly caused a problem if unlock_user() wasn't a no-op, eg...
vmmouse: Fix initialization
Latest refactorings left vmmouse nonfunctional behind. Fix it by addingthe required device initialization.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
vmmouse: Register vmstate via qdev
vmmouse: Fix typo preventing x86-64 build
fix applesmc REV key
Fix applesmc REV key string literal hex encoding.
Signed-off-by: René Rebe <rene@exactcode.de>Acked-by: Alexander Graf <agraf@suse.de>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
enable kvm for ppc(32) on ppc64
ppc64 is backward compatible, likewise.
target-ppc: add support for 6 SPE instructions
Add support for 6 SPE instructions: evmra, evmwsmi{a{a}}, evmwumi{a{a}}
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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