Revision e1ef36c4 target-sparc/op_helper.c
| b/target-sparc/op_helper.c | ||
|---|---|---|
| 3396 | 3396 |
{
|
| 3397 | 3397 |
unsigned int i; |
| 3398 | 3398 |
target_ulong val = 0; |
| 3399 |
CPU_DoubleU u; |
|
| 3399 | 3400 |
|
| 3400 | 3401 |
helper_check_align(addr, 3); |
| 3401 | 3402 |
addr = asi_address_mask(env, asi, addr); |
| ... | ... | |
| 3440 | 3441 |
switch(size) {
|
| 3441 | 3442 |
default: |
| 3442 | 3443 |
case 4: |
| 3443 |
val = *((uint32_t *)&env->fpr[rd]);
|
|
| 3444 |
helper_st_asi(addr, *(uint32_t *)&env->fpr[rd], asi, size);
|
|
| 3444 | 3445 |
break; |
| 3445 | 3446 |
case 8: |
| 3446 |
val = *((int64_t *)&DT0); |
|
| 3447 |
u.l.upper = *(uint32_t *)&env->fpr[rd++]; |
|
| 3448 |
u.l.lower = *(uint32_t *)&env->fpr[rd++]; |
|
| 3449 |
helper_st_asi(addr, u.ll, asi, size); |
|
| 3447 | 3450 |
break; |
| 3448 | 3451 |
case 16: |
| 3449 |
// XXX |
|
| 3452 |
u.l.upper = *(uint32_t *)&env->fpr[rd++]; |
|
| 3453 |
u.l.lower = *(uint32_t *)&env->fpr[rd++]; |
|
| 3454 |
helper_st_asi(addr, u.ll, asi, 8); |
|
| 3455 |
u.l.upper = *(uint32_t *)&env->fpr[rd++]; |
|
| 3456 |
u.l.lower = *(uint32_t *)&env->fpr[rd++]; |
|
| 3457 |
helper_st_asi(addr + 8, u.ll, asi, 8); |
|
| 3450 | 3458 |
break; |
| 3451 | 3459 |
} |
| 3452 |
helper_st_asi(addr, val, asi, size); |
|
| 3453 | 3460 |
} |
| 3454 | 3461 |
|
| 3455 | 3462 |
target_ulong helper_cas_asi(target_ulong addr, target_ulong val1, |
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