Revision e23a1b33

b/hw/apb_pci.c
236 236

  
237 237
    /* Ultrasparc PBM main bus */
238 238
    dev = qdev_create(NULL, "pbm");
239
    qdev_init(dev);
239
    qdev_init_nofail(dev);
240 240
    s = sysbus_from_qdev(dev);
241 241
    /* apb_config */
242 242
    sysbus_mmio_map(s, 0, special_base + 0x2000ULL);
b/hw/arm_sysctl.c
212 212

  
213 213
    dev = qdev_create(NULL, "realview_sysctl");
214 214
    qdev_prop_set_uint32(dev, "sys_id", sys_id);
215
    qdev_init(dev);
215
    qdev_init_nofail(dev);
216 216
    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
217 217
}
218 218

  
b/hw/armv7m.c
141 141

  
142 142
    dev = qdev_create(NULL, "ARM,bitband-memory");
143 143
    qdev_prop_set_uint32(dev, "base", 0x20000000);
144
    qdev_init(dev);
144
    qdev_init_nofail(dev);
145 145
    sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x22000000);
146 146

  
147 147
    dev = qdev_create(NULL, "ARM,bitband-memory");
148 148
    qdev_prop_set_uint32(dev, "base", 0x40000000);
149
    qdev_init(dev);
149
    qdev_init_nofail(dev);
150 150
    sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x42000000);
151 151
}
152 152

  
......
202 202

  
203 203
    nvic = qdev_create(NULL, "armv7m_nvic");
204 204
    env->v7m.nvic = nvic;
205
    qdev_init(nvic);
205
    qdev_init_nofail(nvic);
206 206
    cpu_pic = arm_pic_init_cpu(env);
207 207
    sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
208 208
    for (i = 0; i < 64; i++) {
b/hw/axis_dev88.c
300 300
    dev = qdev_create(NULL, "etraxfs,pic");
301 301
    /* FIXME: Is there a proper way to signal vectors to the CPU core?  */
302 302
    qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
303
    qdev_init(dev);
303
    qdev_init_nofail(dev);
304 304
    s = sysbus_from_qdev(dev);
305 305
    sysbus_mmio_map(s, 0, 0x3001c000);
306 306
    sysbus_connect_irq(s, 0, cpu_irq[0]);
b/hw/escc.c
741 741
    qdev_prop_set_chr(dev, "chrA", chrA);
742 742
    qdev_prop_set_uint32(dev, "chnBtype", ser);
743 743
    qdev_prop_set_uint32(dev, "chnAtype", ser);
744
    qdev_init(dev);
744
    qdev_init_nofail(dev);
745 745
    s = sysbus_from_qdev(dev);
746 746
    sysbus_connect_irq(s, 0, irqB);
747 747
    sysbus_connect_irq(s, 1, irqA);
......
904 904
    qdev_prop_set_chr(dev, "chrA", NULL);
905 905
    qdev_prop_set_uint32(dev, "chnBtype", mouse);
906 906
    qdev_prop_set_uint32(dev, "chnAtype", kbd);
907
    qdev_init(dev);
907
    qdev_init_nofail(dev);
908 908
    s = sysbus_from_qdev(dev);
909 909
    sysbus_connect_irq(s, 0, irq);
910 910
    sysbus_connect_irq(s, 1, irq);
b/hw/esp.c
647 647
    esp->dma_memory_write = dma_memory_write;
648 648
    esp->dma_opaque = dma_opaque;
649 649
    esp->it_shift = it_shift;
650
    qdev_init(dev);
650
    qdev_init_nofail(dev);
651 651
    s = sysbus_from_qdev(dev);
652 652
    sysbus_connect_irq(s, 0, irq);
653 653
    sysbus_mmio_map(s, 0, espaddr);
b/hw/etraxfs.c
92 92
    dev = qdev_create(NULL, "etraxfs,pic");
93 93
    /* FIXME: Is there a proper way to signal vectors to the CPU core?  */
94 94
    qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
95
    qdev_init(dev);
95
    qdev_init_nofail(dev);
96 96
    s = sysbus_from_qdev(dev);
97 97
    sysbus_mmio_map(s, 0, 0x3001c000);
98 98
    sysbus_connect_irq(s, 0, cpu_irq[0]);
b/hw/fdc.c
1866 1866
    fdctrl->dma_chann = dma_chann; /* FIXME */
1867 1867
    qdev_prop_set_drive(dev, "driveA", fds[0]);
1868 1868
    qdev_prop_set_drive(dev, "driveB", fds[1]);
1869
    if (qdev_init(dev) != 0)
1870
        return NULL;
1869
    qdev_init_nofail(dev);
1871 1870
    sysbus_connect_irq(&sys->busdev, 0, irq);
1872 1871
    sysbus_mmio_map(&sys->busdev, 0, mmio_base);
1873 1872

  
......
1883 1882

  
1884 1883
    dev = qdev_create(NULL, "SUNW,fdtwo");
1885 1884
    qdev_prop_set_drive(dev, "drive", fds[0]);
1886
    if (qdev_init(dev) != 0)
1887
        return NULL;
1885
    qdev_init_nofail(dev);
1888 1886
    sys = DO_UPCAST(fdctrl_sysbus_t, busdev.qdev, dev);
1889 1887
    fdctrl = &sys->state;
1890 1888
    sysbus_connect_irq(&sys->busdev, 0, irq);
b/hw/grackle_pci.c
138 138
    GrackleState *d;
139 139

  
140 140
    dev = qdev_create(NULL, "grackle");
141
    qdev_init(dev);
141
    qdev_init_nofail(dev);
142 142
    s = sysbus_from_qdev(dev);
143 143
    d = FROM_SYSBUS(GrackleState, s);
144 144
    d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
b/hw/i2c.c
189 189

  
190 190
    dev = qdev_create(&bus->qbus, name);
191 191
    qdev_prop_set_uint8(dev, "address", addr);
192
    qdev_init(dev);
192
    qdev_init_nofail(dev);
193 193
    return dev;
194 194
}
b/hw/ide/pci.c
445 445

  
446 446
    dev = pci_create(bus, -1, "CMD646 IDE");
447 447
    qdev_prop_set_uint32(&dev->qdev, "secondary", secondary_ide_enabled);
448
    qdev_init(&dev->qdev);
448
    qdev_init_nofail(&dev->qdev);
449 449

  
450 450
    pci_ide_create_devs(dev, hd_table);
451 451
}
b/hw/integratorcp.c
477 477

  
478 478
    dev = qdev_create(NULL, "integrator_core");
479 479
    qdev_prop_set_uint32(dev, "memsz", ram_size >> 20);
480
    qdev_init(dev);
480
    qdev_init_nofail(dev);
481 481
    sysbus_mmio_map((SysBusDevice *)dev, 0, 0x10000000);
482 482

  
483 483
    cpu_pic = arm_pic_init_cpu(env);
b/hw/isa-bus.c
45 45
    }
46 46
    if (NULL == dev) {
47 47
        dev = qdev_create(NULL, "isabus-bridge");
48
        qdev_init(dev);
48
        qdev_init_nofail(dev);
49 49
    }
50 50

  
51 51
    isabus = FROM_QBUS(ISABus, qbus_create(&isa_bus_info, dev, NULL));
b/hw/m48t59.c
636 636
    qdev_prop_set_uint32(dev, "type", type);
637 637
    qdev_prop_set_uint32(dev, "size", size);
638 638
    qdev_prop_set_uint32(dev, "io_base", io_base);
639
    qdev_init(dev);
639
    qdev_init_nofail(dev);
640 640
    s = sysbus_from_qdev(dev);
641 641
    sysbus_connect_irq(s, 0, IRQ);
642 642
    if (io_base != 0) {
......
662 662
    qdev_prop_set_uint32(&dev->qdev, "type", type);
663 663
    qdev_prop_set_uint32(&dev->qdev, "size", size);
664 664
    qdev_prop_set_uint32(&dev->qdev, "io_base", io_base);
665
    qdev_init(&dev->qdev);
665
    qdev_init_nofail(&dev->qdev);
666 666
    d = DO_UPCAST(M48t59ISAState, busdev, dev);
667 667
    s = &d->state;
668 668

  
b/hw/mc146818rtc.c
637 637

  
638 638
    dev = isa_create("mc146818rtc");
639 639
    qdev_prop_set_int32(&dev->qdev, "base_year", base_year);
640
    qdev_init(&dev->qdev);
640
    qdev_init_nofail(&dev->qdev);
641 641
    return DO_UPCAST(RTCState, dev, dev);
642 642
}
643 643

  
b/hw/mips_malta.c
933 933
        eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
934 934
        qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
935 935
        qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
936
        qdev_init(eeprom);
936
        qdev_init_nofail(eeprom);
937 937
    }
938 938
    pit = pit_init(0x40, isa_reserve_irq(0));
939 939
    DMA_init(0);
b/hw/musicpal.c
1551 1551
    qemu_check_nic_model(&nd_table[0], "mv88w8618");
1552 1552
    dev = qdev_create(NULL, "mv88w8618_eth");
1553 1553
    dev->nd = &nd_table[0];
1554
    qdev_init(dev);
1554
    qdev_init_nofail(dev);
1555 1555
    sysbus_mmio_map(sysbus_from_qdev(dev), 0, MP_ETH_BASE);
1556 1556
    sysbus_connect_irq(sysbus_from_qdev(dev), 0, pic[MP_ETH_IRQ]);
1557 1557

  
......
1589 1589
    dev = qdev_create(NULL, "mv88w8618_audio");
1590 1590
    s = sysbus_from_qdev(dev);
1591 1591
    qdev_prop_set_ptr(dev, "wm8750", wm8750_dev);
1592
    qdev_init(dev);
1592
    qdev_init_nofail(dev);
1593 1593
    sysbus_mmio_map(s, 0, MP_AUDIO_BASE);
1594 1594
    sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]);
1595 1595
#endif
b/hw/ne2000-isa.c
87 87
    dev->qdev.nd = nd; /* hack alert */
88 88
    qdev_prop_set_uint32(&dev->qdev, "iobase", base);
89 89
    qdev_prop_set_uint32(&dev->qdev, "irq",    irq);
90
    qdev_init(&dev->qdev);
90
    qdev_init_nofail(&dev->qdev);
91 91
}
92 92

  
93 93
static ISADeviceInfo ne2000_isa_info = {
b/hw/pc.c
1294 1294
            eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1295 1295
            qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
1296 1296
            qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1297
            qdev_init(eeprom);
1297
            qdev_init_nofail(eeprom);
1298 1298
        }
1299 1299
        piix4_acpi_system_hot_add_init(pci_bus);
1300 1300
    }
b/hw/pci.c
946 946
    dev = pci_create(bus, devfn, "pci-bridge");
947 947
    qdev_prop_set_uint32(&dev->qdev, "vendorid", vid);
948 948
    qdev_prop_set_uint32(&dev->qdev, "deviceid", did);
949
    qdev_init(&dev->qdev);
949
    qdev_init_nofail(&dev->qdev);
950 950

  
951 951
    s = DO_UPCAST(PCIBridge, dev, dev);
952 952
    pci_register_secondary_bus(&s->bus, &s->dev, map_irq, name);
......
1010 1010
PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name)
1011 1011
{
1012 1012
    PCIDevice *dev = pci_create(bus, devfn, name);
1013
    qdev_init(&dev->qdev);
1013
    qdev_init_nofail(&dev->qdev);
1014 1014
    return dev;
1015 1015
}
1016 1016

  
b/hw/piix_pci.c
234 234
    s = FROM_SYSBUS(I440FXState, sysbus_from_qdev(dev));
235 235
    b = pci_bus_new(&s->busdev.qdev, NULL, 0);
236 236
    s->bus = b;
237
    qdev_init(dev);
237
    qdev_init_nofail(dev);
238 238

  
239 239
    d = pci_create_simple(b, 0, "i440FX");
240 240
    *pi440fx_state = DO_UPCAST(PCII440FXState, dev, d);
b/hw/qdev.c
269 269
    return 0;
270 270
}
271 271

  
272
/* Like qdev_init(), but terminate program via hw_error() instead of
273
   returning an error value.  This is okay during machine creation.
274
   Don't use for hotplug, because there callers need to recover from
275
   failure.  Exception: if you know the device's init() callback can't
276
   fail, then qdev_init_nofail() can't fail either, and is therefore
277
   usable even then.  But relying on the device implementation that
278
   way is somewhat unclean, and best avoided.  */
279
void qdev_init_nofail(DeviceState *dev)
280
{
281
    DeviceInfo *info = dev->info;
282

  
283
    if (qdev_init(dev) < 0)
284
        hw_error("Initialization of device %s failed\n", info->name);
285
}
286

  
272 287
/* Unlink device from bus and free the structure.  */
273 288
void qdev_free(DeviceState *dev)
274 289
{
b/hw/qdev.h
101 101
DeviceState *qdev_create(BusState *bus, const char *name);
102 102
DeviceState *qdev_device_add(QemuOpts *opts);
103 103
int qdev_init(DeviceState *dev);
104
void qdev_init_nofail(DeviceState *dev);
104 105
int qdev_unplug(DeviceState *dev);
105 106
void qdev_free(DeviceState *dev);
106 107
int qdev_simple_unplug_cb(DeviceState *dev);
b/hw/smc91c111.c
735 735
    qemu_check_nic_model(nd, "smc91c111");
736 736
    dev = qdev_create(NULL, "smc91c111");
737 737
    dev->nd = nd;
738
    qdev_init(dev);
738
    qdev_init_nofail(dev);
739 739
    s = sysbus_from_qdev(dev);
740 740
    sysbus_mmio_map(s, 0, base);
741 741
    sysbus_connect_irq(s, 0, irq);
b/hw/ssi.c
46 46
{
47 47
    DeviceState *dev;
48 48
    dev = qdev_create(&bus->qbus, name);
49
    qdev_init(dev);
49
    qdev_init_nofail(dev);
50 50
    return dev;
51 51
}
52 52

  
b/hw/stellaris.c
1384 1384

  
1385 1385
        enet = qdev_create(NULL, "stellaris_enet");
1386 1386
        enet->nd = &nd_table[0];
1387
        qdev_init(enet);
1387
        qdev_init_nofail(enet);
1388 1388
        sysbus_mmio_map(sysbus_from_qdev(enet), 0, 0x40048000);
1389 1389
        sysbus_connect_irq(sysbus_from_qdev(enet), 0, pic[42]);
1390 1390
    }
b/hw/sun4m.c
359 359

  
360 360
    dev = qdev_create(NULL, "iommu");
361 361
    qdev_prop_set_uint32(dev, "version", version);
362
    qdev_init(dev);
362
    qdev_init_nofail(dev);
363 363
    s = sysbus_from_qdev(dev);
364 364
    sysbus_connect_irq(s, 0, irq);
365 365
    sysbus_mmio_map(s, 0, addr);
......
375 375

  
376 376
    dev = qdev_create(NULL, "sparc32_dma");
377 377
    qdev_prop_set_ptr(dev, "iommu_opaque", iommu);
378
    qdev_init(dev);
378
    qdev_init_nofail(dev);
379 379
    s = sysbus_from_qdev(dev);
380 380
    sysbus_connect_irq(s, 0, parent_irq);
381 381
    *dev_irq = qdev_get_gpio_in(dev, 0);
......
396 396
    dev = qdev_create(NULL, "lance");
397 397
    dev->nd = nd;
398 398
    qdev_prop_set_ptr(dev, "dma", dma_opaque);
399
    qdev_init(dev);
399
    qdev_init_nofail(dev);
400 400
    s = sysbus_from_qdev(dev);
401 401
    sysbus_mmio_map(s, 0, leaddr);
402 402
    sysbus_connect_irq(s, 0, irq);
......
413 413
    unsigned int i, j;
414 414

  
415 415
    dev = qdev_create(NULL, "slavio_intctl");
416
    qdev_init(dev);
416
    qdev_init_nofail(dev);
417 417

  
418 418
    s = sysbus_from_qdev(dev);
419 419

  
......
442 442

  
443 443
    dev = qdev_create(NULL, "slavio_timer");
444 444
    qdev_prop_set_uint32(dev, "num_cpus", num_cpus);
445
    qdev_init(dev);
445
    qdev_init_nofail(dev);
446 446
    s = sysbus_from_qdev(dev);
447 447
    sysbus_connect_irq(s, 0, master_irq);
448 448
    sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET);
......
468 468
    SysBusDevice *s;
469 469

  
470 470
    dev = qdev_create(NULL, "slavio_misc");
471
    qdev_init(dev);
471
    qdev_init_nofail(dev);
472 472
    s = sysbus_from_qdev(dev);
473 473
    if (base) {
474 474
        /* 8 bit registers */
......
505 505

  
506 506
    dev = qdev_create(NULL, "eccmemctl");
507 507
    qdev_prop_set_uint32(dev, "version", version);
508
    qdev_init(dev);
508
    qdev_init_nofail(dev);
509 509
    s = sysbus_from_qdev(dev);
510 510
    sysbus_connect_irq(s, 0, irq);
511 511
    sysbus_mmio_map(s, 0, base);
......
520 520
    SysBusDevice *s;
521 521

  
522 522
    dev = qdev_create(NULL, "apc");
523
    qdev_init(dev);
523
    qdev_init_nofail(dev);
524 524
    s = sysbus_from_qdev(dev);
525 525
    /* Power management (APC) XXX: not a Slavio device */
526 526
    sysbus_mmio_map(s, 0, power_base);
......
539 539
    qdev_prop_set_uint16(dev, "width", width);
540 540
    qdev_prop_set_uint16(dev, "height", height);
541 541
    qdev_prop_set_uint16(dev, "depth", depth);
542
    qdev_init(dev);
542
    qdev_init_nofail(dev);
543 543
    s = sysbus_from_qdev(dev);
544 544
    /* 8-bit plane */
545 545
    sysbus_mmio_map(s, 0, addr + 0x00800000ULL);
......
569 569
    SysBusDevice *s;
570 570

  
571 571
    dev = qdev_create(NULL, "macio_idreg");
572
    qdev_init(dev);
572
    qdev_init_nofail(dev);
573 573
    s = sysbus_from_qdev(dev);
574 574

  
575 575
    sysbus_mmio_map(s, 0, addr);
......
607 607
    int ret;
608 608

  
609 609
    dev = qdev_create(NULL, "openprom");
610
    qdev_init(dev);
610
    qdev_init_nofail(dev);
611 611
    s = sysbus_from_qdev(dev);
612 612

  
613 613
    sysbus_mmio_map(s, 0, addr);
......
697 697

  
698 698
    d = FROM_SYSBUS(RamDevice, s);
699 699
    d->size = RAM_size;
700
    qdev_init(dev);
700
    qdev_init_nofail(dev);
701 701

  
702 702
    sysbus_mmio_map(s, 0, addr);
703 703
}
......
1344 1344
    unsigned int i;
1345 1345

  
1346 1346
    dev = qdev_create(NULL, "sbi");
1347
    qdev_init(dev);
1347
    qdev_init_nofail(dev);
1348 1348

  
1349 1349
    s = sysbus_from_qdev(dev);
1350 1350

  
......
1534 1534
    unsigned int i;
1535 1535

  
1536 1536
    dev = qdev_create(NULL, "sun4c_intctl");
1537
    qdev_init(dev);
1537
    qdev_init_nofail(dev);
1538 1538

  
1539 1539
    s = sysbus_from_qdev(dev);
1540 1540

  
b/hw/sun4u.c
415 415
    int ret;
416 416

  
417 417
    dev = qdev_create(NULL, "openprom");
418
    qdev_init(dev);
418
    qdev_init_nofail(dev);
419 419
    s = sysbus_from_qdev(dev);
420 420

  
421 421
    sysbus_mmio_map(s, 0, addr);
......
498 498

  
499 499
    d = FROM_SYSBUS(RamDevice, s);
500 500
    d->size = RAM_size;
501
    qdev_init(dev);
501
    qdev_init_nofail(dev);
502 502

  
503 503
    sysbus_mmio_map(s, 0, addr);
504 504
}
b/hw/syborg.c
65 65

  
66 66
    dev = qdev_create(NULL, "syborg,timer");
67 67
    qdev_prop_set_uint32(dev, "frequency", 1000000);
68
    qdev_init(dev);
68
    qdev_init_nofail(dev);
69 69
    sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0xC0002000);
70 70
    sysbus_connect_irq(sysbus_from_qdev(dev), 0, pic[1]);
71 71

  
......
84 84
        qemu_check_nic_model(&nd_table[0], "virtio");
85 85
        dev = qdev_create(NULL, "syborg,virtio-net");
86 86
        dev->nd = &nd_table[0];
87
        qdev_init(dev);
87
        qdev_init_nofail(dev);
88 88
        s = sysbus_from_qdev(dev);
89 89
        sysbus_mmio_map(s, 0, 0xc000c000);
90 90
        sysbus_connect_irq(s, 0, pic[9]);
b/hw/sysbus.c
143 143

  
144 144
    dev = qdev_create(NULL, name);
145 145
    s = sysbus_from_qdev(dev);
146
    qdev_init(dev);
146
    qdev_init_nofail(dev);
147 147
    if (addr != (target_phys_addr_t)-1) {
148 148
        sysbus_mmio_map(s, 0, addr);
149 149
    }
b/hw/unin_pci.c
253 253
    /* Use values found on a real PowerMac */
254 254
    /* Uninorth main bus */
255 255
    dev = qdev_create(NULL, "Uni-north main");
256
    qdev_init(dev);
256
    qdev_init_nofail(dev);
257 257
    s = sysbus_from_qdev(dev);
258 258
    d = FROM_SYSBUS(UNINState, s);
259 259
    d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
b/hw/usb-bus.c
101 101
USBDevice *usb_create_simple(USBBus *bus, const char *name)
102 102
{
103 103
    USBDevice *dev = usb_create(bus, name);
104
    qdev_init(&dev->qdev);
104
    qdev_init_nofail(&dev->qdev);
105 105
    return dev;
106 106
}
107 107

  
b/hw/vga-pci.c
128 128
    dev = pci_create(bus, -1, "VGA");
129 129
    qdev_prop_set_uint32(&dev->qdev, "bios-offset", vga_bios_offset);
130 130
    qdev_prop_set_uint32(&dev->qdev, "bios-size", vga_bios_offset);
131
    qdev_init(&dev->qdev);
131
    qdev_init_nofail(&dev->qdev);
132 132

  
133 133
    return 0;
134 134
}
b/hw/xilinx.h
9 9

  
10 10
    dev = qdev_create(NULL, "xilinx,intc");
11 11
    qdev_prop_set_uint32(dev, "kind-of-intr", kind_of_intr);
12
    qdev_init(dev);
12
    qdev_init_nofail(dev);
13 13
    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
14 14
    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
15 15
    return dev;
......
24 24
    dev = qdev_create(NULL, "xilinx,timer");
25 25
    qdev_prop_set_uint32(dev, "nr-timers", nr);
26 26
    qdev_prop_set_uint32(dev, "frequency", freq);
27
    qdev_init(dev);
27
    qdev_init_nofail(dev);
28 28
    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
29 29
    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
30 30
    return dev;
......
43 43
    dev->nd = nd;
44 44
    qdev_prop_set_uint32(dev, "txpingpong", txpingpong);
45 45
    qdev_prop_set_uint32(dev, "rxpingpong", rxpingpong);
46
    qdev_init(dev);
46
    qdev_init_nofail(dev);
47 47
    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
48 48
    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
49 49
    return dev;

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