commit e30b46789326eaa7fb1f870f0c7d964263851216
Author: blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>
Date:   Thu May 29 18:20:36 2008 +0000

    MicroSparc I didn't have fsmuld op
    
    git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4618 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index ba3ee01..539fd2d 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -284,17 +284,18 @@ typedef struct CPUSPARCState {
 #define CPU_FEATURE_FMUL     (1 << 7)
 #define CPU_FEATURE_VIS1     (1 << 8)
 #define CPU_FEATURE_VIS2     (1 << 9)
+#define CPU_FEATURE_FSMULD   (1 << 10)
 #ifndef TARGET_SPARC64
 #define CPU_DEFAULT_FEATURES (CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP |  \
                               CPU_FEATURE_MUL | CPU_FEATURE_DIV |     \
                               CPU_FEATURE_FLUSH | CPU_FEATURE_FSQRT | \
-                              CPU_FEATURE_FMUL)
+                              CPU_FEATURE_FMUL | CPU_FEATURE_FSMULD)
 #else
 #define CPU_DEFAULT_FEATURES (CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP |  \
                               CPU_FEATURE_MUL | CPU_FEATURE_DIV |     \
                               CPU_FEATURE_FLUSH | CPU_FEATURE_FSQRT | \
                               CPU_FEATURE_FMUL | CPU_FEATURE_VIS1 |   \
-                              CPU_FEATURE_VIS2)
+                              CPU_FEATURE_VIS2 | CPU_FEATURE_FSMULD)
 #endif
 
 #if defined(TARGET_SPARC64)
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 8bf40e4..4537314 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -1098,7 +1098,7 @@ static const sparc_def_t sparc_defs[] = {
         .mmu_cxr_mask = 0x0000003f,
         .mmu_sfsr_mask = 0xffffffff,
         .mmu_trcr_mask = 0xffffffff,
-        .features = CPU_FEATURE_FLOAT,
+        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_FSMULD,
     },
     {
         .name = "Fujitsu MB86904",
@@ -1134,7 +1134,8 @@ static const sparc_def_t sparc_defs[] = {
         .mmu_cxr_mask = 0x0000003f,
         .mmu_sfsr_mask = 0xffffffff,
         .mmu_trcr_mask = 0xffffffff,
-        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT,
+        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT |
+        CPU_FEATURE_FSMULD,
     },
     {
         .name = "Cypress CY7C601",
@@ -1146,7 +1147,8 @@ static const sparc_def_t sparc_defs[] = {
         .mmu_cxr_mask = 0x0000003f,
         .mmu_sfsr_mask = 0xffffffff,
         .mmu_trcr_mask = 0xffffffff,
-        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT,
+        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT |
+        CPU_FEATURE_FSMULD,
     },
     {
         .name = "Cypress CY7C611",
@@ -1158,7 +1160,8 @@ static const sparc_def_t sparc_defs[] = {
         .mmu_cxr_mask = 0x0000003f,
         .mmu_sfsr_mask = 0xffffffff,
         .mmu_trcr_mask = 0xffffffff,
-        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT,
+        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT |
+        CPU_FEATURE_FSMULD,
     },
     {
         .name = "TI SuperSparc II",
@@ -1182,7 +1185,9 @@ static const sparc_def_t sparc_defs[] = {
         .mmu_cxr_mask = 0x0000003f,
         .mmu_sfsr_mask = 0x00016fff,
         .mmu_trcr_mask = 0x0000003f,
-        .features = CPU_DEFAULT_FEATURES,
+        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_MUL |
+        CPU_FEATURE_DIV | CPU_FEATURE_FLUSH | CPU_FEATURE_FSQRT |
+        CPU_FEATURE_FMUL,
     },
     {
         .name = "TI MicroSparc II",
@@ -1266,7 +1271,8 @@ static const sparc_def_t sparc_defs[] = {
         .mmu_cxr_mask = 0x0000003f,
         .mmu_sfsr_mask = 0xffffffff,
         .mmu_trcr_mask = 0xffffffff,
-        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT,
+        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT |
+        CPU_FEATURE_FSMULD,
     },
     {
         .name = "Matsushita MN10501",
@@ -1278,7 +1284,8 @@ static const sparc_def_t sparc_defs[] = {
         .mmu_cxr_mask = 0x0000003f,
         .mmu_sfsr_mask = 0xffffffff,
         .mmu_trcr_mask = 0xffffffff,
-        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_MUL | CPU_FEATURE_FSQRT,
+        .features = CPU_FEATURE_FLOAT | CPU_FEATURE_MUL | CPU_FEATURE_FSQRT |
+        CPU_FEATURE_FSMULD,
     },
     {
         .name = "Weitek W8601",
@@ -1330,6 +1337,7 @@ static const char * const feature_name[] = {
     "fmul",
     "vis1",
     "vis2",
+    "fsmuld",
 };
 
 static void print_features(FILE *f,
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 9ff48b2..eb0ab33 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -2511,6 +2511,7 @@ static void disas_sparc_insn(DisasContext * dc)
                         gen_op_store_QT0_fpr(QFPREG(rd));
                         break;
                     case 0x69:
+                        CHECK_FPU_FEATURE(dc, FSMULD);
                         gen_op_load_fpr_FT0(rs1);
                         gen_op_load_fpr_FT1(rs2);
                         gen_clear_float_exceptions();
