Revision e327e323
| b/hw/apb_pci.c | ||
|---|---|---|
| 434 | 434 |
.qdev.name = "pbm", |
| 435 | 435 |
.qdev.size = sizeof(PCIDevice), |
| 436 | 436 |
.init = pbm_pci_host_init, |
| 437 |
.header_type = PCI_HEADER_TYPE_BRIDGE,
|
|
| 437 |
.is_bridge = 1,
|
|
| 438 | 438 |
}; |
| 439 | 439 |
|
| 440 | 440 |
static SysBusDeviceInfo pbm_host_info = {
|
| b/hw/dec_pci.c | ||
|---|---|---|
| 90 | 90 |
.qdev.name = "dec-21154", |
| 91 | 91 |
.qdev.size = sizeof(PCIDevice), |
| 92 | 92 |
.init = dec_21154_pci_host_init, |
| 93 |
.header_type = PCI_HEADER_TYPE_BRIDGE,
|
|
| 93 |
.is_bridge = 1,
|
|
| 94 | 94 |
}; |
| 95 | 95 |
|
| 96 | 96 |
static void dec_register_devices(void) |
| b/hw/pci.c | ||
|---|---|---|
| 605 | 605 |
const char *name, int devfn, |
| 606 | 606 |
PCIConfigReadFunc *config_read, |
| 607 | 607 |
PCIConfigWriteFunc *config_write, |
| 608 |
uint8_t header_type)
|
|
| 608 |
bool is_bridge)
|
|
| 609 | 609 |
{
|
| 610 | 610 |
if (devfn < 0) {
|
| 611 | 611 |
for(devfn = bus->devfn_min ; devfn < ARRAY_SIZE(bus->devices); |
| ... | ... | |
| 627 | 627 |
pci_dev->irq_state = 0; |
| 628 | 628 |
pci_config_alloc(pci_dev); |
| 629 | 629 |
|
| 630 |
header_type &= ~PCI_HEADER_TYPE_MULTI_FUNCTION; |
|
| 631 |
if (header_type == PCI_HEADER_TYPE_NORMAL) {
|
|
| 630 |
if (!is_bridge) {
|
|
| 632 | 631 |
pci_set_default_subsystem_id(pci_dev); |
| 633 | 632 |
} |
| 634 | 633 |
pci_init_cmask(pci_dev); |
| 635 | 634 |
pci_init_wmask(pci_dev); |
| 636 |
if (header_type == PCI_HEADER_TYPE_BRIDGE) {
|
|
| 635 |
if (is_bridge) {
|
|
| 637 | 636 |
pci_init_wmask_bridge(pci_dev); |
| 638 | 637 |
} |
| 639 | 638 |
|
| ... | ... | |
| 1563 | 1562 |
pci_set_word(dev->config + PCI_STATUS, |
| 1564 | 1563 |
PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); |
| 1565 | 1564 |
pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_PCI); |
| 1566 |
dev->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_BRIDGE; |
|
| 1565 |
dev->config[PCI_HEADER_TYPE] = |
|
| 1566 |
(dev->config[PCI_HEADER_TYPE] & PCI_HEADER_TYPE_MULTI_FUNCTION) | |
|
| 1567 |
PCI_HEADER_TYPE_BRIDGE; |
|
| 1567 | 1568 |
pci_set_word(dev->config + PCI_SEC_STATUS, |
| 1568 | 1569 |
PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); |
| 1569 | 1570 |
return 0; |
| ... | ... | |
| 1614 | 1615 |
devfn = pci_dev->devfn; |
| 1615 | 1616 |
pci_dev = do_pci_register_device(pci_dev, bus, base->name, devfn, |
| 1616 | 1617 |
info->config_read, info->config_write, |
| 1617 |
info->header_type);
|
|
| 1618 |
info->is_bridge);
|
|
| 1618 | 1619 |
if (pci_dev == NULL) |
| 1619 | 1620 |
return -1; |
| 1620 | 1621 |
rc = info->init(pci_dev); |
| ... | ... | |
| 1890 | 1891 |
.init = pci_bridge_initfn, |
| 1891 | 1892 |
.exit = pci_bridge_exitfn, |
| 1892 | 1893 |
.config_write = pci_bridge_write_config, |
| 1893 |
.header_type = PCI_HEADER_TYPE_BRIDGE,
|
|
| 1894 |
.is_bridge = 1,
|
|
| 1894 | 1895 |
.qdev.props = (Property[]) {
|
| 1895 | 1896 |
DEFINE_PROP_HEX32("vendorid", PCIBridge, vid, 0),
|
| 1896 | 1897 |
DEFINE_PROP_HEX32("deviceid", PCIBridge, did, 0),
|
| b/hw/pci.h | ||
|---|---|---|
| 325 | 325 |
PCIConfigReadFunc *config_read; |
| 326 | 326 |
PCIConfigWriteFunc *config_write; |
| 327 | 327 |
|
| 328 |
/* pci config header type */ |
|
| 329 |
uint8_t header_type; |
|
| 328 |
/* |
|
| 329 |
* pci-to-pci bridge or normal device. |
|
| 330 |
* This doesn't mean pci host switch. |
|
| 331 |
* When card bus bridge is supported, this would be enhanced. |
|
| 332 |
*/ |
|
| 333 |
int is_bridge; |
|
| 330 | 334 |
|
| 331 | 335 |
/* pcie stuff */ |
| 332 | 336 |
int is_express; /* is this device pci express? */ |
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