root / target-s390x / helper.c @ e32a1832
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1 | 10ec5117 | Alexander Graf | /*
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2 | 10ec5117 | Alexander Graf | * S/390 helpers
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3 | 10ec5117 | Alexander Graf | *
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4 | 10ec5117 | Alexander Graf | * Copyright (c) 2009 Ulrich Hecht
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5 | d5a43964 | Alexander Graf | * Copyright (c) 2011 Alexander Graf
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6 | 10ec5117 | Alexander Graf | *
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7 | 10ec5117 | Alexander Graf | * This library is free software; you can redistribute it and/or
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8 | 10ec5117 | Alexander Graf | * modify it under the terms of the GNU Lesser General Public
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9 | 10ec5117 | Alexander Graf | * License as published by the Free Software Foundation; either
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10 | 10ec5117 | Alexander Graf | * version 2 of the License, or (at your option) any later version.
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11 | 10ec5117 | Alexander Graf | *
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12 | 10ec5117 | Alexander Graf | * This library is distributed in the hope that it will be useful,
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13 | 10ec5117 | Alexander Graf | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 10ec5117 | Alexander Graf | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 | 10ec5117 | Alexander Graf | * Lesser General Public License for more details.
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16 | 10ec5117 | Alexander Graf | *
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17 | 10ec5117 | Alexander Graf | * You should have received a copy of the GNU Lesser General Public
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18 | 70539e18 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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19 | 10ec5117 | Alexander Graf | */
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20 | 10ec5117 | Alexander Graf | |
21 | 10ec5117 | Alexander Graf | #include <stdio.h> |
22 | 10ec5117 | Alexander Graf | #include <stdlib.h> |
23 | 10ec5117 | Alexander Graf | #include <string.h> |
24 | 10ec5117 | Alexander Graf | |
25 | 10ec5117 | Alexander Graf | #include "cpu.h" |
26 | 10ec5117 | Alexander Graf | #include "exec-all.h" |
27 | 10ec5117 | Alexander Graf | #include "gdbstub.h" |
28 | 10ec5117 | Alexander Graf | #include "qemu-common.h" |
29 | d5a43964 | Alexander Graf | #include "qemu-timer.h" |
30 | 10ec5117 | Alexander Graf | |
31 | d5a43964 | Alexander Graf | //#define DEBUG_S390
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32 | d5a43964 | Alexander Graf | //#define DEBUG_S390_PTE
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33 | d5a43964 | Alexander Graf | //#define DEBUG_S390_STDOUT
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34 | d5a43964 | Alexander Graf | |
35 | d5a43964 | Alexander Graf | #ifdef DEBUG_S390
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36 | d5a43964 | Alexander Graf | #ifdef DEBUG_S390_STDOUT
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37 | d5a43964 | Alexander Graf | #define DPRINTF(fmt, ...) \
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38 | d5a43964 | Alexander Graf | do { fprintf(stderr, fmt, ## __VA_ARGS__); \ |
39 | d5a43964 | Alexander Graf | qemu_log(fmt, ##__VA_ARGS__); } while (0) |
40 | d5a43964 | Alexander Graf | #else
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41 | d5a43964 | Alexander Graf | #define DPRINTF(fmt, ...) \
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42 | d5a43964 | Alexander Graf | do { qemu_log(fmt, ## __VA_ARGS__); } while (0) |
43 | d5a43964 | Alexander Graf | #endif
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44 | d5a43964 | Alexander Graf | #else
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45 | d5a43964 | Alexander Graf | #define DPRINTF(fmt, ...) \
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46 | d5a43964 | Alexander Graf | do { } while (0) |
47 | d5a43964 | Alexander Graf | #endif
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48 | d5a43964 | Alexander Graf | |
49 | d5a43964 | Alexander Graf | #ifdef DEBUG_S390_PTE
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50 | d5a43964 | Alexander Graf | #define PTE_DPRINTF DPRINTF
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51 | d5a43964 | Alexander Graf | #else
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52 | d5a43964 | Alexander Graf | #define PTE_DPRINTF(fmt, ...) \
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53 | d5a43964 | Alexander Graf | do { } while (0) |
54 | d5a43964 | Alexander Graf | #endif
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55 | d5a43964 | Alexander Graf | |
56 | d5a43964 | Alexander Graf | #ifndef CONFIG_USER_ONLY
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57 | d5a43964 | Alexander Graf | static void s390x_tod_timer(void *opaque) |
58 | d5a43964 | Alexander Graf | { |
59 | d5a43964 | Alexander Graf | CPUState *env = opaque; |
60 | d5a43964 | Alexander Graf | |
61 | d5a43964 | Alexander Graf | env->pending_int |= INTERRUPT_TOD; |
62 | d5a43964 | Alexander Graf | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
63 | d5a43964 | Alexander Graf | } |
64 | d5a43964 | Alexander Graf | |
65 | d5a43964 | Alexander Graf | static void s390x_cpu_timer(void *opaque) |
66 | d5a43964 | Alexander Graf | { |
67 | d5a43964 | Alexander Graf | CPUState *env = opaque; |
68 | d5a43964 | Alexander Graf | |
69 | d5a43964 | Alexander Graf | env->pending_int |= INTERRUPT_CPUTIMER; |
70 | d5a43964 | Alexander Graf | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
71 | d5a43964 | Alexander Graf | } |
72 | d5a43964 | Alexander Graf | #endif
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73 | 10c339a0 | Alexander Graf | |
74 | 10ec5117 | Alexander Graf | CPUS390XState *cpu_s390x_init(const char *cpu_model) |
75 | 10ec5117 | Alexander Graf | { |
76 | 10ec5117 | Alexander Graf | CPUS390XState *env; |
77 | d5a43964 | Alexander Graf | #if !defined (CONFIG_USER_ONLY)
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78 | d5a43964 | Alexander Graf | struct tm tm;
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79 | d5a43964 | Alexander Graf | #endif
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80 | 10ec5117 | Alexander Graf | static int inited = 0; |
81 | d5a43964 | Alexander Graf | static int cpu_num = 0; |
82 | 10ec5117 | Alexander Graf | |
83 | 10ec5117 | Alexander Graf | env = qemu_mallocz(sizeof(CPUS390XState));
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84 | 10ec5117 | Alexander Graf | cpu_exec_init(env); |
85 | 10ec5117 | Alexander Graf | if (!inited) {
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86 | 10ec5117 | Alexander Graf | inited = 1;
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87 | d5a43964 | Alexander Graf | s390x_translate_init(); |
88 | 10ec5117 | Alexander Graf | } |
89 | 10ec5117 | Alexander Graf | |
90 | d5a43964 | Alexander Graf | #if !defined(CONFIG_USER_ONLY)
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91 | d5a43964 | Alexander Graf | qemu_get_timedate(&tm, 0);
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92 | d5a43964 | Alexander Graf | env->tod_offset = TOD_UNIX_EPOCH + |
93 | d5a43964 | Alexander Graf | (time2tod(mktimegm(&tm)) * 1000000000ULL);
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94 | d5a43964 | Alexander Graf | env->tod_basetime = 0;
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95 | d5a43964 | Alexander Graf | env->tod_timer = qemu_new_timer_ns(vm_clock, s390x_tod_timer, env); |
96 | d5a43964 | Alexander Graf | env->cpu_timer = qemu_new_timer_ns(vm_clock, s390x_cpu_timer, env); |
97 | d5a43964 | Alexander Graf | #endif
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98 | 10ec5117 | Alexander Graf | env->cpu_model_str = cpu_model; |
99 | d5a43964 | Alexander Graf | env->cpu_num = cpu_num++; |
100 | d5a43964 | Alexander Graf | env->ext_index = -1;
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101 | 10ec5117 | Alexander Graf | cpu_reset(env); |
102 | 10ec5117 | Alexander Graf | qemu_init_vcpu(env); |
103 | 10ec5117 | Alexander Graf | return env;
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104 | 10ec5117 | Alexander Graf | } |
105 | 10ec5117 | Alexander Graf | |
106 | d5a43964 | Alexander Graf | #if defined(CONFIG_USER_ONLY)
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107 | d5a43964 | Alexander Graf | |
108 | d5a43964 | Alexander Graf | void do_interrupt (CPUState *env)
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109 | d5a43964 | Alexander Graf | { |
110 | d5a43964 | Alexander Graf | env->exception_index = -1;
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111 | d5a43964 | Alexander Graf | } |
112 | d5a43964 | Alexander Graf | |
113 | d5a43964 | Alexander Graf | int cpu_s390x_handle_mmu_fault (CPUState *env, target_ulong address, int rw, |
114 | d5a43964 | Alexander Graf | int mmu_idx, int is_softmmu) |
115 | d5a43964 | Alexander Graf | { |
116 | d5a43964 | Alexander Graf | /* fprintf(stderr,"%s: address 0x%lx rw %d mmu_idx %d is_softmmu %d\n",
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117 | d5a43964 | Alexander Graf | __FUNCTION__, address, rw, mmu_idx, is_softmmu); */
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118 | d5a43964 | Alexander Graf | env->exception_index = EXCP_ADDR; |
119 | d5a43964 | Alexander Graf | env->__excp_addr = address; /* FIXME: find out how this works on a real machine */
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120 | d5a43964 | Alexander Graf | return 1; |
121 | d5a43964 | Alexander Graf | } |
122 | d5a43964 | Alexander Graf | |
123 | d5a43964 | Alexander Graf | #endif /* CONFIG_USER_ONLY */ |
124 | d5a43964 | Alexander Graf | |
125 | 10ec5117 | Alexander Graf | void cpu_reset(CPUS390XState *env)
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126 | 10ec5117 | Alexander Graf | { |
127 | 10ec5117 | Alexander Graf | if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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128 | 10ec5117 | Alexander Graf | qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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129 | 10ec5117 | Alexander Graf | log_cpu_state(env, 0);
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130 | 10ec5117 | Alexander Graf | } |
131 | 10ec5117 | Alexander Graf | |
132 | 10ec5117 | Alexander Graf | memset(env, 0, offsetof(CPUS390XState, breakpoints));
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133 | 10ec5117 | Alexander Graf | /* FIXME: reset vector? */
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134 | 10ec5117 | Alexander Graf | tlb_flush(env, 1);
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135 | 10ec5117 | Alexander Graf | } |
136 | 10c339a0 | Alexander Graf | |
137 | d5a43964 | Alexander Graf | #ifndef CONFIG_USER_ONLY
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138 | d5a43964 | Alexander Graf | |
139 | d5a43964 | Alexander Graf | /* Ensure to exit the TB after this call! */
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140 | d5a43964 | Alexander Graf | static void trigger_pgm_exception(CPUState *env, uint32_t code, uint32_t ilc) |
141 | d5a43964 | Alexander Graf | { |
142 | d5a43964 | Alexander Graf | env->exception_index = EXCP_PGM; |
143 | d5a43964 | Alexander Graf | env->int_pgm_code = code; |
144 | d5a43964 | Alexander Graf | env->int_pgm_ilc = ilc; |
145 | d5a43964 | Alexander Graf | } |
146 | d5a43964 | Alexander Graf | |
147 | d5a43964 | Alexander Graf | static int trans_bits(CPUState *env, uint64_t mode) |
148 | d5a43964 | Alexander Graf | { |
149 | d5a43964 | Alexander Graf | int bits = 0; |
150 | d5a43964 | Alexander Graf | |
151 | d5a43964 | Alexander Graf | switch (mode) {
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152 | d5a43964 | Alexander Graf | case PSW_ASC_PRIMARY:
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153 | d5a43964 | Alexander Graf | bits = 1;
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154 | d5a43964 | Alexander Graf | break;
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155 | d5a43964 | Alexander Graf | case PSW_ASC_SECONDARY:
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156 | d5a43964 | Alexander Graf | bits = 2;
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157 | d5a43964 | Alexander Graf | break;
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158 | d5a43964 | Alexander Graf | case PSW_ASC_HOME:
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159 | d5a43964 | Alexander Graf | bits = 3;
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160 | d5a43964 | Alexander Graf | break;
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161 | d5a43964 | Alexander Graf | default:
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162 | d5a43964 | Alexander Graf | cpu_abort(env, "unknown asc mode\n");
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163 | d5a43964 | Alexander Graf | break;
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164 | d5a43964 | Alexander Graf | } |
165 | d5a43964 | Alexander Graf | |
166 | d5a43964 | Alexander Graf | return bits;
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167 | d5a43964 | Alexander Graf | } |
168 | d5a43964 | Alexander Graf | |
169 | d5a43964 | Alexander Graf | static void trigger_prot_fault(CPUState *env, target_ulong vaddr, uint64_t mode) |
170 | d5a43964 | Alexander Graf | { |
171 | d5a43964 | Alexander Graf | int ilc = ILC_LATER_INC_2;
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172 | d5a43964 | Alexander Graf | int bits = trans_bits(env, mode) | 4; |
173 | d5a43964 | Alexander Graf | |
174 | d5a43964 | Alexander Graf | DPRINTF("%s: vaddr=%016" PRIx64 " bits=%d\n", __FUNCTION__, vaddr, bits); |
175 | d5a43964 | Alexander Graf | |
176 | d5a43964 | Alexander Graf | stq_phys(env->psa + offsetof(LowCore, trans_exc_code), vaddr | bits); |
177 | d5a43964 | Alexander Graf | trigger_pgm_exception(env, PGM_PROTECTION, ilc); |
178 | d5a43964 | Alexander Graf | } |
179 | d5a43964 | Alexander Graf | |
180 | d5a43964 | Alexander Graf | static void trigger_page_fault(CPUState *env, target_ulong vaddr, uint32_t type, |
181 | d5a43964 | Alexander Graf | uint64_t asc, int rw)
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182 | d5a43964 | Alexander Graf | { |
183 | d5a43964 | Alexander Graf | int ilc = ILC_LATER;
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184 | d5a43964 | Alexander Graf | int bits = trans_bits(env, asc);
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185 | d5a43964 | Alexander Graf | |
186 | d5a43964 | Alexander Graf | if (rw == 2) { |
187 | d5a43964 | Alexander Graf | /* code has is undefined ilc */
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188 | d5a43964 | Alexander Graf | ilc = 2;
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189 | d5a43964 | Alexander Graf | } |
190 | d5a43964 | Alexander Graf | |
191 | d5a43964 | Alexander Graf | DPRINTF("%s: vaddr=%016" PRIx64 " bits=%d\n", __FUNCTION__, vaddr, bits); |
192 | d5a43964 | Alexander Graf | |
193 | d5a43964 | Alexander Graf | stq_phys(env->psa + offsetof(LowCore, trans_exc_code), vaddr | bits); |
194 | d5a43964 | Alexander Graf | trigger_pgm_exception(env, type, ilc); |
195 | d5a43964 | Alexander Graf | } |
196 | d5a43964 | Alexander Graf | |
197 | d5a43964 | Alexander Graf | static int mmu_translate_asce(CPUState *env, target_ulong vaddr, uint64_t asc, |
198 | d5a43964 | Alexander Graf | uint64_t asce, int level, target_ulong *raddr,
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199 | d5a43964 | Alexander Graf | int *flags, int rw) |
200 | c92114b1 | Alexander Graf | { |
201 | d5a43964 | Alexander Graf | uint64_t offs = 0;
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202 | d5a43964 | Alexander Graf | uint64_t origin; |
203 | d5a43964 | Alexander Graf | uint64_t new_asce; |
204 | d5a43964 | Alexander Graf | |
205 | d5a43964 | Alexander Graf | PTE_DPRINTF("%s: 0x%" PRIx64 "\n", __FUNCTION__, asce); |
206 | d5a43964 | Alexander Graf | |
207 | d5a43964 | Alexander Graf | if (((level != _ASCE_TYPE_SEGMENT) && (asce & _REGION_ENTRY_INV)) ||
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208 | d5a43964 | Alexander Graf | ((level == _ASCE_TYPE_SEGMENT) && (asce & _SEGMENT_ENTRY_INV))) { |
209 | d5a43964 | Alexander Graf | /* XXX different regions have different faults */
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210 | d5a43964 | Alexander Graf | DPRINTF("%s: invalid region\n", __FUNCTION__);
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211 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_SEGMENT_TRANS, asc, rw); |
212 | d5a43964 | Alexander Graf | return -1; |
213 | d5a43964 | Alexander Graf | } |
214 | d5a43964 | Alexander Graf | |
215 | d5a43964 | Alexander Graf | if ((level <= _ASCE_TYPE_MASK) && ((asce & _ASCE_TYPE_MASK) != level)) {
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216 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw); |
217 | d5a43964 | Alexander Graf | return -1; |
218 | d5a43964 | Alexander Graf | } |
219 | d5a43964 | Alexander Graf | |
220 | d5a43964 | Alexander Graf | if (asce & _ASCE_REAL_SPACE) {
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221 | d5a43964 | Alexander Graf | /* direct mapping */
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222 | d5a43964 | Alexander Graf | |
223 | d5a43964 | Alexander Graf | *raddr = vaddr; |
224 | d5a43964 | Alexander Graf | return 0; |
225 | d5a43964 | Alexander Graf | } |
226 | d5a43964 | Alexander Graf | |
227 | d5a43964 | Alexander Graf | origin = asce & _ASCE_ORIGIN; |
228 | d5a43964 | Alexander Graf | |
229 | d5a43964 | Alexander Graf | switch (level) {
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230 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION1 + 4: |
231 | d5a43964 | Alexander Graf | offs = (vaddr >> 50) & 0x3ff8; |
232 | d5a43964 | Alexander Graf | break;
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233 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION1:
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234 | d5a43964 | Alexander Graf | offs = (vaddr >> 39) & 0x3ff8; |
235 | d5a43964 | Alexander Graf | break;
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236 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION2:
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237 | d5a43964 | Alexander Graf | offs = (vaddr >> 28) & 0x3ff8; |
238 | d5a43964 | Alexander Graf | break;
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239 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION3:
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240 | d5a43964 | Alexander Graf | offs = (vaddr >> 17) & 0x3ff8; |
241 | d5a43964 | Alexander Graf | break;
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242 | d5a43964 | Alexander Graf | case _ASCE_TYPE_SEGMENT:
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243 | d5a43964 | Alexander Graf | offs = (vaddr >> 9) & 0x07f8; |
244 | d5a43964 | Alexander Graf | origin = asce & _SEGMENT_ENTRY_ORIGIN; |
245 | d5a43964 | Alexander Graf | break;
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246 | d5a43964 | Alexander Graf | } |
247 | d5a43964 | Alexander Graf | |
248 | d5a43964 | Alexander Graf | /* XXX region protection flags */
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249 | d5a43964 | Alexander Graf | /* *flags &= ~PAGE_WRITE */
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250 | d5a43964 | Alexander Graf | |
251 | d5a43964 | Alexander Graf | new_asce = ldq_phys(origin + offs); |
252 | d5a43964 | Alexander Graf | PTE_DPRINTF("%s: 0x%" PRIx64 " + 0x%" PRIx64 " => 0x%016" PRIx64 "\n", |
253 | d5a43964 | Alexander Graf | __FUNCTION__, origin, offs, new_asce); |
254 | d5a43964 | Alexander Graf | |
255 | d5a43964 | Alexander Graf | if (level != _ASCE_TYPE_SEGMENT) {
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256 | d5a43964 | Alexander Graf | /* yet another region */
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257 | d5a43964 | Alexander Graf | return mmu_translate_asce(env, vaddr, asc, new_asce, level - 4, raddr, |
258 | d5a43964 | Alexander Graf | flags, rw); |
259 | d5a43964 | Alexander Graf | } |
260 | d5a43964 | Alexander Graf | |
261 | d5a43964 | Alexander Graf | /* PTE */
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262 | d5a43964 | Alexander Graf | if (new_asce & _PAGE_INVALID) {
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263 | d5a43964 | Alexander Graf | DPRINTF("%s: PTE=0x%" PRIx64 " invalid\n", __FUNCTION__, new_asce); |
264 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_PAGE_TRANS, asc, rw); |
265 | d5a43964 | Alexander Graf | return -1; |
266 | d5a43964 | Alexander Graf | } |
267 | d5a43964 | Alexander Graf | |
268 | d5a43964 | Alexander Graf | if (new_asce & _PAGE_RO) {
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269 | d5a43964 | Alexander Graf | *flags &= ~PAGE_WRITE; |
270 | d5a43964 | Alexander Graf | } |
271 | d5a43964 | Alexander Graf | |
272 | d5a43964 | Alexander Graf | *raddr = new_asce & _ASCE_ORIGIN; |
273 | d5a43964 | Alexander Graf | |
274 | d5a43964 | Alexander Graf | PTE_DPRINTF("%s: PTE=0x%" PRIx64 "\n", __FUNCTION__, new_asce); |
275 | d5a43964 | Alexander Graf | |
276 | c92114b1 | Alexander Graf | return 0; |
277 | c92114b1 | Alexander Graf | } |
278 | c92114b1 | Alexander Graf | |
279 | d5a43964 | Alexander Graf | static int mmu_translate_asc(CPUState *env, target_ulong vaddr, uint64_t asc, |
280 | d5a43964 | Alexander Graf | target_ulong *raddr, int *flags, int rw) |
281 | d5a43964 | Alexander Graf | { |
282 | d5a43964 | Alexander Graf | uint64_t asce = 0;
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283 | d5a43964 | Alexander Graf | int level, new_level;
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284 | d5a43964 | Alexander Graf | int r;
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285 | 10c339a0 | Alexander Graf | |
286 | d5a43964 | Alexander Graf | switch (asc) {
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287 | d5a43964 | Alexander Graf | case PSW_ASC_PRIMARY:
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288 | d5a43964 | Alexander Graf | PTE_DPRINTF("%s: asc=primary\n", __FUNCTION__);
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289 | d5a43964 | Alexander Graf | asce = env->cregs[1];
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290 | d5a43964 | Alexander Graf | break;
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291 | d5a43964 | Alexander Graf | case PSW_ASC_SECONDARY:
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292 | d5a43964 | Alexander Graf | PTE_DPRINTF("%s: asc=secondary\n", __FUNCTION__);
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293 | d5a43964 | Alexander Graf | asce = env->cregs[7];
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294 | d5a43964 | Alexander Graf | break;
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295 | d5a43964 | Alexander Graf | case PSW_ASC_HOME:
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296 | d5a43964 | Alexander Graf | PTE_DPRINTF("%s: asc=home\n", __FUNCTION__);
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297 | d5a43964 | Alexander Graf | asce = env->cregs[13];
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298 | d5a43964 | Alexander Graf | break;
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299 | d5a43964 | Alexander Graf | } |
300 | d5a43964 | Alexander Graf | |
301 | d5a43964 | Alexander Graf | switch (asce & _ASCE_TYPE_MASK) {
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302 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION1:
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303 | d5a43964 | Alexander Graf | break;
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304 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION2:
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305 | d5a43964 | Alexander Graf | if (vaddr & 0xffe0000000000000ULL) { |
306 | d5a43964 | Alexander Graf | DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64
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307 | d5a43964 | Alexander Graf | " 0xffe0000000000000ULL\n", __FUNCTION__,
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308 | d5a43964 | Alexander Graf | vaddr); |
309 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw); |
310 | d5a43964 | Alexander Graf | return -1; |
311 | d5a43964 | Alexander Graf | } |
312 | d5a43964 | Alexander Graf | break;
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313 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION3:
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314 | d5a43964 | Alexander Graf | if (vaddr & 0xfffffc0000000000ULL) { |
315 | d5a43964 | Alexander Graf | DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64
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316 | d5a43964 | Alexander Graf | " 0xfffffc0000000000ULL\n", __FUNCTION__,
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317 | d5a43964 | Alexander Graf | vaddr); |
318 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw); |
319 | d5a43964 | Alexander Graf | return -1; |
320 | d5a43964 | Alexander Graf | } |
321 | d5a43964 | Alexander Graf | break;
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322 | d5a43964 | Alexander Graf | case _ASCE_TYPE_SEGMENT:
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323 | d5a43964 | Alexander Graf | if (vaddr & 0xffffffff80000000ULL) { |
324 | d5a43964 | Alexander Graf | DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64
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325 | d5a43964 | Alexander Graf | " 0xffffffff80000000ULL\n", __FUNCTION__,
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326 | d5a43964 | Alexander Graf | vaddr); |
327 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw); |
328 | d5a43964 | Alexander Graf | return -1; |
329 | d5a43964 | Alexander Graf | } |
330 | d5a43964 | Alexander Graf | break;
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331 | d5a43964 | Alexander Graf | } |
332 | d5a43964 | Alexander Graf | |
333 | d5a43964 | Alexander Graf | /* fake level above current */
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334 | d5a43964 | Alexander Graf | level = asce & _ASCE_TYPE_MASK; |
335 | d5a43964 | Alexander Graf | new_level = level + 4;
|
336 | d5a43964 | Alexander Graf | asce = (asce & ~_ASCE_TYPE_MASK) | (new_level & _ASCE_TYPE_MASK); |
337 | d5a43964 | Alexander Graf | |
338 | d5a43964 | Alexander Graf | r = mmu_translate_asce(env, vaddr, asc, asce, new_level, raddr, flags, rw); |
339 | d5a43964 | Alexander Graf | |
340 | d5a43964 | Alexander Graf | if ((rw == 1) && !(*flags & PAGE_WRITE)) { |
341 | d5a43964 | Alexander Graf | trigger_prot_fault(env, vaddr, asc); |
342 | d5a43964 | Alexander Graf | return -1; |
343 | d5a43964 | Alexander Graf | } |
344 | d5a43964 | Alexander Graf | |
345 | d5a43964 | Alexander Graf | return r;
|
346 | d5a43964 | Alexander Graf | } |
347 | d5a43964 | Alexander Graf | |
348 | d5a43964 | Alexander Graf | int mmu_translate(CPUState *env, target_ulong vaddr, int rw, uint64_t asc, |
349 | d5a43964 | Alexander Graf | target_ulong *raddr, int *flags)
|
350 | d5a43964 | Alexander Graf | { |
351 | d5a43964 | Alexander Graf | int r = -1; |
352 | d5a43964 | Alexander Graf | |
353 | d5a43964 | Alexander Graf | *flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC; |
354 | d5a43964 | Alexander Graf | vaddr &= TARGET_PAGE_MASK; |
355 | d5a43964 | Alexander Graf | |
356 | d5a43964 | Alexander Graf | if (!(env->psw.mask & PSW_MASK_DAT)) {
|
357 | d5a43964 | Alexander Graf | *raddr = vaddr; |
358 | d5a43964 | Alexander Graf | r = 0;
|
359 | d5a43964 | Alexander Graf | goto out;
|
360 | d5a43964 | Alexander Graf | } |
361 | d5a43964 | Alexander Graf | |
362 | d5a43964 | Alexander Graf | switch (asc) {
|
363 | d5a43964 | Alexander Graf | case PSW_ASC_PRIMARY:
|
364 | d5a43964 | Alexander Graf | case PSW_ASC_HOME:
|
365 | d5a43964 | Alexander Graf | r = mmu_translate_asc(env, vaddr, asc, raddr, flags, rw); |
366 | d5a43964 | Alexander Graf | break;
|
367 | d5a43964 | Alexander Graf | case PSW_ASC_SECONDARY:
|
368 | d5a43964 | Alexander Graf | /*
|
369 | d5a43964 | Alexander Graf | * Instruction: Primary
|
370 | d5a43964 | Alexander Graf | * Data: Secondary
|
371 | d5a43964 | Alexander Graf | */
|
372 | d5a43964 | Alexander Graf | if (rw == 2) { |
373 | d5a43964 | Alexander Graf | r = mmu_translate_asc(env, vaddr, PSW_ASC_PRIMARY, raddr, flags, |
374 | d5a43964 | Alexander Graf | rw); |
375 | d5a43964 | Alexander Graf | *flags &= ~(PAGE_READ | PAGE_WRITE); |
376 | d5a43964 | Alexander Graf | } else {
|
377 | d5a43964 | Alexander Graf | r = mmu_translate_asc(env, vaddr, PSW_ASC_SECONDARY, raddr, flags, |
378 | d5a43964 | Alexander Graf | rw); |
379 | d5a43964 | Alexander Graf | *flags &= ~(PAGE_EXEC); |
380 | d5a43964 | Alexander Graf | } |
381 | d5a43964 | Alexander Graf | break;
|
382 | d5a43964 | Alexander Graf | case PSW_ASC_ACCREG:
|
383 | d5a43964 | Alexander Graf | default:
|
384 | d5a43964 | Alexander Graf | hw_error("guest switched to unknown asc mode\n");
|
385 | d5a43964 | Alexander Graf | break;
|
386 | d5a43964 | Alexander Graf | } |
387 | d5a43964 | Alexander Graf | |
388 | d5a43964 | Alexander Graf | out:
|
389 | d5a43964 | Alexander Graf | /* Convert real address -> absolute address */
|
390 | d5a43964 | Alexander Graf | if (*raddr < 0x2000) { |
391 | d5a43964 | Alexander Graf | *raddr = *raddr + env->psa; |
392 | d5a43964 | Alexander Graf | } |
393 | d5a43964 | Alexander Graf | |
394 | d5a43964 | Alexander Graf | return r;
|
395 | d5a43964 | Alexander Graf | } |
396 | d5a43964 | Alexander Graf | |
397 | d5a43964 | Alexander Graf | int cpu_s390x_handle_mmu_fault (CPUState *env, target_ulong _vaddr, int rw, |
398 | 10c339a0 | Alexander Graf | int mmu_idx, int is_softmmu) |
399 | 10c339a0 | Alexander Graf | { |
400 | d5a43964 | Alexander Graf | uint64_t asc = env->psw.mask & PSW_MASK_ASC; |
401 | d5a43964 | Alexander Graf | target_ulong vaddr, raddr; |
402 | 10c339a0 | Alexander Graf | int prot;
|
403 | 10c339a0 | Alexander Graf | |
404 | d5a43964 | Alexander Graf | DPRINTF("%s: address 0x%" PRIx64 " rw %d mmu_idx %d is_softmmu %d\n", |
405 | d5a43964 | Alexander Graf | __FUNCTION__, _vaddr, rw, mmu_idx, is_softmmu); |
406 | d5a43964 | Alexander Graf | |
407 | d5a43964 | Alexander Graf | _vaddr &= TARGET_PAGE_MASK; |
408 | d5a43964 | Alexander Graf | vaddr = _vaddr; |
409 | d5a43964 | Alexander Graf | |
410 | d5a43964 | Alexander Graf | /* 31-Bit mode */
|
411 | d5a43964 | Alexander Graf | if (!(env->psw.mask & PSW_MASK_64)) {
|
412 | d5a43964 | Alexander Graf | vaddr &= 0x7fffffff;
|
413 | d5a43964 | Alexander Graf | } |
414 | d5a43964 | Alexander Graf | |
415 | d5a43964 | Alexander Graf | if (mmu_translate(env, vaddr, rw, asc, &raddr, &prot)) {
|
416 | d5a43964 | Alexander Graf | /* Translation ended in exception */
|
417 | d5a43964 | Alexander Graf | return 1; |
418 | d5a43964 | Alexander Graf | } |
419 | 10c339a0 | Alexander Graf | |
420 | d5a43964 | Alexander Graf | /* check out of RAM access */
|
421 | d5a43964 | Alexander Graf | if (raddr > (ram_size + virtio_size)) {
|
422 | d5a43964 | Alexander Graf | DPRINTF("%s: aaddr %" PRIx64 " > ram_size %" PRIx64 "\n", __FUNCTION__, |
423 | d5a43964 | Alexander Graf | (uint64_t)aaddr, (uint64_t)ram_size); |
424 | d5a43964 | Alexander Graf | trigger_pgm_exception(env, PGM_ADDRESSING, ILC_LATER); |
425 | d5a43964 | Alexander Graf | return 1; |
426 | d5a43964 | Alexander Graf | } |
427 | 10c339a0 | Alexander Graf | |
428 | d5a43964 | Alexander Graf | DPRINTF("%s: set tlb %" PRIx64 " -> %" PRIx64 " (%x)\n", __FUNCTION__, |
429 | d5a43964 | Alexander Graf | (uint64_t)vaddr, (uint64_t)raddr, prot); |
430 | d5a43964 | Alexander Graf | |
431 | d5a43964 | Alexander Graf | tlb_set_page(env, _vaddr, raddr, prot, |
432 | d4c430a8 | Paul Brook | mmu_idx, TARGET_PAGE_SIZE); |
433 | d5a43964 | Alexander Graf | |
434 | d4c430a8 | Paul Brook | return 0; |
435 | 10c339a0 | Alexander Graf | } |
436 | d5a43964 | Alexander Graf | |
437 | d5a43964 | Alexander Graf | target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong vaddr) |
438 | d5a43964 | Alexander Graf | { |
439 | d5a43964 | Alexander Graf | target_ulong raddr; |
440 | d5a43964 | Alexander Graf | int prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
|
441 | d5a43964 | Alexander Graf | int old_exc = env->exception_index;
|
442 | d5a43964 | Alexander Graf | uint64_t asc = env->psw.mask & PSW_MASK_ASC; |
443 | d5a43964 | Alexander Graf | |
444 | d5a43964 | Alexander Graf | /* 31-Bit mode */
|
445 | d5a43964 | Alexander Graf | if (!(env->psw.mask & PSW_MASK_64)) {
|
446 | d5a43964 | Alexander Graf | vaddr &= 0x7fffffff;
|
447 | d5a43964 | Alexander Graf | } |
448 | d5a43964 | Alexander Graf | |
449 | d5a43964 | Alexander Graf | mmu_translate(env, vaddr, 2, asc, &raddr, &prot);
|
450 | d5a43964 | Alexander Graf | env->exception_index = old_exc; |
451 | d5a43964 | Alexander Graf | |
452 | d5a43964 | Alexander Graf | return raddr;
|
453 | d5a43964 | Alexander Graf | } |
454 | d5a43964 | Alexander Graf | |
455 | d5a43964 | Alexander Graf | void load_psw(CPUState *env, uint64_t mask, uint64_t addr)
|
456 | d5a43964 | Alexander Graf | { |
457 | d5a43964 | Alexander Graf | if (mask & PSW_MASK_WAIT) {
|
458 | d5a43964 | Alexander Graf | env->halted = 1;
|
459 | d5a43964 | Alexander Graf | env->exception_index = EXCP_HLT; |
460 | d5a43964 | Alexander Graf | if (!(mask & (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK))) {
|
461 | d5a43964 | Alexander Graf | /* XXX disabled wait state - CPU is dead */
|
462 | d5a43964 | Alexander Graf | } |
463 | d5a43964 | Alexander Graf | } |
464 | d5a43964 | Alexander Graf | |
465 | d5a43964 | Alexander Graf | env->psw.addr = addr; |
466 | d5a43964 | Alexander Graf | env->psw.mask = mask; |
467 | d5a43964 | Alexander Graf | env->cc_op = (mask >> 13) & 3; |
468 | d5a43964 | Alexander Graf | } |
469 | d5a43964 | Alexander Graf | |
470 | d5a43964 | Alexander Graf | static uint64_t get_psw_mask(CPUState *env)
|
471 | d5a43964 | Alexander Graf | { |
472 | d5a43964 | Alexander Graf | uint64_t r = env->psw.mask; |
473 | d5a43964 | Alexander Graf | |
474 | d5a43964 | Alexander Graf | env->cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst, env->cc_vr); |
475 | d5a43964 | Alexander Graf | |
476 | d5a43964 | Alexander Graf | r &= ~(3ULL << 13); |
477 | d5a43964 | Alexander Graf | assert(!(env->cc_op & ~3));
|
478 | d5a43964 | Alexander Graf | r |= env->cc_op << 13;
|
479 | d5a43964 | Alexander Graf | |
480 | d5a43964 | Alexander Graf | return r;
|
481 | d5a43964 | Alexander Graf | } |
482 | d5a43964 | Alexander Graf | |
483 | d5a43964 | Alexander Graf | static void do_svc_interrupt(CPUState *env) |
484 | d5a43964 | Alexander Graf | { |
485 | d5a43964 | Alexander Graf | uint64_t mask, addr; |
486 | d5a43964 | Alexander Graf | LowCore *lowcore; |
487 | d5a43964 | Alexander Graf | target_phys_addr_t len = TARGET_PAGE_SIZE; |
488 | d5a43964 | Alexander Graf | |
489 | d5a43964 | Alexander Graf | lowcore = cpu_physical_memory_map(env->psa, &len, 1);
|
490 | d5a43964 | Alexander Graf | |
491 | d5a43964 | Alexander Graf | lowcore->svc_code = cpu_to_be16(env->int_svc_code); |
492 | d5a43964 | Alexander Graf | lowcore->svc_ilc = cpu_to_be16(env->int_svc_ilc); |
493 | d5a43964 | Alexander Graf | lowcore->svc_old_psw.mask = cpu_to_be64(get_psw_mask(env)); |
494 | d5a43964 | Alexander Graf | lowcore->svc_old_psw.addr = cpu_to_be64(env->psw.addr + (env->int_svc_ilc)); |
495 | d5a43964 | Alexander Graf | mask = be64_to_cpu(lowcore->svc_new_psw.mask); |
496 | d5a43964 | Alexander Graf | addr = be64_to_cpu(lowcore->svc_new_psw.addr); |
497 | d5a43964 | Alexander Graf | |
498 | d5a43964 | Alexander Graf | cpu_physical_memory_unmap(lowcore, len, 1, len);
|
499 | d5a43964 | Alexander Graf | |
500 | d5a43964 | Alexander Graf | load_psw(env, mask, addr); |
501 | d5a43964 | Alexander Graf | } |
502 | d5a43964 | Alexander Graf | |
503 | d5a43964 | Alexander Graf | static void do_program_interrupt(CPUState *env) |
504 | d5a43964 | Alexander Graf | { |
505 | d5a43964 | Alexander Graf | uint64_t mask, addr; |
506 | d5a43964 | Alexander Graf | LowCore *lowcore; |
507 | d5a43964 | Alexander Graf | target_phys_addr_t len = TARGET_PAGE_SIZE; |
508 | d5a43964 | Alexander Graf | int ilc = env->int_pgm_ilc;
|
509 | d5a43964 | Alexander Graf | |
510 | d5a43964 | Alexander Graf | switch (ilc) {
|
511 | d5a43964 | Alexander Graf | case ILC_LATER:
|
512 | d5a43964 | Alexander Graf | ilc = get_ilc(ldub_code(env->psw.addr)); |
513 | d5a43964 | Alexander Graf | break;
|
514 | d5a43964 | Alexander Graf | case ILC_LATER_INC:
|
515 | d5a43964 | Alexander Graf | ilc = get_ilc(ldub_code(env->psw.addr)); |
516 | d5a43964 | Alexander Graf | env->psw.addr += ilc * 2;
|
517 | d5a43964 | Alexander Graf | break;
|
518 | d5a43964 | Alexander Graf | case ILC_LATER_INC_2:
|
519 | d5a43964 | Alexander Graf | ilc = get_ilc(ldub_code(env->psw.addr)) * 2;
|
520 | d5a43964 | Alexander Graf | env->psw.addr += ilc; |
521 | d5a43964 | Alexander Graf | break;
|
522 | d5a43964 | Alexander Graf | } |
523 | d5a43964 | Alexander Graf | |
524 | d5a43964 | Alexander Graf | qemu_log("%s: code=0x%x ilc=%d\n", __FUNCTION__, env->int_pgm_code, ilc);
|
525 | d5a43964 | Alexander Graf | |
526 | d5a43964 | Alexander Graf | lowcore = cpu_physical_memory_map(env->psa, &len, 1);
|
527 | d5a43964 | Alexander Graf | |
528 | d5a43964 | Alexander Graf | lowcore->pgm_ilc = cpu_to_be16(ilc); |
529 | d5a43964 | Alexander Graf | lowcore->pgm_code = cpu_to_be16(env->int_pgm_code); |
530 | d5a43964 | Alexander Graf | lowcore->program_old_psw.mask = cpu_to_be64(get_psw_mask(env)); |
531 | d5a43964 | Alexander Graf | lowcore->program_old_psw.addr = cpu_to_be64(env->psw.addr); |
532 | d5a43964 | Alexander Graf | mask = be64_to_cpu(lowcore->program_new_psw.mask); |
533 | d5a43964 | Alexander Graf | addr = be64_to_cpu(lowcore->program_new_psw.addr); |
534 | d5a43964 | Alexander Graf | |
535 | d5a43964 | Alexander Graf | cpu_physical_memory_unmap(lowcore, len, 1, len);
|
536 | d5a43964 | Alexander Graf | |
537 | d5a43964 | Alexander Graf | DPRINTF("%s: %x %x %" PRIx64 " %" PRIx64 "\n", __FUNCTION__, |
538 | d5a43964 | Alexander Graf | env->int_pgm_code, ilc, env->psw.mask, |
539 | d5a43964 | Alexander Graf | env->psw.addr); |
540 | d5a43964 | Alexander Graf | |
541 | d5a43964 | Alexander Graf | load_psw(env, mask, addr); |
542 | d5a43964 | Alexander Graf | } |
543 | d5a43964 | Alexander Graf | |
544 | d5a43964 | Alexander Graf | #define VIRTIO_SUBCODE_64 0x0D00 |
545 | d5a43964 | Alexander Graf | |
546 | d5a43964 | Alexander Graf | static void do_ext_interrupt(CPUState *env) |
547 | d5a43964 | Alexander Graf | { |
548 | d5a43964 | Alexander Graf | uint64_t mask, addr; |
549 | d5a43964 | Alexander Graf | LowCore *lowcore; |
550 | d5a43964 | Alexander Graf | target_phys_addr_t len = TARGET_PAGE_SIZE; |
551 | d5a43964 | Alexander Graf | ExtQueue *q; |
552 | d5a43964 | Alexander Graf | |
553 | d5a43964 | Alexander Graf | if (!(env->psw.mask & PSW_MASK_EXT)) {
|
554 | d5a43964 | Alexander Graf | cpu_abort(env, "Ext int w/o ext mask\n");
|
555 | d5a43964 | Alexander Graf | } |
556 | d5a43964 | Alexander Graf | |
557 | d5a43964 | Alexander Graf | if (env->ext_index < 0 || env->ext_index > MAX_EXT_QUEUE) { |
558 | d5a43964 | Alexander Graf | cpu_abort(env, "Ext queue overrun: %d\n", env->ext_index);
|
559 | d5a43964 | Alexander Graf | } |
560 | d5a43964 | Alexander Graf | |
561 | d5a43964 | Alexander Graf | q = &env->ext_queue[env->ext_index]; |
562 | d5a43964 | Alexander Graf | lowcore = cpu_physical_memory_map(env->psa, &len, 1);
|
563 | d5a43964 | Alexander Graf | |
564 | d5a43964 | Alexander Graf | lowcore->ext_int_code = cpu_to_be16(q->code); |
565 | d5a43964 | Alexander Graf | lowcore->ext_params = cpu_to_be32(q->param); |
566 | d5a43964 | Alexander Graf | lowcore->ext_params2 = cpu_to_be64(q->param64); |
567 | d5a43964 | Alexander Graf | lowcore->external_old_psw.mask = cpu_to_be64(get_psw_mask(env)); |
568 | d5a43964 | Alexander Graf | lowcore->external_old_psw.addr = cpu_to_be64(env->psw.addr); |
569 | d5a43964 | Alexander Graf | lowcore->cpu_addr = cpu_to_be16(env->cpu_num | VIRTIO_SUBCODE_64); |
570 | d5a43964 | Alexander Graf | mask = be64_to_cpu(lowcore->external_new_psw.mask); |
571 | d5a43964 | Alexander Graf | addr = be64_to_cpu(lowcore->external_new_psw.addr); |
572 | d5a43964 | Alexander Graf | |
573 | d5a43964 | Alexander Graf | cpu_physical_memory_unmap(lowcore, len, 1, len);
|
574 | d5a43964 | Alexander Graf | |
575 | d5a43964 | Alexander Graf | env->ext_index--; |
576 | d5a43964 | Alexander Graf | if (env->ext_index == -1) { |
577 | d5a43964 | Alexander Graf | env->pending_int &= ~INTERRUPT_EXT; |
578 | d5a43964 | Alexander Graf | } |
579 | d5a43964 | Alexander Graf | |
580 | d5a43964 | Alexander Graf | DPRINTF("%s: %" PRIx64 " %" PRIx64 "\n", __FUNCTION__, |
581 | d5a43964 | Alexander Graf | env->psw.mask, env->psw.addr); |
582 | d5a43964 | Alexander Graf | |
583 | d5a43964 | Alexander Graf | load_psw(env, mask, addr); |
584 | d5a43964 | Alexander Graf | } |
585 | 3110e292 | Alexander Graf | |
586 | 3110e292 | Alexander Graf | void do_interrupt (CPUState *env)
|
587 | 3110e292 | Alexander Graf | { |
588 | d5a43964 | Alexander Graf | qemu_log("%s: %d at pc=%" PRIx64 "\n", __FUNCTION__, env->exception_index, |
589 | d5a43964 | Alexander Graf | env->psw.addr); |
590 | d5a43964 | Alexander Graf | |
591 | d5a43964 | Alexander Graf | /* handle external interrupts */
|
592 | d5a43964 | Alexander Graf | if ((env->psw.mask & PSW_MASK_EXT) &&
|
593 | d5a43964 | Alexander Graf | env->exception_index == -1) {
|
594 | d5a43964 | Alexander Graf | if (env->pending_int & INTERRUPT_EXT) {
|
595 | d5a43964 | Alexander Graf | /* code is already in env */
|
596 | d5a43964 | Alexander Graf | env->exception_index = EXCP_EXT; |
597 | d5a43964 | Alexander Graf | } else if (env->pending_int & INTERRUPT_TOD) { |
598 | d5a43964 | Alexander Graf | cpu_inject_ext(env, 0x1004, 0, 0); |
599 | d5a43964 | Alexander Graf | env->exception_index = EXCP_EXT; |
600 | d5a43964 | Alexander Graf | env->pending_int &= ~INTERRUPT_EXT; |
601 | d5a43964 | Alexander Graf | env->pending_int &= ~INTERRUPT_TOD; |
602 | d5a43964 | Alexander Graf | } else if (env->pending_int & INTERRUPT_CPUTIMER) { |
603 | d5a43964 | Alexander Graf | cpu_inject_ext(env, 0x1005, 0, 0); |
604 | d5a43964 | Alexander Graf | env->exception_index = EXCP_EXT; |
605 | d5a43964 | Alexander Graf | env->pending_int &= ~INTERRUPT_EXT; |
606 | d5a43964 | Alexander Graf | env->pending_int &= ~INTERRUPT_TOD; |
607 | d5a43964 | Alexander Graf | } |
608 | d5a43964 | Alexander Graf | } |
609 | d5a43964 | Alexander Graf | |
610 | d5a43964 | Alexander Graf | switch (env->exception_index) {
|
611 | d5a43964 | Alexander Graf | case EXCP_PGM:
|
612 | d5a43964 | Alexander Graf | do_program_interrupt(env); |
613 | d5a43964 | Alexander Graf | break;
|
614 | d5a43964 | Alexander Graf | case EXCP_SVC:
|
615 | d5a43964 | Alexander Graf | do_svc_interrupt(env); |
616 | d5a43964 | Alexander Graf | break;
|
617 | d5a43964 | Alexander Graf | case EXCP_EXT:
|
618 | d5a43964 | Alexander Graf | do_ext_interrupt(env); |
619 | d5a43964 | Alexander Graf | break;
|
620 | d5a43964 | Alexander Graf | } |
621 | d5a43964 | Alexander Graf | env->exception_index = -1;
|
622 | d5a43964 | Alexander Graf | |
623 | d5a43964 | Alexander Graf | if (!env->pending_int) {
|
624 | d5a43964 | Alexander Graf | env->interrupt_request &= ~CPU_INTERRUPT_HARD; |
625 | d5a43964 | Alexander Graf | } |
626 | 3110e292 | Alexander Graf | } |
627 | d5a43964 | Alexander Graf | |
628 | d5a43964 | Alexander Graf | #endif /* CONFIG_USER_ONLY */ |