Revision e397ee33 target-mips/cpu.h

b/target-mips/cpu.h
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#define CP0C3_MT   2
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#define CP0C3_SM   1
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#define CP0C3_TL   0
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    int32_t CP0_Config6;
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    int32_t CP0_Config7;
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    target_ulong CP0_LLAddr;
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    target_ulong CP0_WatchLo;
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    int32_t CP0_WatchHi;

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