Revision e46b9681
b/tcg/ppc/tcg-target.c | ||
---|---|---|
1339 | 1339 |
tcg_out_qemu_st(s, args, 3); |
1340 | 1340 |
break; |
1341 | 1341 |
|
1342 |
case INDEX_op_ext8s_i32: |
|
1343 |
tcg_out32 (s, EXTSB | RS (args[1]) | RA (args[0])); |
|
1344 |
break; |
|
1345 |
case INDEX_op_ext16s_i32: |
|
1346 |
tcg_out32 (s, EXTSH | RS (args[1]) | RA (args[0])); |
|
1347 |
break; |
|
1348 |
|
|
1342 | 1349 |
default: |
1343 | 1350 |
tcg_dump_ops (s, stderr); |
1344 | 1351 |
tcg_abort (); |
... | ... | |
1415 | 1422 |
{ INDEX_op_qemu_st64, { "M", "M", "M", "M" } }, |
1416 | 1423 |
#endif |
1417 | 1424 |
|
1425 |
{ INDEX_op_ext8s_i32, { "r", "r" } }, |
|
1426 |
{ INDEX_op_ext16s_i32, { "r", "r" } }, |
|
1427 |
|
|
1418 | 1428 |
{ -1 }, |
1419 | 1429 |
}; |
1420 | 1430 |
|
b/tcg/ppc/tcg-target.h | ||
---|---|---|
71 | 71 |
/* optional instructions */ |
72 | 72 |
#define TCG_TARGET_HAS_neg_i32 |
73 | 73 |
#define TCG_TARGET_HAS_div_i32 |
74 |
#define TCG_TARGET_HAS_ext8s_i32 |
|
75 |
#define TCG_TARGET_HAS_ext16s_i32 |
|
74 | 76 |
|
75 | 77 |
#define TCG_AREG0 TCG_REG_R27 |
76 | 78 |
#define TCG_AREG1 TCG_REG_R24 |
b/tcg/ppc64/tcg-target.c | ||
---|---|---|
969 | 969 |
static void tcg_out_op (TCGContext *s, int opc, const TCGArg *args, |
970 | 970 |
const int *const_args) |
971 | 971 |
{ |
972 |
int c; |
|
973 |
|
|
972 | 974 |
switch (opc) { |
973 | 975 |
case INDEX_op_exit_tb: |
974 | 976 |
tcg_out_movi (s, TCG_TYPE_I64, TCG_REG_R3, args[0]); |
... | ... | |
1313 | 1315 |
tcg_out_qemu_st (s, args, 3); |
1314 | 1316 |
break; |
1315 | 1317 |
|
1318 |
case INDEX_op_ext8s_i32: |
|
1319 |
case INDEX_op_ext8s_i64: |
|
1320 |
c = EXTSB; |
|
1321 |
goto gen_ext; |
|
1322 |
case INDEX_op_ext16s_i32: |
|
1323 |
case INDEX_op_ext16s_i64: |
|
1324 |
c = EXTSH; |
|
1325 |
goto gen_ext; |
|
1326 |
case INDEX_op_ext32s_i64: |
|
1327 |
c = EXTSW; |
|
1328 |
goto gen_ext; |
|
1329 |
gen_ext: |
|
1330 |
tcg_out32 (s, c | RS (args[1]) | RA (args[0])); |
|
1331 |
break; |
|
1332 |
|
|
1316 | 1333 |
default: |
1317 | 1334 |
tcg_dump_ops (s, stderr); |
1318 | 1335 |
tcg_abort (); |
... | ... | |
1404 | 1421 |
{ INDEX_op_qemu_st32, { "K", "K" } }, |
1405 | 1422 |
{ INDEX_op_qemu_st64, { "M", "M", "M" } }, |
1406 | 1423 |
|
1424 |
{ INDEX_op_ext8s_i32, { "r", "r" } }, |
|
1425 |
{ INDEX_op_ext16s_i32, { "r", "r" } }, |
|
1426 |
{ INDEX_op_ext8s_i64, { "r", "r" } }, |
|
1427 |
{ INDEX_op_ext16s_i64, { "r", "r" } }, |
|
1428 |
{ INDEX_op_ext32s_i64, { "r", "r" } }, |
|
1429 |
|
|
1407 | 1430 |
{ -1 }, |
1408 | 1431 |
}; |
1409 | 1432 |
|
b/tcg/ppc64/tcg-target.h | ||
---|---|---|
72 | 72 |
#define TCG_TARGET_HAS_div_i32 |
73 | 73 |
#define TCG_TARGET_HAS_neg_i64 |
74 | 74 |
#define TCG_TARGET_HAS_div_i64 |
75 |
#define TCG_TARGET_HAS_ext8s_i32 |
|
76 |
#define TCG_TARGET_HAS_ext16s_i32 |
|
77 |
#define TCG_TARGET_HAS_ext8s_i64 |
|
78 |
#define TCG_TARGET_HAS_ext16s_i64 |
|
79 |
#define TCG_TARGET_HAS_ext32s_i64 |
|
75 | 80 |
|
76 | 81 |
#define TCG_AREG0 TCG_REG_R27 |
77 | 82 |
#define TCG_AREG1 TCG_REG_R24 |
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