Revision e4bcb14c hw/mips_pica61.c
| b/hw/mips_pica61.c | ||
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| 44 | 44 |
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#define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000)) |
| 46 | 46 |
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#define MAX_IDE_BUS 2 |
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#define MAX_FD 2 |
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static const int ide_iobase[2] = { 0x1f0, 0x170 };
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| 48 | 51 |
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
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| 49 | 52 |
static const int ide_irq[2] = { 14, 15 };
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| ... | ... | |
| 72 | 75 |
int i; |
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int available_ram; |
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qemu_irq *i8259; |
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int index; |
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BlockDriverState *fd[MAX_FD]; |
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| 75 | 80 |
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/* init CPUs */ |
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if (cpu_model == NULL) {
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| ... | ... | |
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i8042_mm_init(i8259[6], i8259[7], 0x80005060, 0); |
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/* IDE controller */ |
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for(i = 0; i < 2; i++) |
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if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
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fprintf(stderr, "qemu: too many IDE bus\n"); |
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exit(1); |
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} |
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for(i = 0; i < MAX_IDE_BUS; i++) {
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int hd0, hd1; |
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hd0 = drive_get_index(IF_IDE, i, 0); |
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hd1 = drive_get_index(IF_IDE, i, 1); |
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isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]], |
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bs_table[2 * i], bs_table[2 * i + 1]); |
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hd0 == -1 ? NULL : drives_table[hd0].bdrv, |
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hd1 == -1 ? NULL : drives_table[hd1].bdrv); |
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} |
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| 147 | 163 |
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/* Network controller */ |
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/* FIXME: missing NS SONIC DP83932 */ |
| ... | ... | |
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/* FIXME: missing NCR 53C94 */ |
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/* ISA devices (floppy, serial, parallel) */ |
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fdctrl_init(i8259[1], 1, 1, 0x80003000, fd_table); |
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for (i = 0; i < MAX_FD; i++) {
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index = drive_get_index(IF_FLOPPY, 0, i); |
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if (index == -1) |
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continue; |
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fd[i] = drives_table[index].bdrv; |
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} |
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fdctrl_init(i8259[1], 1, 1, 0x80003000, fd); |
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| 156 | 179 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) {
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| 157 | 180 |
if (serial_hds[i]) {
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| 158 | 181 |
serial_mm_init(serial_base[i], 0, i8259[serial_irq[i]], serial_hds[i], 1); |
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