Revision e4d58b41

b/tcg/arm/tcg-target.c
1746 1746
    { -1 },
1747 1747
};
1748 1748

  
1749
void tcg_target_init(TCGContext *s)
1749
static void tcg_target_init(TCGContext *s)
1750 1750
{
1751 1751
#if !defined(CONFIG_USER_ONLY)
1752 1752
    /* fail safe */
......
1809 1809
    tcg_out_movi32(s, COND_AL, ret, arg);
1810 1810
}
1811 1811

  
1812
void tcg_target_qemu_prologue(TCGContext *s)
1812
static void tcg_target_qemu_prologue(TCGContext *s)
1813 1813
{
1814 1814
    /* There is no need to save r7, it is used to store the address
1815 1815
       of the env structure and is not modified by GCC. */
b/tcg/hppa/tcg-target.c
1600 1600
    TCG_REG_R18
1601 1601
};
1602 1602

  
1603
void tcg_target_qemu_prologue(TCGContext *s)
1603
static void tcg_target_qemu_prologue(TCGContext *s)
1604 1604
{
1605 1605
    int frame_size, i;
1606 1606

  
......
1652 1652
                 TCG_REG_SP, -frame_size, INSN_LDWM);
1653 1653
}
1654 1654

  
1655
void tcg_target_init(TCGContext *s)
1655
static void tcg_target_init(TCGContext *s)
1656 1656
{
1657 1657
    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
1658 1658

  
b/tcg/i386/tcg-target.c
1430 1430
};
1431 1431

  
1432 1432
/* Generate global QEMU prologue and epilogue code */
1433
void tcg_target_qemu_prologue(TCGContext *s)
1433
static void tcg_target_qemu_prologue(TCGContext *s)
1434 1434
{
1435 1435
    int i, frame_size, push_size, stack_addend;
1436 1436

  
......
1458 1458
    tcg_out_opc(s, OPC_RET);
1459 1459
}
1460 1460

  
1461
void tcg_target_init(TCGContext *s)
1461
static void tcg_target_init(TCGContext *s)
1462 1462
{
1463 1463
#if !defined(CONFIG_USER_ONLY)
1464 1464
    /* fail safe */
b/tcg/ia64/tcg-target.c
2266 2266
};
2267 2267

  
2268 2268
/* Generate global QEMU prologue and epilogue code */
2269
void tcg_target_qemu_prologue(TCGContext *s)
2269
static void tcg_target_qemu_prologue(TCGContext *s)
2270 2270
{
2271 2271
    int frame_size;
2272 2272

  
......
2321 2321
                               TCG_REG_B0));
2322 2322
}
2323 2323

  
2324
void tcg_target_init(TCGContext *s)
2324
static void tcg_target_init(TCGContext *s)
2325 2325
{
2326 2326
    tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32],
2327 2327
                   0xffffffffffffffffull);
b/tcg/mips/tcg-target.c
1466 1466
};
1467 1467

  
1468 1468
/* Generate global QEMU prologue and epilogue code */
1469
void tcg_target_qemu_prologue(TCGContext *s)
1469
static void tcg_target_qemu_prologue(TCGContext *s)
1470 1470
{
1471 1471
    int i, frame_size;
1472 1472

  
......
1498 1498
    tcg_out_addi(s, TCG_REG_SP, frame_size);
1499 1499
}
1500 1500

  
1501
void tcg_target_init(TCGContext *s)
1501
static void tcg_target_init(TCGContext *s)
1502 1502
{
1503 1503
    tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32], 0xffffffff);
1504 1504
    tcg_regset_set(tcg_target_call_clobber_regs,
b/tcg/ppc/tcg-target.c
900 900
#endif
901 901
}
902 902

  
903
void tcg_target_qemu_prologue (TCGContext *s)
903
static void tcg_target_qemu_prologue (TCGContext *s)
904 904
{
905 905
    int i, frame_size;
906 906

  
......
1885 1885
    { -1 },
1886 1886
};
1887 1887

  
1888
void tcg_target_init(TCGContext *s)
1888
static void tcg_target_init(TCGContext *s)
1889 1889
{
1890 1890
    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
1891 1891
    tcg_regset_set32(tcg_target_call_clobber_regs, 0,
b/tcg/ppc64/tcg-target.c
860 860
#endif
861 861
}
862 862

  
863
void tcg_target_qemu_prologue (TCGContext *s)
863
static void tcg_target_qemu_prologue (TCGContext *s)
864 864
{
865 865
    int i, frame_size;
866 866
#ifndef __APPLE__
......
1663 1663
    { -1 },
1664 1664
};
1665 1665

  
1666
void tcg_target_init (TCGContext *s)
1666
static void tcg_target_init (TCGContext *s)
1667 1667
{
1668 1668
    tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
1669 1669
    tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
b/tcg/s390/tcg-target.c
84 84
    tcg_abort();
85 85
}
86 86

  
87
void tcg_target_init(TCGContext *s)
87
static void tcg_target_init(TCGContext *s)
88 88
{
89 89
    /* gets called with KVM */
90 90
}
91 91

  
92
void tcg_target_qemu_prologue(TCGContext *s)
92
static void tcg_target_qemu_prologue(TCGContext *s)
93 93
{
94 94
    /* gets called with KVM */
95 95
}
b/tcg/sparc/tcg-target.c
691 691
#endif
692 692

  
693 693
/* Generate global QEMU prologue and epilogue code */
694
void tcg_target_qemu_prologue(TCGContext *s)
694
static void tcg_target_qemu_prologue(TCGContext *s)
695 695
{
696 696
    tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) |
697 697
              INSN_IMM13(-TCG_TARGET_STACK_MINFRAME));
......
1533 1533
    { -1 },
1534 1534
};
1535 1535

  
1536
void tcg_target_init(TCGContext *s)
1536
static void tcg_target_init(TCGContext *s)
1537 1537
{
1538 1538
    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
1539 1539
#if TCG_TARGET_REG_BITS == 64
b/tcg/tcg.c
63 63
#error GUEST_BASE not supported on this host.
64 64
#endif
65 65

  
66
static void tcg_target_init(TCGContext *s);
67
static void tcg_target_qemu_prologue(TCGContext *s);
66 68
static void patch_reloc(uint8_t *code_ptr, int type, 
67 69
                        tcg_target_long value, tcg_target_long addend);
68 70

  
b/tcg/tcg.h
435 435
    const char *args_ct_str[TCG_MAX_OP_ARGS];
436 436
} TCGTargetOpDef;
437 437

  
438
void tcg_target_init(TCGContext *s);
439
void tcg_target_qemu_prologue(TCGContext *s);
440

  
441 438
#define tcg_abort() \
442 439
do {\
443 440
    fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
b/tcg/x86_64/tcg-target.c
1279 1279
}
1280 1280

  
1281 1281
/* Generate global QEMU prologue and epilogue code */
1282
void tcg_target_qemu_prologue(TCGContext *s)
1282
static void tcg_target_qemu_prologue(TCGContext *s)
1283 1283
{
1284 1284
    int i, frame_size, push_size, stack_addend;
1285 1285

  
......
1417 1417
    { -1 },
1418 1418
};
1419 1419

  
1420
void tcg_target_init(TCGContext *s)
1420
static void tcg_target_init(TCGContext *s)
1421 1421
{
1422 1422
#if !defined(CONFIG_USER_ONLY)
1423 1423
    /* fail safe */

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