Revision e58c8ba5 target-mips/helper.c

b/target-mips/helper.c
403 403 
            env->PC = (int32_t)(env->CP0_EBase & ~0x3ff);
404 404 
        }
405 405 
        env->PC += offset;
406 
        env->CP0_Cause = (env->CP0_Cause & ~0x7C) | (cause << 2);
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        env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC);
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        break;
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    default:
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        if (logfile) {

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