Revision e64d7d59 hw/eccmemctl.c
| b/hw/eccmemctl.c | ||
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#define ECC_NREGS 9 |
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#define ECC_SIZE (ECC_NREGS * sizeof(uint32_t)) |
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#define ECC_ADDR_MASK 0x1f |
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#define ECC_DIAG_SIZE 4 |
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#define ECC_DIAG_MASK (ECC_DIAG_SIZE - 1) |
| ... | ... | |
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{
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ECCState *s = opaque; |
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switch ((addr & ECC_ADDR_MASK) >> 2) {
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switch (addr >> 2) {
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case ECC_MER: |
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s->regs[ECC_MER] = (s->regs[ECC_MER] & (ECC_MER_VER | ECC_MER_IMPL)) | |
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(val & ~(ECC_MER_VER | ECC_MER_IMPL)); |
| ... | ... | |
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ECCState *s = opaque; |
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uint32_t ret = 0; |
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switch ((addr & ECC_ADDR_MASK) >> 2) {
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switch (addr >> 2) {
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case ECC_MER: |
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ret = s->regs[ECC_MER]; |
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DPRINTF("Read memory enable %08x\n", ret);
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| ... | ... | |
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{
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ECCState *s = opaque; |
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DPRINTF("Write diagnostic[%d] = %02x\n", (int)(addr & ECC_DIAG_MASK), val);
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DPRINTF("Write diagnostic[%d] = %02x\n", (int)addr, val);
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s->diag[addr & ECC_DIAG_MASK] = val; |
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} |
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static uint32_t ecc_diag_mem_readb(void *opaque, target_phys_addr_t addr) |
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{
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ECCState *s = opaque; |
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uint32_t ret = s->diag[addr & ECC_DIAG_MASK]; |
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DPRINTF("Read diagnostic[%d] = %02x\n", (int)(addr & ECC_DIAG_MASK), ret);
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uint32_t ret = s->diag[(int)addr]; |
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DPRINTF("Read diagnostic[%d] = %02x\n", (int)addr, ret);
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return ret; |
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} |
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