Revision e6a0575e
b/target-i386/cpu.h | ||
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256 | 256 |
#define MCE_CAP_DEF MCG_CTL_P |
257 | 257 |
#define MCE_BANKS_DEF 10 |
258 | 258 |
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#define MCG_STATUS_MCIP (1UL<<2) /* machine check in progress */ |
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#define MCG_STATUS_MCIP (1ULL<<2) /* machine check in progress */
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260 | 260 |
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#define MCI_STATUS_VAL (1UL<<63) /* valid error */ |
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#define MCI_STATUS_OVER (1UL<<62) /* previous errors lost */ |
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#define MCI_STATUS_UC (1UL<<61) /* uncorrected error */ |
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#define MCI_STATUS_VAL (1ULL<<63) /* valid error */
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#define MCI_STATUS_OVER (1ULL<<62) /* previous errors lost */
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#define MCI_STATUS_UC (1ULL<<61) /* uncorrected error */
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264 | 264 |
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265 | 265 |
#define MSR_IA32_TSC 0x10 |
266 | 266 |
#define MSR_IA32_APICBASE 0x1b |
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