Revision e6a0575e target-i386/cpu.h

b/target-i386/cpu.h
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#define MCE_CAP_DEF	MCG_CTL_P
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#define MCE_BANKS_DEF	10
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#define MCG_STATUS_MCIP	(1UL<<2)   /* machine check in progress */


  		





  
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#define MCG_STATUS_MCIP	(1ULL<<2)   /* machine check in progress */


  		





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#define MCI_STATUS_VAL	(1UL<<63)  /* valid error */


  		





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#define MCI_STATUS_OVER	(1UL<<62)  /* previous errors lost */


  		





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#define MCI_STATUS_UC	(1UL<<61)  /* uncorrected error */


  		





  
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#define MCI_STATUS_VAL	(1ULL<<63)  /* valid error */


  		





  
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#define MCI_STATUS_OVER	(1ULL<<62)  /* previous errors lost */


  		





  
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#define MCI_STATUS_UC	(1ULL<<61)  /* uncorrected error */


  		





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#define MSR_IA32_TSC                    0x10


  		





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#define MSR_IA32_APICBASE               0x1b


  		












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