Revision e6e5906b cpu-exec.c
b/cpu-exec.c | ||
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40 | 40 |
//#define DEBUG_EXEC |
41 | 41 |
//#define DEBUG_SIGNAL |
42 | 42 |
|
43 |
#if defined(TARGET_ARM) || defined(TARGET_SPARC) |
|
43 |
#if defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_M68K)
|
|
44 | 44 |
/* XXX: unify with i386 target */ |
45 | 45 |
void cpu_loop_exit(void) |
46 | 46 |
{ |
47 | 47 |
longjmp(env->jmp_env, 1); |
48 | 48 |
} |
49 | 49 |
#endif |
50 |
#if !(defined(TARGET_SPARC) || defined(TARGET_SH4)) |
|
50 |
#if !(defined(TARGET_SPARC) || defined(TARGET_SH4) || defined(TARGET_M68K))
|
|
51 | 51 |
#define reg_T2 |
52 | 52 |
#endif |
53 | 53 |
|
... | ... | |
194 | 194 |
flags = env->hflags & (MIPS_HFLAG_TMASK | MIPS_HFLAG_BMASK); |
195 | 195 |
cs_base = 0; |
196 | 196 |
pc = env->PC; |
197 |
#elif defined(TARGET_M68K) |
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flags = env->fpcr & M68K_FPCR_PREC; |
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cs_base = 0; |
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pc = env->pc; |
|
197 | 201 |
#elif defined(TARGET_SH4) |
198 | 202 |
flags = env->sr & (SR_MD | SR_RB); |
199 | 203 |
cs_base = 0; /* XXXXX */ |
... | ... | |
370 | 374 |
saved_regwptr = REGWPTR; |
371 | 375 |
#endif |
372 | 376 |
#elif defined(TARGET_PPC) |
377 |
#elif defined(TARGET_M68K) |
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env->cc_op = CC_OP_FLAGS; |
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env->cc_dest = env->sr & 0xf; |
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env->cc_x = (env->sr >> 4) & 1; |
|
373 | 381 |
#elif defined(TARGET_MIPS) |
374 | 382 |
#elif defined(TARGET_SH4) |
375 | 383 |
/* XXXXX */ |
... | ... | |
632 | 640 |
cpu_dump_state(env, logfile, fprintf, 0); |
633 | 641 |
#elif defined(TARGET_PPC) |
634 | 642 |
cpu_dump_state(env, logfile, fprintf, 0); |
643 |
#elif defined(TARGET_M68K) |
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cpu_m68k_flush_flags(env, env->cc_op); |
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env->cc_op = CC_OP_FLAGS; |
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env->sr = (env->sr & 0xffe0) |
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647 |
| env->cc_dest | (env->cc_x << 4); |
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648 |
cpu_dump_state(env, logfile, fprintf, 0); |
|
635 | 649 |
#elif defined(TARGET_MIPS) |
636 | 650 |
cpu_dump_state(env, logfile, fprintf, 0); |
637 | 651 |
#elif defined(TARGET_SH4) |
... | ... | |
846 | 860 |
REGWPTR = saved_regwptr; |
847 | 861 |
#endif |
848 | 862 |
#elif defined(TARGET_PPC) |
863 |
#elif defined(TARGET_M68K) |
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864 |
cpu_m68k_flush_flags(env, env->cc_op); |
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865 |
env->cc_op = CC_OP_FLAGS; |
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866 |
env->sr = (env->sr & 0xffe0) |
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867 |
| env->cc_dest | (env->cc_x << 4); |
|
849 | 868 |
#elif defined(TARGET_MIPS) |
850 | 869 |
#elif defined(TARGET_SH4) |
851 | 870 |
/* XXXXX */ |
... | ... | |
1103 | 1122 |
return 1; |
1104 | 1123 |
} |
1105 | 1124 |
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1125 |
#elif defined(TARGET_M68K) |
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1126 |
static inline int handle_cpu_signal(unsigned long pc, unsigned long address, |
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1127 |
int is_write, sigset_t *old_set, |
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1128 |
void *puc) |
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{ |
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1130 |
TranslationBlock *tb; |
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int ret; |
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1132 |
|
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1133 |
if (cpu_single_env) |
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1134 |
env = cpu_single_env; /* XXX: find a correct solution for multithread */ |
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1135 |
#if defined(DEBUG_SIGNAL) |
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printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", |
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pc, address, is_write, *(unsigned long *)old_set); |
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#endif |
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/* XXX: locking issue */ |
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1140 |
if (is_write && page_unprotect(address, pc, puc)) { |
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return 1; |
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1142 |
} |
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1143 |
/* see if it is an MMU fault */ |
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ret = cpu_m68k_handle_mmu_fault(env, address, is_write, 1, 0); |
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1145 |
if (ret < 0) |
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return 0; /* not an MMU fault */ |
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1147 |
if (ret == 0) |
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1148 |
return 1; /* the MMU fault was handled without causing real CPU fault */ |
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1149 |
/* now we have a real cpu fault */ |
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1150 |
tb = tb_find_pc(pc); |
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1151 |
if (tb) { |
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1152 |
/* the PC is inside the translated code. It means that we have |
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1153 |
a virtual CPU fault */ |
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1154 |
cpu_restore_state(tb, env, pc, puc); |
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1155 |
} |
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1156 |
/* we restore the process signal mask as the sigreturn should |
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1157 |
do it (XXX: use sigsetjmp) */ |
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1158 |
sigprocmask(SIG_SETMASK, old_set, NULL); |
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1159 |
cpu_loop_exit(); |
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1160 |
/* never comes here */ |
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1161 |
return 1; |
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1162 |
} |
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1163 |
|
|
1106 | 1164 |
#elif defined (TARGET_MIPS) |
1107 | 1165 |
static inline int handle_cpu_signal(unsigned long pc, unsigned long address, |
1108 | 1166 |
int is_write, sigset_t *old_set, |
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