Revision e856f2ad
| b/hw/omap1.c | ||
|---|---|---|
| 664 | 664 |
uint32_t val; |
| 665 | 665 |
int64_t time; |
| 666 | 666 |
QEMUTimer *timer; |
| 667 |
QEMUBH *tick; |
|
| 667 | 668 |
int64_t rate; |
| 668 | 669 |
int it_ena; |
| 669 | 670 |
|
| ... | ... | |
| 708 | 709 |
* ticks. */ |
| 709 | 710 |
if (expires > (ticks_per_sec >> 10) || timer->ar) |
| 710 | 711 |
qemu_mod_timer(timer->timer, timer->time + expires); |
| 711 |
else {
|
|
| 712 |
timer->val = 0; |
|
| 713 |
timer->st = 0; |
|
| 714 |
if (timer->it_ena) |
|
| 715 |
/* Edge-triggered irq */ |
|
| 716 |
qemu_irq_pulse(timer->irq); |
|
| 717 |
} |
|
| 712 |
else |
|
| 713 |
qemu_bh_schedule(timer->tick); |
|
| 718 | 714 |
} else |
| 719 | 715 |
qemu_del_timer(timer->timer); |
| 720 | 716 |
} |
| 721 | 717 |
|
| 722 |
static void omap_timer_tick(void *opaque)
|
|
| 718 |
static void omap_timer_fire(void *opaque)
|
|
| 723 | 719 |
{
|
| 724 |
struct omap_mpu_timer_s *timer = (struct omap_mpu_timer_s *) opaque; |
|
| 725 |
omap_timer_sync(timer); |
|
| 720 |
struct omap_mpu_timer_s *timer = opaque; |
|
| 726 | 721 |
|
| 727 | 722 |
if (!timer->ar) {
|
| 728 | 723 |
timer->val = 0; |
| ... | ... | |
| 732 | 727 |
if (timer->it_ena) |
| 733 | 728 |
/* Edge-triggered irq */ |
| 734 | 729 |
qemu_irq_pulse(timer->irq); |
| 730 |
} |
|
| 731 |
|
|
| 732 |
static void omap_timer_tick(void *opaque) |
|
| 733 |
{
|
|
| 734 |
struct omap_mpu_timer_s *timer = (struct omap_mpu_timer_s *) opaque; |
|
| 735 |
|
|
| 736 |
omap_timer_sync(timer); |
|
| 737 |
omap_timer_fire(timer); |
|
| 735 | 738 |
omap_timer_update(timer); |
| 736 | 739 |
} |
| 737 | 740 |
|
| ... | ... | |
| 835 | 838 |
s->clk = clk; |
| 836 | 839 |
s->base = base; |
| 837 | 840 |
s->timer = qemu_new_timer(vm_clock, omap_timer_tick, s); |
| 841 |
s->tick = qemu_bh_new(omap_timer_fire, s); |
|
| 838 | 842 |
omap_mpu_timer_reset(s); |
| 839 | 843 |
omap_timer_clk_setup(s); |
| 840 | 844 |
|
Also available in: Unified diff