Revision e8b36ba9 hw/sun4u.c

b/hw/sun4u.c
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{
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    isa_bus_new(&s->qdev);
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    pci_config_set_vendor_id(s->config, PCI_VENDOR_ID_SUN);
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    pci_config_set_device_id(s->config, PCI_DEVICE_ID_SUN_EBUS);
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    s->config[0x04] = 0x06; // command = bus master, pci mem
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    s->config[0x05] = 0x00;
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    s->config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no error
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    s->config[0x07] = 0x03; // status = medium devsel
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    s->config[0x08] = 0x01; // revision
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    s->config[0x09] = 0x00; // programming i/f
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    pci_config_set_class(s->config, PCI_CLASS_BRIDGE_OTHER);
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    s->config[0x0D] = 0x0a; // latency_timer
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    pci_register_bar(s, 0, 0x1000000, PCI_BASE_ADDRESS_SPACE_MEMORY,
......
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    .qdev.name = "ebus",
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    .qdev.size = sizeof(PCIDevice),
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    .init = pci_ebus_init1,
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    .vendor_id = PCI_VENDOR_ID_SUN,
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    .device_id = PCI_DEVICE_ID_SUN_EBUS,
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    .revision = 0x01,
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    .class_id = PCI_CLASS_BRIDGE_OTHER,
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};
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static void pci_ebus_register(void)

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