Revision e91c8a77 hw/ne2000.c

b/hw/ne2000.c
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        s->cmd = val;
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        if (!(val & E8390_STOP)) { /* START bit makes no sense on RTL8029... */
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            s->isr &= ~ENISR_RESET;
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            /* test specific case: zero length transfert */
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            /* test specific case: zero length transfer */
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            if ((val & (E8390_RREAD | E8390_RWRITE)) &&
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                s->rcnt == 0) {
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                s->isr |= ENISR_RDC;
......
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                if (index + s->tcnt <= NE2000_PMEM_END) {
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                    qemu_send_packet(s->vc, s->mem + index, s->tcnt);
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                }
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                /* signal end of transfert */
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                /* signal end of transfer */
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                s->tsr = ENTSR_PTX;
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                s->isr |= ENISR_TX;
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                s->cmd &= ~E8390_TRANS; 
......
550 550

  
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    if (s->rcnt <= len) {
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        s->rcnt = 0;
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        /* signal end of transfert */
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        /* signal end of transfer */
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        s->isr |= ENISR_RDC;
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        ne2000_update_irq(s);
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    } else {

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