Revision e927bb00 hw/tsc210x.c
| b/hw/tsc210x.c | ||
|---|---|---|
| 939 | 939 |
} |
| 940 | 940 |
} |
| 941 | 941 |
|
| 942 |
uint32_t tsc210x_txrx(void *opaque, uint32_t value) |
|
| 942 |
uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len)
|
|
| 943 | 943 |
{
|
| 944 | 944 |
struct tsc210x_state_s *s = opaque; |
| 945 | 945 |
uint32_t ret = 0; |
| 946 | 946 |
|
| 947 |
if (len != 16) |
|
| 948 |
cpu_abort(cpu_single_env, "%s: FIXME: bad SPI word width %i\n", |
|
| 949 |
__FUNCTION__, len); |
|
| 950 |
|
|
| 947 | 951 |
/* TODO: sequential reads etc - how do we make sure the host doesn't |
| 948 | 952 |
* unintentionally read out a conversion result from a register while |
| 949 | 953 |
* transmitting the command word of the next command? */ |
| ... | ... | |
| 1124 | 1128 |
|
| 1125 | 1129 |
s->tr[0] = 0; |
| 1126 | 1130 |
s->tr[1] = 1; |
| 1127 |
s->tr[2] = 0;
|
|
| 1128 |
s->tr[3] = 1;
|
|
| 1131 |
s->tr[2] = 1;
|
|
| 1132 |
s->tr[3] = 0;
|
|
| 1129 | 1133 |
s->tr[4] = 1; |
| 1130 | 1134 |
s->tr[5] = 0; |
| 1131 |
s->tr[6] = 0;
|
|
| 1132 |
s->tr[7] = 1;
|
|
| 1135 |
s->tr[6] = 1;
|
|
| 1136 |
s->tr[7] = 0;
|
|
| 1133 | 1137 |
|
| 1134 | 1138 |
s->chip.opaque = s; |
| 1135 | 1139 |
s->chip.send = (void *) tsc210x_write; |
| ... | ... | |
| 1178 | 1182 |
|
| 1179 | 1183 |
s->tr[0] = 0; |
| 1180 | 1184 |
s->tr[1] = 1; |
| 1181 |
s->tr[2] = 0;
|
|
| 1182 |
s->tr[3] = 1;
|
|
| 1185 |
s->tr[2] = 1;
|
|
| 1186 |
s->tr[3] = 0;
|
|
| 1183 | 1187 |
s->tr[4] = 1; |
| 1184 | 1188 |
s->tr[5] = 0; |
| 1185 |
s->tr[6] = 0;
|
|
| 1186 |
s->tr[7] = 1;
|
|
| 1189 |
s->tr[6] = 1;
|
|
| 1190 |
s->tr[7] = 0;
|
|
| 1187 | 1191 |
|
| 1188 | 1192 |
s->chip.opaque = s; |
| 1189 | 1193 |
s->chip.send = (void *) tsc210x_write; |
Also available in: Unified diff