root / hw / acpi_piix4.c @ e927d487
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1 | 93d89f63 | Isaku Yamahata | /*
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2 | 93d89f63 | Isaku Yamahata | * ACPI implementation
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3 | 93d89f63 | Isaku Yamahata | *
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4 | 93d89f63 | Isaku Yamahata | * Copyright (c) 2006 Fabrice Bellard
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5 | 93d89f63 | Isaku Yamahata | *
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6 | 93d89f63 | Isaku Yamahata | * This library is free software; you can redistribute it and/or
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7 | 93d89f63 | Isaku Yamahata | * modify it under the terms of the GNU Lesser General Public
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8 | 93d89f63 | Isaku Yamahata | * License version 2 as published by the Free Software Foundation.
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9 | 93d89f63 | Isaku Yamahata | *
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10 | 93d89f63 | Isaku Yamahata | * This library is distributed in the hope that it will be useful,
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11 | 93d89f63 | Isaku Yamahata | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 | 93d89f63 | Isaku Yamahata | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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13 | 93d89f63 | Isaku Yamahata | * Lesser General Public License for more details.
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14 | 93d89f63 | Isaku Yamahata | *
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15 | 93d89f63 | Isaku Yamahata | * You should have received a copy of the GNU Lesser General Public
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16 | 93d89f63 | Isaku Yamahata | * License along with this library; if not, see <http://www.gnu.org/licenses/>
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17 | 93d89f63 | Isaku Yamahata | */
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18 | 93d89f63 | Isaku Yamahata | #include "hw.h" |
19 | 93d89f63 | Isaku Yamahata | #include "pc.h" |
20 | 93d89f63 | Isaku Yamahata | #include "apm.h" |
21 | 93d89f63 | Isaku Yamahata | #include "pm_smbus.h" |
22 | 93d89f63 | Isaku Yamahata | #include "pci.h" |
23 | 93d89f63 | Isaku Yamahata | #include "acpi.h" |
24 | 666daa68 | Markus Armbruster | #include "sysemu.h" |
25 | bf1b0071 | Blue Swirl | #include "range.h" |
26 | 93d89f63 | Isaku Yamahata | |
27 | 93d89f63 | Isaku Yamahata | //#define DEBUG
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28 | 93d89f63 | Isaku Yamahata | |
29 | 50d8ff8b | Isaku Yamahata | #ifdef DEBUG
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30 | 50d8ff8b | Isaku Yamahata | # define PIIX4_DPRINTF(format, ...) printf(format, ## __VA_ARGS__) |
31 | 50d8ff8b | Isaku Yamahata | #else
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32 | 50d8ff8b | Isaku Yamahata | # define PIIX4_DPRINTF(format, ...) do { } while (0) |
33 | 50d8ff8b | Isaku Yamahata | #endif
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34 | 50d8ff8b | Isaku Yamahata | |
35 | 93d89f63 | Isaku Yamahata | #define ACPI_DBG_IO_ADDR 0xb044 |
36 | 93d89f63 | Isaku Yamahata | |
37 | ac404095 | Isaku Yamahata | #define GPE_BASE 0xafe0 |
38 | ac404095 | Isaku Yamahata | #define PCI_BASE 0xae00 |
39 | ac404095 | Isaku Yamahata | #define PCI_EJ_BASE 0xae08 |
40 | ac404095 | Isaku Yamahata | |
41 | 4441a287 | Gleb Natapov | #define PIIX4_PCI_HOTPLUG_STATUS 2 |
42 | 4441a287 | Gleb Natapov | |
43 | ac404095 | Isaku Yamahata | struct gpe_regs {
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44 | ac404095 | Isaku Yamahata | uint16_t sts; /* status */
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45 | ac404095 | Isaku Yamahata | uint16_t en; /* enabled */
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46 | ac404095 | Isaku Yamahata | }; |
47 | ac404095 | Isaku Yamahata | |
48 | ac404095 | Isaku Yamahata | struct pci_status {
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49 | ac404095 | Isaku Yamahata | uint32_t up; |
50 | ac404095 | Isaku Yamahata | uint32_t down; |
51 | ac404095 | Isaku Yamahata | }; |
52 | ac404095 | Isaku Yamahata | |
53 | 93d89f63 | Isaku Yamahata | typedef struct PIIX4PMState { |
54 | 93d89f63 | Isaku Yamahata | PCIDevice dev; |
55 | 93d89f63 | Isaku Yamahata | uint16_t pmsts; |
56 | 93d89f63 | Isaku Yamahata | uint16_t pmen; |
57 | 93d89f63 | Isaku Yamahata | uint16_t pmcntrl; |
58 | 93d89f63 | Isaku Yamahata | |
59 | 93d89f63 | Isaku Yamahata | APMState apm; |
60 | 93d89f63 | Isaku Yamahata | |
61 | 93d89f63 | Isaku Yamahata | QEMUTimer *tmr_timer; |
62 | 93d89f63 | Isaku Yamahata | int64_t tmr_overflow_time; |
63 | 93d89f63 | Isaku Yamahata | |
64 | 93d89f63 | Isaku Yamahata | PMSMBus smb; |
65 | e8ec0571 | Isaku Yamahata | uint32_t smb_io_base; |
66 | 93d89f63 | Isaku Yamahata | |
67 | 93d89f63 | Isaku Yamahata | qemu_irq irq; |
68 | 93d89f63 | Isaku Yamahata | qemu_irq cmos_s3; |
69 | 93d89f63 | Isaku Yamahata | qemu_irq smi_irq; |
70 | 93d89f63 | Isaku Yamahata | int kvm_enabled;
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71 | ac404095 | Isaku Yamahata | |
72 | ac404095 | Isaku Yamahata | /* for pci hotplug */
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73 | ac404095 | Isaku Yamahata | struct gpe_regs gpe;
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74 | ac404095 | Isaku Yamahata | struct pci_status pci0_status;
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75 | 93d89f63 | Isaku Yamahata | } PIIX4PMState; |
76 | 93d89f63 | Isaku Yamahata | |
77 | ac404095 | Isaku Yamahata | static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s); |
78 | ac404095 | Isaku Yamahata | |
79 | 93d89f63 | Isaku Yamahata | #define ACPI_ENABLE 0xf1 |
80 | 93d89f63 | Isaku Yamahata | #define ACPI_DISABLE 0xf0 |
81 | 93d89f63 | Isaku Yamahata | |
82 | 93d89f63 | Isaku Yamahata | static uint32_t get_pmtmr(PIIX4PMState *s)
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83 | 93d89f63 | Isaku Yamahata | { |
84 | 93d89f63 | Isaku Yamahata | uint32_t d; |
85 | 93d89f63 | Isaku Yamahata | d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, get_ticks_per_sec()); |
86 | 93d89f63 | Isaku Yamahata | return d & 0xffffff; |
87 | 93d89f63 | Isaku Yamahata | } |
88 | 93d89f63 | Isaku Yamahata | |
89 | 93d89f63 | Isaku Yamahata | static int get_pmsts(PIIX4PMState *s) |
90 | 93d89f63 | Isaku Yamahata | { |
91 | 93d89f63 | Isaku Yamahata | int64_t d; |
92 | 93d89f63 | Isaku Yamahata | |
93 | 93d89f63 | Isaku Yamahata | d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, |
94 | 93d89f63 | Isaku Yamahata | get_ticks_per_sec()); |
95 | 93d89f63 | Isaku Yamahata | if (d >= s->tmr_overflow_time)
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96 | 93d89f63 | Isaku Yamahata | s->pmsts |= ACPI_BITMASK_TIMER_STATUS; |
97 | 93d89f63 | Isaku Yamahata | return s->pmsts;
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98 | 93d89f63 | Isaku Yamahata | } |
99 | 93d89f63 | Isaku Yamahata | |
100 | 93d89f63 | Isaku Yamahata | static void pm_update_sci(PIIX4PMState *s) |
101 | 93d89f63 | Isaku Yamahata | { |
102 | 93d89f63 | Isaku Yamahata | int sci_level, pmsts;
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103 | 93d89f63 | Isaku Yamahata | int64_t expire_time; |
104 | 93d89f63 | Isaku Yamahata | |
105 | 93d89f63 | Isaku Yamahata | pmsts = get_pmsts(s); |
106 | 93d89f63 | Isaku Yamahata | sci_level = (((pmsts & s->pmen) & |
107 | 93d89f63 | Isaku Yamahata | (ACPI_BITMASK_RT_CLOCK_ENABLE | |
108 | 93d89f63 | Isaku Yamahata | ACPI_BITMASK_POWER_BUTTON_ENABLE | |
109 | 93d89f63 | Isaku Yamahata | ACPI_BITMASK_GLOBAL_LOCK_ENABLE | |
110 | 633aa0ac | Gleb Natapov | ACPI_BITMASK_TIMER_ENABLE)) != 0) ||
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111 | 633aa0ac | Gleb Natapov | (((s->gpe.sts & s->gpe.en) & PIIX4_PCI_HOTPLUG_STATUS) != 0);
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112 | 633aa0ac | Gleb Natapov | |
113 | 93d89f63 | Isaku Yamahata | qemu_set_irq(s->irq, sci_level); |
114 | 93d89f63 | Isaku Yamahata | /* schedule a timer interruption if needed */
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115 | 93d89f63 | Isaku Yamahata | if ((s->pmen & ACPI_BITMASK_TIMER_ENABLE) &&
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116 | 93d89f63 | Isaku Yamahata | !(pmsts & ACPI_BITMASK_TIMER_STATUS)) { |
117 | 93d89f63 | Isaku Yamahata | expire_time = muldiv64(s->tmr_overflow_time, get_ticks_per_sec(), |
118 | 93d89f63 | Isaku Yamahata | PM_TIMER_FREQUENCY); |
119 | 93d89f63 | Isaku Yamahata | qemu_mod_timer(s->tmr_timer, expire_time); |
120 | 93d89f63 | Isaku Yamahata | } else {
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121 | 93d89f63 | Isaku Yamahata | qemu_del_timer(s->tmr_timer); |
122 | 93d89f63 | Isaku Yamahata | } |
123 | 93d89f63 | Isaku Yamahata | } |
124 | 93d89f63 | Isaku Yamahata | |
125 | 93d89f63 | Isaku Yamahata | static void pm_tmr_timer(void *opaque) |
126 | 93d89f63 | Isaku Yamahata | { |
127 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = opaque; |
128 | 93d89f63 | Isaku Yamahata | pm_update_sci(s); |
129 | 93d89f63 | Isaku Yamahata | } |
130 | 93d89f63 | Isaku Yamahata | |
131 | 93d89f63 | Isaku Yamahata | static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val) |
132 | 93d89f63 | Isaku Yamahata | { |
133 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = opaque; |
134 | 93d89f63 | Isaku Yamahata | addr &= 0x3f;
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135 | 93d89f63 | Isaku Yamahata | switch(addr) {
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136 | 93d89f63 | Isaku Yamahata | case 0x00: |
137 | 93d89f63 | Isaku Yamahata | { |
138 | 93d89f63 | Isaku Yamahata | int64_t d; |
139 | 93d89f63 | Isaku Yamahata | int pmsts;
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140 | 93d89f63 | Isaku Yamahata | pmsts = get_pmsts(s); |
141 | 93d89f63 | Isaku Yamahata | if (pmsts & val & ACPI_BITMASK_TIMER_STATUS) {
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142 | 93d89f63 | Isaku Yamahata | /* if TMRSTS is reset, then compute the new overflow time */
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143 | 93d89f63 | Isaku Yamahata | d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, |
144 | 93d89f63 | Isaku Yamahata | get_ticks_per_sec()); |
145 | 93d89f63 | Isaku Yamahata | s->tmr_overflow_time = (d + 0x800000LL) & ~0x7fffffLL; |
146 | 93d89f63 | Isaku Yamahata | } |
147 | 93d89f63 | Isaku Yamahata | s->pmsts &= ~val; |
148 | 93d89f63 | Isaku Yamahata | pm_update_sci(s); |
149 | 93d89f63 | Isaku Yamahata | } |
150 | 93d89f63 | Isaku Yamahata | break;
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151 | 93d89f63 | Isaku Yamahata | case 0x02: |
152 | 93d89f63 | Isaku Yamahata | s->pmen = val; |
153 | 93d89f63 | Isaku Yamahata | pm_update_sci(s); |
154 | 93d89f63 | Isaku Yamahata | break;
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155 | 93d89f63 | Isaku Yamahata | case 0x04: |
156 | 93d89f63 | Isaku Yamahata | { |
157 | 93d89f63 | Isaku Yamahata | int sus_typ;
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158 | 93d89f63 | Isaku Yamahata | s->pmcntrl = val & ~(ACPI_BITMASK_SLEEP_ENABLE); |
159 | 93d89f63 | Isaku Yamahata | if (val & ACPI_BITMASK_SLEEP_ENABLE) {
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160 | 93d89f63 | Isaku Yamahata | /* change suspend type */
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161 | 93d89f63 | Isaku Yamahata | sus_typ = (val >> 10) & 7; |
162 | 93d89f63 | Isaku Yamahata | switch(sus_typ) {
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163 | 93d89f63 | Isaku Yamahata | case 0: /* soft power off */ |
164 | 93d89f63 | Isaku Yamahata | qemu_system_shutdown_request(); |
165 | 93d89f63 | Isaku Yamahata | break;
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166 | 93d89f63 | Isaku Yamahata | case 1: |
167 | 93d89f63 | Isaku Yamahata | /* ACPI_BITMASK_WAKE_STATUS should be set on resume.
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168 | 93d89f63 | Isaku Yamahata | Pretend that resume was caused by power button */
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169 | 93d89f63 | Isaku Yamahata | s->pmsts |= (ACPI_BITMASK_WAKE_STATUS | |
170 | 93d89f63 | Isaku Yamahata | ACPI_BITMASK_POWER_BUTTON_STATUS); |
171 | 93d89f63 | Isaku Yamahata | qemu_system_reset_request(); |
172 | 93d89f63 | Isaku Yamahata | if (s->cmos_s3) {
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173 | 93d89f63 | Isaku Yamahata | qemu_irq_raise(s->cmos_s3); |
174 | 93d89f63 | Isaku Yamahata | } |
175 | 93d89f63 | Isaku Yamahata | default:
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176 | 93d89f63 | Isaku Yamahata | break;
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177 | 93d89f63 | Isaku Yamahata | } |
178 | 93d89f63 | Isaku Yamahata | } |
179 | 93d89f63 | Isaku Yamahata | } |
180 | 93d89f63 | Isaku Yamahata | break;
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181 | 93d89f63 | Isaku Yamahata | default:
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182 | 93d89f63 | Isaku Yamahata | break;
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183 | 93d89f63 | Isaku Yamahata | } |
184 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("PM writew port=0x%04x val=0x%04x\n", addr, val);
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185 | 93d89f63 | Isaku Yamahata | } |
186 | 93d89f63 | Isaku Yamahata | |
187 | 93d89f63 | Isaku Yamahata | static uint32_t pm_ioport_readw(void *opaque, uint32_t addr) |
188 | 93d89f63 | Isaku Yamahata | { |
189 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = opaque; |
190 | 93d89f63 | Isaku Yamahata | uint32_t val; |
191 | 93d89f63 | Isaku Yamahata | |
192 | 93d89f63 | Isaku Yamahata | addr &= 0x3f;
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193 | 93d89f63 | Isaku Yamahata | switch(addr) {
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194 | 93d89f63 | Isaku Yamahata | case 0x00: |
195 | 93d89f63 | Isaku Yamahata | val = get_pmsts(s); |
196 | 93d89f63 | Isaku Yamahata | break;
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197 | 93d89f63 | Isaku Yamahata | case 0x02: |
198 | 93d89f63 | Isaku Yamahata | val = s->pmen; |
199 | 93d89f63 | Isaku Yamahata | break;
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200 | 93d89f63 | Isaku Yamahata | case 0x04: |
201 | 93d89f63 | Isaku Yamahata | val = s->pmcntrl; |
202 | 93d89f63 | Isaku Yamahata | break;
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203 | 93d89f63 | Isaku Yamahata | default:
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204 | 93d89f63 | Isaku Yamahata | val = 0;
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205 | 93d89f63 | Isaku Yamahata | break;
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206 | 93d89f63 | Isaku Yamahata | } |
207 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("PM readw port=0x%04x val=0x%04x\n", addr, val);
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208 | 93d89f63 | Isaku Yamahata | return val;
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209 | 93d89f63 | Isaku Yamahata | } |
210 | 93d89f63 | Isaku Yamahata | |
211 | 93d89f63 | Isaku Yamahata | static void pm_ioport_writel(void *opaque, uint32_t addr, uint32_t val) |
212 | 93d89f63 | Isaku Yamahata | { |
213 | 93d89f63 | Isaku Yamahata | // PIIX4PMState *s = opaque;
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214 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("PM writel port=0x%04x val=0x%08x\n", addr & 0x3f, val); |
215 | 93d89f63 | Isaku Yamahata | } |
216 | 93d89f63 | Isaku Yamahata | |
217 | 93d89f63 | Isaku Yamahata | static uint32_t pm_ioport_readl(void *opaque, uint32_t addr) |
218 | 93d89f63 | Isaku Yamahata | { |
219 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = opaque; |
220 | 93d89f63 | Isaku Yamahata | uint32_t val; |
221 | 93d89f63 | Isaku Yamahata | |
222 | 93d89f63 | Isaku Yamahata | addr &= 0x3f;
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223 | 93d89f63 | Isaku Yamahata | switch(addr) {
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224 | 93d89f63 | Isaku Yamahata | case 0x08: |
225 | 93d89f63 | Isaku Yamahata | val = get_pmtmr(s); |
226 | 93d89f63 | Isaku Yamahata | break;
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227 | 93d89f63 | Isaku Yamahata | default:
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228 | 93d89f63 | Isaku Yamahata | val = 0;
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229 | 93d89f63 | Isaku Yamahata | break;
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230 | 93d89f63 | Isaku Yamahata | } |
231 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("PM readl port=0x%04x val=0x%08x\n", addr, val);
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232 | 93d89f63 | Isaku Yamahata | return val;
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233 | 93d89f63 | Isaku Yamahata | } |
234 | 93d89f63 | Isaku Yamahata | |
235 | 93d89f63 | Isaku Yamahata | static void apm_ctrl_changed(uint32_t val, void *arg) |
236 | 93d89f63 | Isaku Yamahata | { |
237 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = arg; |
238 | 93d89f63 | Isaku Yamahata | |
239 | 93d89f63 | Isaku Yamahata | /* ACPI specs 3.0, 4.7.2.5 */
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240 | 93d89f63 | Isaku Yamahata | if (val == ACPI_ENABLE) {
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241 | 93d89f63 | Isaku Yamahata | s->pmcntrl |= ACPI_BITMASK_SCI_ENABLE; |
242 | 93d89f63 | Isaku Yamahata | } else if (val == ACPI_DISABLE) { |
243 | 93d89f63 | Isaku Yamahata | s->pmcntrl &= ~ACPI_BITMASK_SCI_ENABLE; |
244 | 93d89f63 | Isaku Yamahata | } |
245 | 93d89f63 | Isaku Yamahata | |
246 | 93d89f63 | Isaku Yamahata | if (s->dev.config[0x5b] & (1 << 1)) { |
247 | 93d89f63 | Isaku Yamahata | if (s->smi_irq) {
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248 | 93d89f63 | Isaku Yamahata | qemu_irq_raise(s->smi_irq); |
249 | 93d89f63 | Isaku Yamahata | } |
250 | 93d89f63 | Isaku Yamahata | } |
251 | 93d89f63 | Isaku Yamahata | } |
252 | 93d89f63 | Isaku Yamahata | |
253 | 93d89f63 | Isaku Yamahata | static void acpi_dbg_writel(void *opaque, uint32_t addr, uint32_t val) |
254 | 93d89f63 | Isaku Yamahata | { |
255 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("ACPI: DBG: 0x%08x\n", val);
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256 | 93d89f63 | Isaku Yamahata | } |
257 | 93d89f63 | Isaku Yamahata | |
258 | 93d89f63 | Isaku Yamahata | static void pm_io_space_update(PIIX4PMState *s) |
259 | 93d89f63 | Isaku Yamahata | { |
260 | 93d89f63 | Isaku Yamahata | uint32_t pm_io_base; |
261 | 93d89f63 | Isaku Yamahata | |
262 | 93d89f63 | Isaku Yamahata | if (s->dev.config[0x80] & 1) { |
263 | 93d89f63 | Isaku Yamahata | pm_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x40));
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264 | 93d89f63 | Isaku Yamahata | pm_io_base &= 0xffc0;
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265 | 93d89f63 | Isaku Yamahata | |
266 | 93d89f63 | Isaku Yamahata | /* XXX: need to improve memory and ioport allocation */
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267 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("PM: mapping to 0x%x\n", pm_io_base);
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268 | 93d89f63 | Isaku Yamahata | register_ioport_write(pm_io_base, 64, 2, pm_ioport_writew, s); |
269 | 93d89f63 | Isaku Yamahata | register_ioport_read(pm_io_base, 64, 2, pm_ioport_readw, s); |
270 | 93d89f63 | Isaku Yamahata | register_ioport_write(pm_io_base, 64, 4, pm_ioport_writel, s); |
271 | 93d89f63 | Isaku Yamahata | register_ioport_read(pm_io_base, 64, 4, pm_ioport_readl, s); |
272 | 93d89f63 | Isaku Yamahata | } |
273 | 93d89f63 | Isaku Yamahata | } |
274 | 93d89f63 | Isaku Yamahata | |
275 | 93d89f63 | Isaku Yamahata | static void pm_write_config(PCIDevice *d, |
276 | 93d89f63 | Isaku Yamahata | uint32_t address, uint32_t val, int len)
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277 | 93d89f63 | Isaku Yamahata | { |
278 | 93d89f63 | Isaku Yamahata | pci_default_write_config(d, address, val, len); |
279 | 93d89f63 | Isaku Yamahata | if (range_covers_byte(address, len, 0x80)) |
280 | 93d89f63 | Isaku Yamahata | pm_io_space_update((PIIX4PMState *)d); |
281 | 93d89f63 | Isaku Yamahata | } |
282 | 93d89f63 | Isaku Yamahata | |
283 | 93d89f63 | Isaku Yamahata | static int vmstate_acpi_post_load(void *opaque, int version_id) |
284 | 93d89f63 | Isaku Yamahata | { |
285 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = opaque; |
286 | 93d89f63 | Isaku Yamahata | |
287 | 93d89f63 | Isaku Yamahata | pm_io_space_update(s); |
288 | 93d89f63 | Isaku Yamahata | return 0; |
289 | 93d89f63 | Isaku Yamahata | } |
290 | 93d89f63 | Isaku Yamahata | |
291 | 4cf3e6f3 | Alex Williamson | static const VMStateDescription vmstate_gpe = { |
292 | 4cf3e6f3 | Alex Williamson | .name = "gpe",
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293 | 4cf3e6f3 | Alex Williamson | .version_id = 1,
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294 | 4cf3e6f3 | Alex Williamson | .minimum_version_id = 1,
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295 | 4cf3e6f3 | Alex Williamson | .minimum_version_id_old = 1,
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296 | 4cf3e6f3 | Alex Williamson | .fields = (VMStateField []) { |
297 | 4cf3e6f3 | Alex Williamson | VMSTATE_UINT16(sts, struct gpe_regs),
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298 | 4cf3e6f3 | Alex Williamson | VMSTATE_UINT16(en, struct gpe_regs),
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299 | 4cf3e6f3 | Alex Williamson | VMSTATE_END_OF_LIST() |
300 | 4cf3e6f3 | Alex Williamson | } |
301 | 4cf3e6f3 | Alex Williamson | }; |
302 | 4cf3e6f3 | Alex Williamson | |
303 | 4cf3e6f3 | Alex Williamson | static const VMStateDescription vmstate_pci_status = { |
304 | 4cf3e6f3 | Alex Williamson | .name = "pci_status",
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305 | 4cf3e6f3 | Alex Williamson | .version_id = 1,
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306 | 4cf3e6f3 | Alex Williamson | .minimum_version_id = 1,
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307 | 4cf3e6f3 | Alex Williamson | .minimum_version_id_old = 1,
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308 | 4cf3e6f3 | Alex Williamson | .fields = (VMStateField []) { |
309 | 4cf3e6f3 | Alex Williamson | VMSTATE_UINT32(up, struct pci_status),
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310 | 4cf3e6f3 | Alex Williamson | VMSTATE_UINT32(down, struct pci_status),
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311 | 4cf3e6f3 | Alex Williamson | VMSTATE_END_OF_LIST() |
312 | 4cf3e6f3 | Alex Williamson | } |
313 | 4cf3e6f3 | Alex Williamson | }; |
314 | 4cf3e6f3 | Alex Williamson | |
315 | 93d89f63 | Isaku Yamahata | static const VMStateDescription vmstate_acpi = { |
316 | 93d89f63 | Isaku Yamahata | .name = "piix4_pm",
|
317 | 4cf3e6f3 | Alex Williamson | .version_id = 2,
|
318 | 93d89f63 | Isaku Yamahata | .minimum_version_id = 1,
|
319 | 93d89f63 | Isaku Yamahata | .minimum_version_id_old = 1,
|
320 | 93d89f63 | Isaku Yamahata | .post_load = vmstate_acpi_post_load, |
321 | 93d89f63 | Isaku Yamahata | .fields = (VMStateField []) { |
322 | 93d89f63 | Isaku Yamahata | VMSTATE_PCI_DEVICE(dev, PIIX4PMState), |
323 | 93d89f63 | Isaku Yamahata | VMSTATE_UINT16(pmsts, PIIX4PMState), |
324 | 93d89f63 | Isaku Yamahata | VMSTATE_UINT16(pmen, PIIX4PMState), |
325 | 93d89f63 | Isaku Yamahata | VMSTATE_UINT16(pmcntrl, PIIX4PMState), |
326 | 93d89f63 | Isaku Yamahata | VMSTATE_STRUCT(apm, PIIX4PMState, 0, vmstate_apm, APMState),
|
327 | 93d89f63 | Isaku Yamahata | VMSTATE_TIMER(tmr_timer, PIIX4PMState), |
328 | 93d89f63 | Isaku Yamahata | VMSTATE_INT64(tmr_overflow_time, PIIX4PMState), |
329 | 4cf3e6f3 | Alex Williamson | VMSTATE_STRUCT(gpe, PIIX4PMState, 2, vmstate_gpe, struct gpe_regs), |
330 | 4cf3e6f3 | Alex Williamson | VMSTATE_STRUCT(pci0_status, PIIX4PMState, 2, vmstate_pci_status,
|
331 | 4cf3e6f3 | Alex Williamson | struct pci_status),
|
332 | 93d89f63 | Isaku Yamahata | VMSTATE_END_OF_LIST() |
333 | 93d89f63 | Isaku Yamahata | } |
334 | 93d89f63 | Isaku Yamahata | }; |
335 | 93d89f63 | Isaku Yamahata | |
336 | 93d89f63 | Isaku Yamahata | static void piix4_reset(void *opaque) |
337 | 93d89f63 | Isaku Yamahata | { |
338 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = opaque; |
339 | 93d89f63 | Isaku Yamahata | uint8_t *pci_conf = s->dev.config; |
340 | 93d89f63 | Isaku Yamahata | |
341 | 93d89f63 | Isaku Yamahata | pci_conf[0x58] = 0; |
342 | 93d89f63 | Isaku Yamahata | pci_conf[0x59] = 0; |
343 | 93d89f63 | Isaku Yamahata | pci_conf[0x5a] = 0; |
344 | 93d89f63 | Isaku Yamahata | pci_conf[0x5b] = 0; |
345 | 93d89f63 | Isaku Yamahata | |
346 | 93d89f63 | Isaku Yamahata | if (s->kvm_enabled) {
|
347 | 93d89f63 | Isaku Yamahata | /* Mark SMM as already inited (until KVM supports SMM). */
|
348 | 93d89f63 | Isaku Yamahata | pci_conf[0x5B] = 0x02; |
349 | 93d89f63 | Isaku Yamahata | } |
350 | 93d89f63 | Isaku Yamahata | } |
351 | 93d89f63 | Isaku Yamahata | |
352 | 93d89f63 | Isaku Yamahata | static void piix4_powerdown(void *opaque, int irq, int power_failing) |
353 | 93d89f63 | Isaku Yamahata | { |
354 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = opaque; |
355 | 93d89f63 | Isaku Yamahata | |
356 | 93d89f63 | Isaku Yamahata | if (!s) {
|
357 | 93d89f63 | Isaku Yamahata | qemu_system_shutdown_request(); |
358 | 93d89f63 | Isaku Yamahata | } else if (s->pmen & ACPI_BITMASK_POWER_BUTTON_ENABLE) { |
359 | 93d89f63 | Isaku Yamahata | s->pmsts |= ACPI_BITMASK_POWER_BUTTON_STATUS; |
360 | 93d89f63 | Isaku Yamahata | pm_update_sci(s); |
361 | 93d89f63 | Isaku Yamahata | } |
362 | 93d89f63 | Isaku Yamahata | } |
363 | 93d89f63 | Isaku Yamahata | |
364 | e8ec0571 | Isaku Yamahata | static int piix4_pm_initfn(PCIDevice *dev) |
365 | 93d89f63 | Isaku Yamahata | { |
366 | e8ec0571 | Isaku Yamahata | PIIX4PMState *s = DO_UPCAST(PIIX4PMState, dev, dev); |
367 | 93d89f63 | Isaku Yamahata | uint8_t *pci_conf; |
368 | 93d89f63 | Isaku Yamahata | |
369 | 93d89f63 | Isaku Yamahata | pci_conf = s->dev.config; |
370 | 93d89f63 | Isaku Yamahata | pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); |
371 | 93d89f63 | Isaku Yamahata | pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_3); |
372 | 93d89f63 | Isaku Yamahata | pci_conf[0x06] = 0x80; |
373 | 93d89f63 | Isaku Yamahata | pci_conf[0x07] = 0x02; |
374 | 93d89f63 | Isaku Yamahata | pci_conf[0x08] = 0x03; // revision number |
375 | 93d89f63 | Isaku Yamahata | pci_conf[0x09] = 0x00; |
376 | 93d89f63 | Isaku Yamahata | pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER); |
377 | 93d89f63 | Isaku Yamahata | pci_conf[0x3d] = 0x01; // interrupt pin 1 |
378 | 93d89f63 | Isaku Yamahata | |
379 | 93d89f63 | Isaku Yamahata | pci_conf[0x40] = 0x01; /* PM io base read only bit */ |
380 | 93d89f63 | Isaku Yamahata | |
381 | 93d89f63 | Isaku Yamahata | /* APM */
|
382 | 93d89f63 | Isaku Yamahata | apm_init(&s->apm, apm_ctrl_changed, s); |
383 | 93d89f63 | Isaku Yamahata | |
384 | 93d89f63 | Isaku Yamahata | register_ioport_write(ACPI_DBG_IO_ADDR, 4, 4, acpi_dbg_writel, s); |
385 | 93d89f63 | Isaku Yamahata | |
386 | 93d89f63 | Isaku Yamahata | if (s->kvm_enabled) {
|
387 | 93d89f63 | Isaku Yamahata | /* Mark SMM as already inited to prevent SMM from running. KVM does not
|
388 | 93d89f63 | Isaku Yamahata | * support SMM mode. */
|
389 | 93d89f63 | Isaku Yamahata | pci_conf[0x5B] = 0x02; |
390 | 93d89f63 | Isaku Yamahata | } |
391 | 93d89f63 | Isaku Yamahata | |
392 | 93d89f63 | Isaku Yamahata | /* XXX: which specification is used ? The i82731AB has different
|
393 | 93d89f63 | Isaku Yamahata | mappings */
|
394 | 93d89f63 | Isaku Yamahata | pci_conf[0x5f] = (parallel_hds[0] != NULL ? 0x80 : 0) | 0x10; |
395 | 93d89f63 | Isaku Yamahata | pci_conf[0x63] = 0x60; |
396 | 93d89f63 | Isaku Yamahata | pci_conf[0x67] = (serial_hds[0] != NULL ? 0x08 : 0) | |
397 | 93d89f63 | Isaku Yamahata | (serial_hds[1] != NULL ? 0x90 : 0); |
398 | 93d89f63 | Isaku Yamahata | |
399 | e8ec0571 | Isaku Yamahata | pci_conf[0x90] = s->smb_io_base | 1; |
400 | e8ec0571 | Isaku Yamahata | pci_conf[0x91] = s->smb_io_base >> 8; |
401 | 93d89f63 | Isaku Yamahata | pci_conf[0xd2] = 0x09; |
402 | e8ec0571 | Isaku Yamahata | register_ioport_write(s->smb_io_base, 64, 1, smb_ioport_writeb, &s->smb); |
403 | e8ec0571 | Isaku Yamahata | register_ioport_read(s->smb_io_base, 64, 1, smb_ioport_readb, &s->smb); |
404 | 93d89f63 | Isaku Yamahata | |
405 | 93d89f63 | Isaku Yamahata | s->tmr_timer = qemu_new_timer(vm_clock, pm_tmr_timer, s); |
406 | 93d89f63 | Isaku Yamahata | |
407 | 93d89f63 | Isaku Yamahata | qemu_system_powerdown = *qemu_allocate_irqs(piix4_powerdown, s, 1);
|
408 | 93d89f63 | Isaku Yamahata | |
409 | e8ec0571 | Isaku Yamahata | pm_smbus_init(&s->dev.qdev, &s->smb); |
410 | e8ec0571 | Isaku Yamahata | qemu_register_reset(piix4_reset, s); |
411 | ac404095 | Isaku Yamahata | piix4_acpi_system_hot_add_init(dev->bus, s); |
412 | e8ec0571 | Isaku Yamahata | |
413 | e8ec0571 | Isaku Yamahata | return 0; |
414 | e8ec0571 | Isaku Yamahata | } |
415 | e8ec0571 | Isaku Yamahata | |
416 | e8ec0571 | Isaku Yamahata | i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
|
417 | e8ec0571 | Isaku Yamahata | qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq, |
418 | e8ec0571 | Isaku Yamahata | int kvm_enabled)
|
419 | e8ec0571 | Isaku Yamahata | { |
420 | e8ec0571 | Isaku Yamahata | PCIDevice *dev; |
421 | e8ec0571 | Isaku Yamahata | PIIX4PMState *s; |
422 | e8ec0571 | Isaku Yamahata | |
423 | e8ec0571 | Isaku Yamahata | dev = pci_create(bus, devfn, "PIIX4_PM");
|
424 | e8ec0571 | Isaku Yamahata | qdev_prop_set_uint32(&dev->qdev, "smb_io_base", smb_io_base);
|
425 | 93d89f63 | Isaku Yamahata | |
426 | e8ec0571 | Isaku Yamahata | s = DO_UPCAST(PIIX4PMState, dev, dev); |
427 | 93d89f63 | Isaku Yamahata | s->irq = sci_irq; |
428 | 93d89f63 | Isaku Yamahata | s->cmos_s3 = cmos_s3; |
429 | 93d89f63 | Isaku Yamahata | s->smi_irq = smi_irq; |
430 | e8ec0571 | Isaku Yamahata | s->kvm_enabled = kvm_enabled; |
431 | e8ec0571 | Isaku Yamahata | |
432 | e8ec0571 | Isaku Yamahata | qdev_init_nofail(&dev->qdev); |
433 | 93d89f63 | Isaku Yamahata | |
434 | 93d89f63 | Isaku Yamahata | return s->smb.smbus;
|
435 | 93d89f63 | Isaku Yamahata | } |
436 | 93d89f63 | Isaku Yamahata | |
437 | e8ec0571 | Isaku Yamahata | static PCIDeviceInfo piix4_pm_info = {
|
438 | e8ec0571 | Isaku Yamahata | .qdev.name = "PIIX4_PM",
|
439 | e8ec0571 | Isaku Yamahata | .qdev.desc = "PM",
|
440 | e8ec0571 | Isaku Yamahata | .qdev.size = sizeof(PIIX4PMState),
|
441 | e8ec0571 | Isaku Yamahata | .qdev.vmsd = &vmstate_acpi, |
442 | e8ec0571 | Isaku Yamahata | .init = piix4_pm_initfn, |
443 | e8ec0571 | Isaku Yamahata | .config_write = pm_write_config, |
444 | e8ec0571 | Isaku Yamahata | .qdev.props = (Property[]) { |
445 | e8ec0571 | Isaku Yamahata | DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState, smb_io_base, 0), |
446 | e8ec0571 | Isaku Yamahata | DEFINE_PROP_END_OF_LIST(), |
447 | e8ec0571 | Isaku Yamahata | } |
448 | e8ec0571 | Isaku Yamahata | }; |
449 | e8ec0571 | Isaku Yamahata | |
450 | e8ec0571 | Isaku Yamahata | static void piix4_pm_register(void) |
451 | e8ec0571 | Isaku Yamahata | { |
452 | e8ec0571 | Isaku Yamahata | pci_qdev_register(&piix4_pm_info); |
453 | e8ec0571 | Isaku Yamahata | } |
454 | e8ec0571 | Isaku Yamahata | |
455 | e8ec0571 | Isaku Yamahata | device_init(piix4_pm_register); |
456 | e8ec0571 | Isaku Yamahata | |
457 | 93d89f63 | Isaku Yamahata | static uint32_t gpe_read_val(uint16_t val, uint32_t addr)
|
458 | 93d89f63 | Isaku Yamahata | { |
459 | 93d89f63 | Isaku Yamahata | if (addr & 1) |
460 | 93d89f63 | Isaku Yamahata | return (val >> 8) & 0xff; |
461 | 93d89f63 | Isaku Yamahata | return val & 0xff; |
462 | 93d89f63 | Isaku Yamahata | } |
463 | 93d89f63 | Isaku Yamahata | |
464 | 93d89f63 | Isaku Yamahata | static uint32_t gpe_readb(void *opaque, uint32_t addr) |
465 | 93d89f63 | Isaku Yamahata | { |
466 | 93d89f63 | Isaku Yamahata | uint32_t val = 0;
|
467 | 633aa0ac | Gleb Natapov | PIIX4PMState *s = opaque; |
468 | 633aa0ac | Gleb Natapov | struct gpe_regs *g = &s->gpe;
|
469 | 633aa0ac | Gleb Natapov | |
470 | 93d89f63 | Isaku Yamahata | switch (addr) {
|
471 | 93d89f63 | Isaku Yamahata | case GPE_BASE:
|
472 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 1: |
473 | 93d89f63 | Isaku Yamahata | val = gpe_read_val(g->sts, addr); |
474 | 93d89f63 | Isaku Yamahata | break;
|
475 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 2: |
476 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 3: |
477 | 93d89f63 | Isaku Yamahata | val = gpe_read_val(g->en, addr); |
478 | 93d89f63 | Isaku Yamahata | break;
|
479 | 93d89f63 | Isaku Yamahata | default:
|
480 | 93d89f63 | Isaku Yamahata | break;
|
481 | 93d89f63 | Isaku Yamahata | } |
482 | 93d89f63 | Isaku Yamahata | |
483 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("gpe read %x == %x\n", addr, val);
|
484 | 93d89f63 | Isaku Yamahata | return val;
|
485 | 93d89f63 | Isaku Yamahata | } |
486 | 93d89f63 | Isaku Yamahata | |
487 | 93d89f63 | Isaku Yamahata | static void gpe_write_val(uint16_t *cur, int addr, uint32_t val) |
488 | 93d89f63 | Isaku Yamahata | { |
489 | 93d89f63 | Isaku Yamahata | if (addr & 1) |
490 | 93d89f63 | Isaku Yamahata | *cur = (*cur & 0xff) | (val << 8); |
491 | 93d89f63 | Isaku Yamahata | else
|
492 | 93d89f63 | Isaku Yamahata | *cur = (*cur & 0xff00) | (val & 0xff); |
493 | 93d89f63 | Isaku Yamahata | } |
494 | 93d89f63 | Isaku Yamahata | |
495 | 93d89f63 | Isaku Yamahata | static void gpe_reset_val(uint16_t *cur, int addr, uint32_t val) |
496 | 93d89f63 | Isaku Yamahata | { |
497 | 93d89f63 | Isaku Yamahata | uint16_t x1, x0 = val & 0xff;
|
498 | 93d89f63 | Isaku Yamahata | int shift = (addr & 1) ? 8 : 0; |
499 | 93d89f63 | Isaku Yamahata | |
500 | 93d89f63 | Isaku Yamahata | x1 = (*cur >> shift) & 0xff;
|
501 | 93d89f63 | Isaku Yamahata | |
502 | 93d89f63 | Isaku Yamahata | x1 = x1 & ~x0; |
503 | 93d89f63 | Isaku Yamahata | |
504 | 93d89f63 | Isaku Yamahata | *cur = (*cur & (0xff << (8 - shift))) | (x1 << shift); |
505 | 93d89f63 | Isaku Yamahata | } |
506 | 93d89f63 | Isaku Yamahata | |
507 | 93d89f63 | Isaku Yamahata | static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val) |
508 | 93d89f63 | Isaku Yamahata | { |
509 | 633aa0ac | Gleb Natapov | PIIX4PMState *s = opaque; |
510 | 633aa0ac | Gleb Natapov | struct gpe_regs *g = &s->gpe;
|
511 | 633aa0ac | Gleb Natapov | |
512 | 93d89f63 | Isaku Yamahata | switch (addr) {
|
513 | 93d89f63 | Isaku Yamahata | case GPE_BASE:
|
514 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 1: |
515 | 93d89f63 | Isaku Yamahata | gpe_reset_val(&g->sts, addr, val); |
516 | 93d89f63 | Isaku Yamahata | break;
|
517 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 2: |
518 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 3: |
519 | 93d89f63 | Isaku Yamahata | gpe_write_val(&g->en, addr, val); |
520 | 93d89f63 | Isaku Yamahata | break;
|
521 | 93d89f63 | Isaku Yamahata | default:
|
522 | 93d89f63 | Isaku Yamahata | break;
|
523 | 633aa0ac | Gleb Natapov | } |
524 | 633aa0ac | Gleb Natapov | |
525 | 633aa0ac | Gleb Natapov | pm_update_sci(s); |
526 | 93d89f63 | Isaku Yamahata | |
527 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("gpe write %x <== %d\n", addr, val);
|
528 | 93d89f63 | Isaku Yamahata | } |
529 | 93d89f63 | Isaku Yamahata | |
530 | 93d89f63 | Isaku Yamahata | static uint32_t pcihotplug_read(void *opaque, uint32_t addr) |
531 | 93d89f63 | Isaku Yamahata | { |
532 | 93d89f63 | Isaku Yamahata | uint32_t val = 0;
|
533 | 93d89f63 | Isaku Yamahata | struct pci_status *g = opaque;
|
534 | 93d89f63 | Isaku Yamahata | switch (addr) {
|
535 | 93d89f63 | Isaku Yamahata | case PCI_BASE:
|
536 | 93d89f63 | Isaku Yamahata | val = g->up; |
537 | 93d89f63 | Isaku Yamahata | break;
|
538 | 93d89f63 | Isaku Yamahata | case PCI_BASE + 4: |
539 | 93d89f63 | Isaku Yamahata | val = g->down; |
540 | 93d89f63 | Isaku Yamahata | break;
|
541 | 93d89f63 | Isaku Yamahata | default:
|
542 | 93d89f63 | Isaku Yamahata | break;
|
543 | 93d89f63 | Isaku Yamahata | } |
544 | 93d89f63 | Isaku Yamahata | |
545 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("pcihotplug read %x == %x\n", addr, val);
|
546 | 93d89f63 | Isaku Yamahata | return val;
|
547 | 93d89f63 | Isaku Yamahata | } |
548 | 93d89f63 | Isaku Yamahata | |
549 | 93d89f63 | Isaku Yamahata | static void pcihotplug_write(void *opaque, uint32_t addr, uint32_t val) |
550 | 93d89f63 | Isaku Yamahata | { |
551 | 93d89f63 | Isaku Yamahata | struct pci_status *g = opaque;
|
552 | 93d89f63 | Isaku Yamahata | switch (addr) {
|
553 | 93d89f63 | Isaku Yamahata | case PCI_BASE:
|
554 | 93d89f63 | Isaku Yamahata | g->up = val; |
555 | 93d89f63 | Isaku Yamahata | break;
|
556 | 93d89f63 | Isaku Yamahata | case PCI_BASE + 4: |
557 | 93d89f63 | Isaku Yamahata | g->down = val; |
558 | 93d89f63 | Isaku Yamahata | break;
|
559 | 93d89f63 | Isaku Yamahata | } |
560 | 93d89f63 | Isaku Yamahata | |
561 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("pcihotplug write %x <== %d\n", addr, val);
|
562 | 93d89f63 | Isaku Yamahata | } |
563 | 93d89f63 | Isaku Yamahata | |
564 | 93d89f63 | Isaku Yamahata | static uint32_t pciej_read(void *opaque, uint32_t addr) |
565 | 93d89f63 | Isaku Yamahata | { |
566 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("pciej read %x\n", addr);
|
567 | 93d89f63 | Isaku Yamahata | return 0; |
568 | 93d89f63 | Isaku Yamahata | } |
569 | 93d89f63 | Isaku Yamahata | |
570 | 93d89f63 | Isaku Yamahata | static void pciej_write(void *opaque, uint32_t addr, uint32_t val) |
571 | 93d89f63 | Isaku Yamahata | { |
572 | 93d89f63 | Isaku Yamahata | BusState *bus = opaque; |
573 | 93d89f63 | Isaku Yamahata | DeviceState *qdev, *next; |
574 | 93d89f63 | Isaku Yamahata | PCIDevice *dev; |
575 | 93d89f63 | Isaku Yamahata | int slot = ffs(val) - 1; |
576 | 93d89f63 | Isaku Yamahata | |
577 | 93d89f63 | Isaku Yamahata | QLIST_FOREACH_SAFE(qdev, &bus->children, sibling, next) { |
578 | 93d89f63 | Isaku Yamahata | dev = DO_UPCAST(PCIDevice, qdev, qdev); |
579 | 93d89f63 | Isaku Yamahata | if (PCI_SLOT(dev->devfn) == slot) {
|
580 | 93d89f63 | Isaku Yamahata | qdev_free(qdev); |
581 | 93d89f63 | Isaku Yamahata | } |
582 | 93d89f63 | Isaku Yamahata | } |
583 | 93d89f63 | Isaku Yamahata | |
584 | 93d89f63 | Isaku Yamahata | |
585 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("pciej write %x <== %d\n", addr, val);
|
586 | 93d89f63 | Isaku Yamahata | } |
587 | 93d89f63 | Isaku Yamahata | |
588 | e927d487 | Michael S. Tsirkin | static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, |
589 | e927d487 | Michael S. Tsirkin | PCIHotplugState state); |
590 | 93d89f63 | Isaku Yamahata | |
591 | ac404095 | Isaku Yamahata | static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) |
592 | 93d89f63 | Isaku Yamahata | { |
593 | ac404095 | Isaku Yamahata | struct pci_status *pci0_status = &s->pci0_status;
|
594 | 93d89f63 | Isaku Yamahata | |
595 | 633aa0ac | Gleb Natapov | register_ioport_write(GPE_BASE, 4, 1, gpe_writeb, s); |
596 | 633aa0ac | Gleb Natapov | register_ioport_read(GPE_BASE, 4, 1, gpe_readb, s); |
597 | ac404095 | Isaku Yamahata | |
598 | ac404095 | Isaku Yamahata | register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, pci0_status); |
599 | ac404095 | Isaku Yamahata | register_ioport_read(PCI_BASE, 8, 4, pcihotplug_read, pci0_status); |
600 | 93d89f63 | Isaku Yamahata | |
601 | 93d89f63 | Isaku Yamahata | register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, bus); |
602 | 93d89f63 | Isaku Yamahata | register_ioport_read(PCI_EJ_BASE, 4, 4, pciej_read, bus); |
603 | 93d89f63 | Isaku Yamahata | |
604 | ac404095 | Isaku Yamahata | pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev); |
605 | 93d89f63 | Isaku Yamahata | } |
606 | 93d89f63 | Isaku Yamahata | |
607 | ac404095 | Isaku Yamahata | static void enable_device(PIIX4PMState *s, int slot) |
608 | 93d89f63 | Isaku Yamahata | { |
609 | 4441a287 | Gleb Natapov | s->gpe.sts |= PIIX4_PCI_HOTPLUG_STATUS; |
610 | ac404095 | Isaku Yamahata | s->pci0_status.up |= (1 << slot);
|
611 | 93d89f63 | Isaku Yamahata | } |
612 | 93d89f63 | Isaku Yamahata | |
613 | ac404095 | Isaku Yamahata | static void disable_device(PIIX4PMState *s, int slot) |
614 | 93d89f63 | Isaku Yamahata | { |
615 | 4441a287 | Gleb Natapov | s->gpe.sts |= PIIX4_PCI_HOTPLUG_STATUS; |
616 | ac404095 | Isaku Yamahata | s->pci0_status.down |= (1 << slot);
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617 | 93d89f63 | Isaku Yamahata | } |
618 | 93d89f63 | Isaku Yamahata | |
619 | e927d487 | Michael S. Tsirkin | static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, |
620 | e927d487 | Michael S. Tsirkin | PCIHotplugState state) |
621 | 93d89f63 | Isaku Yamahata | { |
622 | 93d89f63 | Isaku Yamahata | int slot = PCI_SLOT(dev->devfn);
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623 | ac404095 | Isaku Yamahata | PIIX4PMState *s = DO_UPCAST(PIIX4PMState, dev, |
624 | ac404095 | Isaku Yamahata | DO_UPCAST(PCIDevice, qdev, qdev)); |
625 | 93d89f63 | Isaku Yamahata | |
626 | e927d487 | Michael S. Tsirkin | /* Don't send event when device is enabled during qemu machine creation:
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627 | e927d487 | Michael S. Tsirkin | * it is present on boot, no hotplug event is necessary. We do send an
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628 | e927d487 | Michael S. Tsirkin | * event when the device is disabled later. */
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629 | e927d487 | Michael S. Tsirkin | if (state == PCI_COLDPLUG_ENABLED) {
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630 | 5beb8ad5 | Isaku Yamahata | return 0; |
631 | e927d487 | Michael S. Tsirkin | } |
632 | 5beb8ad5 | Isaku Yamahata | |
633 | ac404095 | Isaku Yamahata | s->pci0_status.up = 0;
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634 | ac404095 | Isaku Yamahata | s->pci0_status.down = 0;
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635 | e927d487 | Michael S. Tsirkin | if (state == PCI_HOTPLUG_ENABLED) {
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636 | ac404095 | Isaku Yamahata | enable_device(s, slot); |
637 | ac404095 | Isaku Yamahata | } else {
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638 | ac404095 | Isaku Yamahata | disable_device(s, slot); |
639 | ac404095 | Isaku Yamahata | } |
640 | 633aa0ac | Gleb Natapov | |
641 | 633aa0ac | Gleb Natapov | pm_update_sci(s); |
642 | 633aa0ac | Gleb Natapov | |
643 | 93d89f63 | Isaku Yamahata | return 0; |
644 | 93d89f63 | Isaku Yamahata | } |