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1 | fc01f7e7 | bellard | /*
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2 | fc01f7e7 | bellard | * QEMU System Emulator header
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3 | fc01f7e7 | bellard | *
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4 | fc01f7e7 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | fc01f7e7 | bellard | *
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6 | fc01f7e7 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | fc01f7e7 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | fc01f7e7 | bellard | * in the Software without restriction, including without limitation the rights
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9 | fc01f7e7 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | fc01f7e7 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | fc01f7e7 | bellard | * furnished to do so, subject to the following conditions:
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12 | fc01f7e7 | bellard | *
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13 | fc01f7e7 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | fc01f7e7 | bellard | * all copies or substantial portions of the Software.
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15 | fc01f7e7 | bellard | *
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16 | fc01f7e7 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | fc01f7e7 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | fc01f7e7 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | fc01f7e7 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | fc01f7e7 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | fc01f7e7 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | fc01f7e7 | bellard | * THE SOFTWARE.
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23 | fc01f7e7 | bellard | */
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24 | fc01f7e7 | bellard | #ifndef VL_H
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25 | fc01f7e7 | bellard | #define VL_H
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26 | fc01f7e7 | bellard | |
27 | 67b915a5 | bellard | /* we put basic includes here to avoid repeating them in device drivers */
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28 | 67b915a5 | bellard | #include <stdlib.h> |
29 | 67b915a5 | bellard | #include <stdio.h> |
30 | 67b915a5 | bellard | #include <stdarg.h> |
31 | 67b915a5 | bellard | #include <string.h> |
32 | 67b915a5 | bellard | #include <inttypes.h> |
33 | 85571bc7 | bellard | #include <limits.h> |
34 | 8a7ddc38 | bellard | #include <time.h> |
35 | 67b915a5 | bellard | #include <ctype.h> |
36 | 67b915a5 | bellard | #include <errno.h> |
37 | 67b915a5 | bellard | #include <unistd.h> |
38 | 67b915a5 | bellard | #include <fcntl.h> |
39 | 7d3505c5 | bellard | #include <sys/stat.h> |
40 | 67b915a5 | bellard | |
41 | 67b915a5 | bellard | #ifndef O_LARGEFILE
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42 | 67b915a5 | bellard | #define O_LARGEFILE 0 |
43 | 67b915a5 | bellard | #endif
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44 | 40c3bac3 | bellard | #ifndef O_BINARY
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45 | 40c3bac3 | bellard | #define O_BINARY 0 |
46 | 40c3bac3 | bellard | #endif
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47 | 67b915a5 | bellard | |
48 | 71c2fd5c | ths | #ifndef ENOMEDIUM
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49 | 71c2fd5c | ths | #define ENOMEDIUM ENODEV
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50 | 71c2fd5c | ths | #endif
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51 | 2e9671da | ths | |
52 | 67b915a5 | bellard | #ifdef _WIN32
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53 | a18e524a | bellard | #include <windows.h> |
54 | ac62f715 | pbrook | #define fsync _commit
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55 | 57d1a2b6 | bellard | #define lseek _lseeki64
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56 | 57d1a2b6 | bellard | #define ENOTSUP 4096 |
57 | beac80cd | bellard | extern int qemu_ftruncate64(int, int64_t); |
58 | beac80cd | bellard | #define ftruncate qemu_ftruncate64
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59 | beac80cd | bellard | |
60 | 57d1a2b6 | bellard | |
61 | 57d1a2b6 | bellard | static inline char *realpath(const char *path, char *resolved_path) |
62 | 57d1a2b6 | bellard | { |
63 | 57d1a2b6 | bellard | _fullpath(resolved_path, path, _MAX_PATH); |
64 | 57d1a2b6 | bellard | return resolved_path;
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65 | 57d1a2b6 | bellard | } |
66 | ec3757de | bellard | |
67 | ec3757de | bellard | #define PRId64 "I64d" |
68 | 26a76461 | bellard | #define PRIx64 "I64x" |
69 | 26a76461 | bellard | #define PRIu64 "I64u" |
70 | 26a76461 | bellard | #define PRIo64 "I64o" |
71 | 67b915a5 | bellard | #endif
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72 | 8a7ddc38 | bellard | |
73 | ea2384d3 | bellard | #ifdef QEMU_TOOL
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74 | ea2384d3 | bellard | |
75 | ea2384d3 | bellard | /* we use QEMU_TOOL in the command line tools which do not depend on
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76 | ea2384d3 | bellard | the target CPU type */
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77 | ea2384d3 | bellard | #include "config-host.h" |
78 | ea2384d3 | bellard | #include <setjmp.h> |
79 | ea2384d3 | bellard | #include "osdep.h" |
80 | ea2384d3 | bellard | #include "bswap.h" |
81 | ea2384d3 | bellard | |
82 | ea2384d3 | bellard | #else
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83 | ea2384d3 | bellard | |
84 | 4f209290 | pbrook | #include "audio/audio.h" |
85 | 16f62432 | bellard | #include "cpu.h" |
86 | 16f62432 | bellard | |
87 | ea2384d3 | bellard | #endif /* !defined(QEMU_TOOL) */ |
88 | ea2384d3 | bellard | |
89 | 67b915a5 | bellard | #ifndef glue
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90 | 67b915a5 | bellard | #define xglue(x, y) x ## y |
91 | 67b915a5 | bellard | #define glue(x, y) xglue(x, y)
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92 | 67b915a5 | bellard | #define stringify(s) tostring(s)
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93 | 67b915a5 | bellard | #define tostring(s) #s |
94 | 67b915a5 | bellard | #endif
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95 | 67b915a5 | bellard | |
96 | 24236869 | bellard | #ifndef MIN
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97 | 24236869 | bellard | #define MIN(a, b) (((a) < (b)) ? (a) : (b))
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98 | 24236869 | bellard | #endif
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99 | 24236869 | bellard | #ifndef MAX
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100 | 24236869 | bellard | #define MAX(a, b) (((a) > (b)) ? (a) : (b))
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101 | 24236869 | bellard | #endif
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102 | 24236869 | bellard | |
103 | 18607dcb | bellard | /* cutils.c */
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104 | 18607dcb | bellard | void pstrcpy(char *buf, int buf_size, const char *str); |
105 | 18607dcb | bellard | char *pstrcat(char *buf, int buf_size, const char *s); |
106 | 18607dcb | bellard | int strstart(const char *str, const char *val, const char **ptr); |
107 | 18607dcb | bellard | int stristart(const char *str, const char *val, const char **ptr); |
108 | 18607dcb | bellard | |
109 | 33e3963e | bellard | /* vl.c */
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110 | 80cabfad | bellard | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
111 | 313aa567 | bellard | |
112 | 80cabfad | bellard | void hw_error(const char *fmt, ...); |
113 | 80cabfad | bellard | |
114 | 80cabfad | bellard | extern const char *bios_dir; |
115 | 80cabfad | bellard | |
116 | 8a7ddc38 | bellard | extern int vm_running; |
117 | c35734b2 | ths | extern const char *qemu_name; |
118 | 8a7ddc38 | bellard | |
119 | 0bd48850 | bellard | typedef struct vm_change_state_entry VMChangeStateEntry; |
120 | 0bd48850 | bellard | typedef void VMChangeStateHandler(void *opaque, int running); |
121 | 8a7ddc38 | bellard | typedef void VMStopHandler(void *opaque, int reason); |
122 | 8a7ddc38 | bellard | |
123 | 0bd48850 | bellard | VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, |
124 | 0bd48850 | bellard | void *opaque);
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125 | 0bd48850 | bellard | void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
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126 | 0bd48850 | bellard | |
127 | 8a7ddc38 | bellard | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
128 | 8a7ddc38 | bellard | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); |
129 | 8a7ddc38 | bellard | |
130 | 8a7ddc38 | bellard | void vm_start(void); |
131 | 8a7ddc38 | bellard | void vm_stop(int reason); |
132 | 8a7ddc38 | bellard | |
133 | bb0c6722 | bellard | typedef void QEMUResetHandler(void *opaque); |
134 | bb0c6722 | bellard | |
135 | bb0c6722 | bellard | void qemu_register_reset(QEMUResetHandler *func, void *opaque); |
136 | bb0c6722 | bellard | void qemu_system_reset_request(void); |
137 | bb0c6722 | bellard | void qemu_system_shutdown_request(void); |
138 | 3475187d | bellard | void qemu_system_powerdown_request(void); |
139 | 3475187d | bellard | #if !defined(TARGET_SPARC)
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140 | 3475187d | bellard | // Please implement a power failure function to signal the OS
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141 | 3475187d | bellard | #define qemu_system_powerdown() do{}while(0) |
142 | 3475187d | bellard | #else
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143 | 3475187d | bellard | void qemu_system_powerdown(void); |
144 | 3475187d | bellard | #endif
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145 | bb0c6722 | bellard | |
146 | ea2384d3 | bellard | void main_loop_wait(int timeout); |
147 | ea2384d3 | bellard | |
148 | 0ced6589 | bellard | extern int ram_size; |
149 | 0ced6589 | bellard | extern int bios_size; |
150 | ee22c2f7 | bellard | extern int rtc_utc; |
151 | 1f04275e | bellard | extern int cirrus_vga_enabled; |
152 | d34cab9f | ths | extern int vmsvga_enabled; |
153 | 28b9b5af | bellard | extern int graphic_width; |
154 | 28b9b5af | bellard | extern int graphic_height; |
155 | 28b9b5af | bellard | extern int graphic_depth; |
156 | 3d11d0eb | bellard | extern const char *keyboard_layout; |
157 | d993e026 | bellard | extern int kqemu_allowed; |
158 | a09db21f | bellard | extern int win2k_install_hack; |
159 | bb36d470 | bellard | extern int usb_enabled; |
160 | 6a00d601 | bellard | extern int smp_cpus; |
161 | 667accab | ths | extern int no_quit; |
162 | 8e71621f | pbrook | extern int semihosting_enabled; |
163 | 3c07f8e8 | pbrook | extern int autostart; |
164 | 47d5d01a | ths | extern const char *bootp_filename; |
165 | 0ced6589 | bellard | |
166 | 9ae02555 | ths | #define MAX_OPTION_ROMS 16 |
167 | 9ae02555 | ths | extern const char *option_rom[MAX_OPTION_ROMS]; |
168 | 9ae02555 | ths | extern int nb_option_roms; |
169 | 9ae02555 | ths | |
170 | 0ced6589 | bellard | /* XXX: make it dynamic */
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171 | 970ac5a3 | bellard | #define MAX_BIOS_SIZE (4 * 1024 * 1024) |
172 | 75956cf0 | pbrook | #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
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173 | d5295253 | bellard | #define BIOS_SIZE ((512 + 32) * 1024) |
174 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
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175 | 567daa49 | ths | #define BIOS_SIZE (4 * 1024 * 1024) |
176 | 0ced6589 | bellard | #endif
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177 | aaaa7df6 | bellard | |
178 | 63066f4f | bellard | /* keyboard/mouse support */
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179 | 63066f4f | bellard | |
180 | 63066f4f | bellard | #define MOUSE_EVENT_LBUTTON 0x01 |
181 | 63066f4f | bellard | #define MOUSE_EVENT_RBUTTON 0x02 |
182 | 63066f4f | bellard | #define MOUSE_EVENT_MBUTTON 0x04 |
183 | 63066f4f | bellard | |
184 | 63066f4f | bellard | typedef void QEMUPutKBDEvent(void *opaque, int keycode); |
185 | 63066f4f | bellard | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); |
186 | 63066f4f | bellard | |
187 | 455204eb | ths | typedef struct QEMUPutMouseEntry { |
188 | 455204eb | ths | QEMUPutMouseEvent *qemu_put_mouse_event; |
189 | 455204eb | ths | void *qemu_put_mouse_event_opaque;
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190 | 455204eb | ths | int qemu_put_mouse_event_absolute;
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191 | 455204eb | ths | char *qemu_put_mouse_event_name;
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192 | 455204eb | ths | |
193 | 455204eb | ths | /* used internally by qemu for handling mice */
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194 | 455204eb | ths | struct QEMUPutMouseEntry *next;
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195 | 455204eb | ths | } QEMUPutMouseEntry; |
196 | 455204eb | ths | |
197 | 63066f4f | bellard | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); |
198 | 455204eb | ths | QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, |
199 | 455204eb | ths | void *opaque, int absolute, |
200 | 455204eb | ths | const char *name); |
201 | 455204eb | ths | void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
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202 | 63066f4f | bellard | |
203 | 63066f4f | bellard | void kbd_put_keycode(int keycode); |
204 | 63066f4f | bellard | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); |
205 | 09b26c5e | bellard | int kbd_mouse_is_absolute(void); |
206 | 63066f4f | bellard | |
207 | 455204eb | ths | void do_info_mice(void); |
208 | 455204eb | ths | void do_mouse_set(int index); |
209 | 455204eb | ths | |
210 | 82c643ff | bellard | /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
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211 | 82c643ff | bellard | constants) */
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212 | 82c643ff | bellard | #define QEMU_KEY_ESC1(c) ((c) | 0xe100) |
213 | 82c643ff | bellard | #define QEMU_KEY_BACKSPACE 0x007f |
214 | 82c643ff | bellard | #define QEMU_KEY_UP QEMU_KEY_ESC1('A') |
215 | 82c643ff | bellard | #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') |
216 | 82c643ff | bellard | #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') |
217 | 82c643ff | bellard | #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') |
218 | 82c643ff | bellard | #define QEMU_KEY_HOME QEMU_KEY_ESC1(1) |
219 | 82c643ff | bellard | #define QEMU_KEY_END QEMU_KEY_ESC1(4) |
220 | 82c643ff | bellard | #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) |
221 | 82c643ff | bellard | #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) |
222 | 82c643ff | bellard | #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) |
223 | 82c643ff | bellard | |
224 | 82c643ff | bellard | #define QEMU_KEY_CTRL_UP 0xe400 |
225 | 82c643ff | bellard | #define QEMU_KEY_CTRL_DOWN 0xe401 |
226 | 82c643ff | bellard | #define QEMU_KEY_CTRL_LEFT 0xe402 |
227 | 82c643ff | bellard | #define QEMU_KEY_CTRL_RIGHT 0xe403 |
228 | 82c643ff | bellard | #define QEMU_KEY_CTRL_HOME 0xe404 |
229 | 82c643ff | bellard | #define QEMU_KEY_CTRL_END 0xe405 |
230 | 82c643ff | bellard | #define QEMU_KEY_CTRL_PAGEUP 0xe406 |
231 | 82c643ff | bellard | #define QEMU_KEY_CTRL_PAGEDOWN 0xe407 |
232 | 82c643ff | bellard | |
233 | 82c643ff | bellard | void kbd_put_keysym(int keysym); |
234 | 82c643ff | bellard | |
235 | c20709aa | bellard | /* async I/O support */
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236 | c20709aa | bellard | |
237 | c20709aa | bellard | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); |
238 | c20709aa | bellard | typedef int IOCanRWHandler(void *opaque); |
239 | 7c9d8e07 | bellard | typedef void IOHandler(void *opaque); |
240 | c20709aa | bellard | |
241 | 7c9d8e07 | bellard | int qemu_set_fd_handler2(int fd, |
242 | 7c9d8e07 | bellard | IOCanRWHandler *fd_read_poll, |
243 | 7c9d8e07 | bellard | IOHandler *fd_read, |
244 | 7c9d8e07 | bellard | IOHandler *fd_write, |
245 | 7c9d8e07 | bellard | void *opaque);
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246 | 7c9d8e07 | bellard | int qemu_set_fd_handler(int fd, |
247 | 7c9d8e07 | bellard | IOHandler *fd_read, |
248 | 7c9d8e07 | bellard | IOHandler *fd_write, |
249 | 7c9d8e07 | bellard | void *opaque);
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250 | c20709aa | bellard | |
251 | f331110f | bellard | /* Polling handling */
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252 | f331110f | bellard | |
253 | f331110f | bellard | /* return TRUE if no sleep should be done afterwards */
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254 | f331110f | bellard | typedef int PollingFunc(void *opaque); |
255 | f331110f | bellard | |
256 | f331110f | bellard | int qemu_add_polling_cb(PollingFunc *func, void *opaque); |
257 | f331110f | bellard | void qemu_del_polling_cb(PollingFunc *func, void *opaque); |
258 | f331110f | bellard | |
259 | a18e524a | bellard | #ifdef _WIN32
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260 | a18e524a | bellard | /* Wait objects handling */
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261 | a18e524a | bellard | typedef void WaitObjectFunc(void *opaque); |
262 | a18e524a | bellard | |
263 | a18e524a | bellard | int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); |
264 | a18e524a | bellard | void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); |
265 | a18e524a | bellard | #endif
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266 | a18e524a | bellard | |
267 | 86e94dea | ths | typedef struct QEMUBH QEMUBH; |
268 | 86e94dea | ths | |
269 | 82c643ff | bellard | /* character device */
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270 | 82c643ff | bellard | |
271 | 82c643ff | bellard | #define CHR_EVENT_BREAK 0 /* serial break char */ |
272 | ea2384d3 | bellard | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
273 | 86e94dea | ths | #define CHR_EVENT_RESET 2 /* new connection established */ |
274 | 2122c51a | bellard | |
275 | 2122c51a | bellard | |
276 | 2122c51a | bellard | #define CHR_IOCTL_SERIAL_SET_PARAMS 1 |
277 | 2122c51a | bellard | typedef struct { |
278 | 2122c51a | bellard | int speed;
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279 | 2122c51a | bellard | int parity;
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280 | 2122c51a | bellard | int data_bits;
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281 | 2122c51a | bellard | int stop_bits;
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282 | 2122c51a | bellard | } QEMUSerialSetParams; |
283 | 2122c51a | bellard | |
284 | 2122c51a | bellard | #define CHR_IOCTL_SERIAL_SET_BREAK 2 |
285 | 2122c51a | bellard | |
286 | 2122c51a | bellard | #define CHR_IOCTL_PP_READ_DATA 3 |
287 | 2122c51a | bellard | #define CHR_IOCTL_PP_WRITE_DATA 4 |
288 | 2122c51a | bellard | #define CHR_IOCTL_PP_READ_CONTROL 5 |
289 | 2122c51a | bellard | #define CHR_IOCTL_PP_WRITE_CONTROL 6 |
290 | 2122c51a | bellard | #define CHR_IOCTL_PP_READ_STATUS 7 |
291 | 5867c88a | ths | #define CHR_IOCTL_PP_EPP_READ_ADDR 8 |
292 | 5867c88a | ths | #define CHR_IOCTL_PP_EPP_READ 9 |
293 | 5867c88a | ths | #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10 |
294 | 5867c88a | ths | #define CHR_IOCTL_PP_EPP_WRITE 11 |
295 | 2122c51a | bellard | |
296 | 82c643ff | bellard | typedef void IOEventHandler(void *opaque, int event); |
297 | 82c643ff | bellard | |
298 | 82c643ff | bellard | typedef struct CharDriverState { |
299 | 82c643ff | bellard | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); |
300 | e5b0bc44 | pbrook | void (*chr_update_read_handler)(struct CharDriverState *s); |
301 | 2122c51a | bellard | int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); |
302 | 82c643ff | bellard | IOEventHandler *chr_event; |
303 | e5b0bc44 | pbrook | IOCanRWHandler *chr_can_read; |
304 | e5b0bc44 | pbrook | IOReadHandler *chr_read; |
305 | e5b0bc44 | pbrook | void *handler_opaque;
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306 | eb45f5fe | bellard | void (*chr_send_event)(struct CharDriverState *chr, int event); |
307 | f331110f | bellard | void (*chr_close)(struct CharDriverState *chr); |
308 | 82c643ff | bellard | void *opaque;
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309 | 20d8a3ed | ths | int focus;
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310 | 86e94dea | ths | QEMUBH *bh; |
311 | 82c643ff | bellard | } CharDriverState; |
312 | 82c643ff | bellard | |
313 | 5856de80 | ths | CharDriverState *qemu_chr_open(const char *filename); |
314 | 82c643ff | bellard | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); |
315 | 82c643ff | bellard | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); |
316 | ea2384d3 | bellard | void qemu_chr_send_event(CharDriverState *s, int event); |
317 | e5b0bc44 | pbrook | void qemu_chr_add_handlers(CharDriverState *s,
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318 | e5b0bc44 | pbrook | IOCanRWHandler *fd_can_read, |
319 | e5b0bc44 | pbrook | IOReadHandler *fd_read, |
320 | e5b0bc44 | pbrook | IOEventHandler *fd_event, |
321 | e5b0bc44 | pbrook | void *opaque);
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322 | 2122c51a | bellard | int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); |
323 | 86e94dea | ths | void qemu_chr_reset(CharDriverState *s);
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324 | e5b0bc44 | pbrook | int qemu_chr_can_read(CharDriverState *s);
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325 | e5b0bc44 | pbrook | void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len); |
326 | f8d179e3 | bellard | |
327 | 82c643ff | bellard | /* consoles */
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328 | 82c643ff | bellard | |
329 | 82c643ff | bellard | typedef struct DisplayState DisplayState; |
330 | 82c643ff | bellard | typedef struct TextConsole TextConsole; |
331 | 82c643ff | bellard | |
332 | 95219897 | pbrook | typedef void (*vga_hw_update_ptr)(void *); |
333 | 95219897 | pbrook | typedef void (*vga_hw_invalidate_ptr)(void *); |
334 | 95219897 | pbrook | typedef void (*vga_hw_screen_dump_ptr)(void *, const char *); |
335 | 95219897 | pbrook | |
336 | 95219897 | pbrook | TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update, |
337 | 95219897 | pbrook | vga_hw_invalidate_ptr invalidate, |
338 | 95219897 | pbrook | vga_hw_screen_dump_ptr screen_dump, |
339 | 95219897 | pbrook | void *opaque);
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340 | 95219897 | pbrook | void vga_hw_update(void); |
341 | 95219897 | pbrook | void vga_hw_invalidate(void); |
342 | 95219897 | pbrook | void vga_hw_screen_dump(const char *filename); |
343 | 95219897 | pbrook | |
344 | 95219897 | pbrook | int is_graphic_console(void); |
345 | 82c643ff | bellard | CharDriverState *text_console_init(DisplayState *ds); |
346 | 82c643ff | bellard | void console_select(unsigned int index); |
347 | 82c643ff | bellard | |
348 | 8d11df9e | bellard | /* serial ports */
|
349 | 8d11df9e | bellard | |
350 | 8d11df9e | bellard | #define MAX_SERIAL_PORTS 4 |
351 | 8d11df9e | bellard | |
352 | 8d11df9e | bellard | extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
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353 | 8d11df9e | bellard | |
354 | 6508fe59 | bellard | /* parallel ports */
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355 | 6508fe59 | bellard | |
356 | 6508fe59 | bellard | #define MAX_PARALLEL_PORTS 3 |
357 | 6508fe59 | bellard | |
358 | 6508fe59 | bellard | extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
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359 | 6508fe59 | bellard | |
360 | 5867c88a | ths | struct ParallelIOArg {
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361 | 5867c88a | ths | void *buffer;
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362 | 5867c88a | ths | int count;
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363 | 5867c88a | ths | }; |
364 | 5867c88a | ths | |
365 | 7c9d8e07 | bellard | /* VLANs support */
|
366 | 7c9d8e07 | bellard | |
367 | 7c9d8e07 | bellard | typedef struct VLANClientState VLANClientState; |
368 | 7c9d8e07 | bellard | |
369 | 7c9d8e07 | bellard | struct VLANClientState {
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370 | 7c9d8e07 | bellard | IOReadHandler *fd_read; |
371 | d861b05e | pbrook | /* Packets may still be sent if this returns zero. It's used to
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372 | d861b05e | pbrook | rate-limit the slirp code. */
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373 | d861b05e | pbrook | IOCanRWHandler *fd_can_read; |
374 | 7c9d8e07 | bellard | void *opaque;
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375 | 7c9d8e07 | bellard | struct VLANClientState *next;
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376 | 7c9d8e07 | bellard | struct VLANState *vlan;
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377 | 7c9d8e07 | bellard | char info_str[256]; |
378 | 7c9d8e07 | bellard | }; |
379 | 7c9d8e07 | bellard | |
380 | 7c9d8e07 | bellard | typedef struct VLANState { |
381 | 7c9d8e07 | bellard | int id;
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382 | 7c9d8e07 | bellard | VLANClientState *first_client; |
383 | 7c9d8e07 | bellard | struct VLANState *next;
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384 | 7c9d8e07 | bellard | } VLANState; |
385 | 7c9d8e07 | bellard | |
386 | 7c9d8e07 | bellard | VLANState *qemu_find_vlan(int id);
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387 | 7c9d8e07 | bellard | VLANClientState *qemu_new_vlan_client(VLANState *vlan, |
388 | d861b05e | pbrook | IOReadHandler *fd_read, |
389 | d861b05e | pbrook | IOCanRWHandler *fd_can_read, |
390 | d861b05e | pbrook | void *opaque);
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391 | d861b05e | pbrook | int qemu_can_send_packet(VLANClientState *vc);
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392 | 7c9d8e07 | bellard | void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size); |
393 | d861b05e | pbrook | void qemu_handler_true(void *opaque); |
394 | 7c9d8e07 | bellard | |
395 | 7c9d8e07 | bellard | void do_info_network(void); |
396 | 7c9d8e07 | bellard | |
397 | 7fb843f8 | bellard | /* TAP win32 */
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398 | 7fb843f8 | bellard | int tap_win32_init(VLANState *vlan, const char *ifname); |
399 | 7fb843f8 | bellard | |
400 | 7c9d8e07 | bellard | /* NIC info */
|
401 | c4b1fcc0 | bellard | |
402 | c4b1fcc0 | bellard | #define MAX_NICS 8 |
403 | c4b1fcc0 | bellard | |
404 | 7c9d8e07 | bellard | typedef struct NICInfo { |
405 | c4b1fcc0 | bellard | uint8_t macaddr[6];
|
406 | a41b2ff2 | pbrook | const char *model; |
407 | 7c9d8e07 | bellard | VLANState *vlan; |
408 | 7c9d8e07 | bellard | } NICInfo; |
409 | c4b1fcc0 | bellard | |
410 | c4b1fcc0 | bellard | extern int nb_nics; |
411 | 7c9d8e07 | bellard | extern NICInfo nd_table[MAX_NICS];
|
412 | 8a7ddc38 | bellard | |
413 | 8a7ddc38 | bellard | /* timers */
|
414 | 8a7ddc38 | bellard | |
415 | 8a7ddc38 | bellard | typedef struct QEMUClock QEMUClock; |
416 | 8a7ddc38 | bellard | typedef struct QEMUTimer QEMUTimer; |
417 | 8a7ddc38 | bellard | typedef void QEMUTimerCB(void *opaque); |
418 | 8a7ddc38 | bellard | |
419 | 8a7ddc38 | bellard | /* The real time clock should be used only for stuff which does not
|
420 | 8a7ddc38 | bellard | change the virtual machine state, as it is run even if the virtual
|
421 | 69b91039 | bellard | machine is stopped. The real time clock has a frequency of 1000
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422 | 8a7ddc38 | bellard | Hz. */
|
423 | 8a7ddc38 | bellard | extern QEMUClock *rt_clock;
|
424 | 8a7ddc38 | bellard | |
425 | e80cfcfc | bellard | /* The virtual clock is only run during the emulation. It is stopped
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426 | 8a7ddc38 | bellard | when the virtual machine is stopped. Virtual timers use a high
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427 | 8a7ddc38 | bellard | precision clock, usually cpu cycles (use ticks_per_sec). */
|
428 | 8a7ddc38 | bellard | extern QEMUClock *vm_clock;
|
429 | 8a7ddc38 | bellard | |
430 | 8a7ddc38 | bellard | int64_t qemu_get_clock(QEMUClock *clock); |
431 | 8a7ddc38 | bellard | |
432 | 8a7ddc38 | bellard | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
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433 | 8a7ddc38 | bellard | void qemu_free_timer(QEMUTimer *ts);
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434 | 8a7ddc38 | bellard | void qemu_del_timer(QEMUTimer *ts);
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435 | 8a7ddc38 | bellard | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
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436 | 8a7ddc38 | bellard | int qemu_timer_pending(QEMUTimer *ts);
|
437 | 8a7ddc38 | bellard | |
438 | 8a7ddc38 | bellard | extern int64_t ticks_per_sec;
|
439 | 8a7ddc38 | bellard | extern int pit_min_timer_count; |
440 | 8a7ddc38 | bellard | |
441 | 1dce7c3c | bellard | int64_t cpu_get_ticks(void);
|
442 | 8a7ddc38 | bellard | void cpu_enable_ticks(void); |
443 | 8a7ddc38 | bellard | void cpu_disable_ticks(void); |
444 | 8a7ddc38 | bellard | |
445 | 8a7ddc38 | bellard | /* VM Load/Save */
|
446 | 8a7ddc38 | bellard | |
447 | faea38e7 | bellard | typedef struct QEMUFile QEMUFile; |
448 | 8a7ddc38 | bellard | |
449 | faea38e7 | bellard | QEMUFile *qemu_fopen(const char *filename, const char *mode); |
450 | faea38e7 | bellard | void qemu_fflush(QEMUFile *f);
|
451 | faea38e7 | bellard | void qemu_fclose(QEMUFile *f);
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452 | 8a7ddc38 | bellard | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); |
453 | 8a7ddc38 | bellard | void qemu_put_byte(QEMUFile *f, int v); |
454 | 8a7ddc38 | bellard | void qemu_put_be16(QEMUFile *f, unsigned int v); |
455 | 8a7ddc38 | bellard | void qemu_put_be32(QEMUFile *f, unsigned int v); |
456 | 8a7ddc38 | bellard | void qemu_put_be64(QEMUFile *f, uint64_t v);
|
457 | 8a7ddc38 | bellard | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); |
458 | 8a7ddc38 | bellard | int qemu_get_byte(QEMUFile *f);
|
459 | 8a7ddc38 | bellard | unsigned int qemu_get_be16(QEMUFile *f); |
460 | 8a7ddc38 | bellard | unsigned int qemu_get_be32(QEMUFile *f); |
461 | 8a7ddc38 | bellard | uint64_t qemu_get_be64(QEMUFile *f); |
462 | 8a7ddc38 | bellard | |
463 | 8a7ddc38 | bellard | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) |
464 | 8a7ddc38 | bellard | { |
465 | 8a7ddc38 | bellard | qemu_put_be64(f, *pv); |
466 | 8a7ddc38 | bellard | } |
467 | 8a7ddc38 | bellard | |
468 | 8a7ddc38 | bellard | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) |
469 | 8a7ddc38 | bellard | { |
470 | 8a7ddc38 | bellard | qemu_put_be32(f, *pv); |
471 | 8a7ddc38 | bellard | } |
472 | 8a7ddc38 | bellard | |
473 | 8a7ddc38 | bellard | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) |
474 | 8a7ddc38 | bellard | { |
475 | 8a7ddc38 | bellard | qemu_put_be16(f, *pv); |
476 | 8a7ddc38 | bellard | } |
477 | 8a7ddc38 | bellard | |
478 | 8a7ddc38 | bellard | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) |
479 | 8a7ddc38 | bellard | { |
480 | 8a7ddc38 | bellard | qemu_put_byte(f, *pv); |
481 | 8a7ddc38 | bellard | } |
482 | 8a7ddc38 | bellard | |
483 | 8a7ddc38 | bellard | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) |
484 | 8a7ddc38 | bellard | { |
485 | 8a7ddc38 | bellard | *pv = qemu_get_be64(f); |
486 | 8a7ddc38 | bellard | } |
487 | 8a7ddc38 | bellard | |
488 | 8a7ddc38 | bellard | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) |
489 | 8a7ddc38 | bellard | { |
490 | 8a7ddc38 | bellard | *pv = qemu_get_be32(f); |
491 | 8a7ddc38 | bellard | } |
492 | 8a7ddc38 | bellard | |
493 | 8a7ddc38 | bellard | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) |
494 | 8a7ddc38 | bellard | { |
495 | 8a7ddc38 | bellard | *pv = qemu_get_be16(f); |
496 | 8a7ddc38 | bellard | } |
497 | 8a7ddc38 | bellard | |
498 | 8a7ddc38 | bellard | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) |
499 | 8a7ddc38 | bellard | { |
500 | 8a7ddc38 | bellard | *pv = qemu_get_byte(f); |
501 | 8a7ddc38 | bellard | } |
502 | 8a7ddc38 | bellard | |
503 | c27004ec | bellard | #if TARGET_LONG_BITS == 64 |
504 | c27004ec | bellard | #define qemu_put_betl qemu_put_be64
|
505 | c27004ec | bellard | #define qemu_get_betl qemu_get_be64
|
506 | c27004ec | bellard | #define qemu_put_betls qemu_put_be64s
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507 | c27004ec | bellard | #define qemu_get_betls qemu_get_be64s
|
508 | c27004ec | bellard | #else
|
509 | c27004ec | bellard | #define qemu_put_betl qemu_put_be32
|
510 | c27004ec | bellard | #define qemu_get_betl qemu_get_be32
|
511 | c27004ec | bellard | #define qemu_put_betls qemu_put_be32s
|
512 | c27004ec | bellard | #define qemu_get_betls qemu_get_be32s
|
513 | c27004ec | bellard | #endif
|
514 | c27004ec | bellard | |
515 | 8a7ddc38 | bellard | int64_t qemu_ftell(QEMUFile *f); |
516 | 8a7ddc38 | bellard | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
|
517 | 8a7ddc38 | bellard | |
518 | 8a7ddc38 | bellard | typedef void SaveStateHandler(QEMUFile *f, void *opaque); |
519 | 8a7ddc38 | bellard | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); |
520 | 8a7ddc38 | bellard | |
521 | 8a7ddc38 | bellard | int register_savevm(const char *idstr, |
522 | 8a7ddc38 | bellard | int instance_id,
|
523 | 8a7ddc38 | bellard | int version_id,
|
524 | 8a7ddc38 | bellard | SaveStateHandler *save_state, |
525 | 8a7ddc38 | bellard | LoadStateHandler *load_state, |
526 | 8a7ddc38 | bellard | void *opaque);
|
527 | 8a7ddc38 | bellard | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
|
528 | 8a7ddc38 | bellard | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
|
529 | c4b1fcc0 | bellard | |
530 | 6a00d601 | bellard | void cpu_save(QEMUFile *f, void *opaque); |
531 | 6a00d601 | bellard | int cpu_load(QEMUFile *f, void *opaque, int version_id); |
532 | 6a00d601 | bellard | |
533 | faea38e7 | bellard | void do_savevm(const char *name); |
534 | faea38e7 | bellard | void do_loadvm(const char *name); |
535 | faea38e7 | bellard | void do_delvm(const char *name); |
536 | faea38e7 | bellard | void do_info_snapshots(void); |
537 | faea38e7 | bellard | |
538 | 83f64091 | bellard | /* bottom halves */
|
539 | 83f64091 | bellard | typedef void QEMUBHFunc(void *opaque); |
540 | 83f64091 | bellard | |
541 | 83f64091 | bellard | QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
|
542 | 83f64091 | bellard | void qemu_bh_schedule(QEMUBH *bh);
|
543 | 83f64091 | bellard | void qemu_bh_cancel(QEMUBH *bh);
|
544 | 83f64091 | bellard | void qemu_bh_delete(QEMUBH *bh);
|
545 | 6eb5733a | bellard | int qemu_bh_poll(void); |
546 | 83f64091 | bellard | |
547 | fc01f7e7 | bellard | /* block.c */
|
548 | fc01f7e7 | bellard | typedef struct BlockDriverState BlockDriverState; |
549 | ea2384d3 | bellard | typedef struct BlockDriver BlockDriver; |
550 | ea2384d3 | bellard | |
551 | ea2384d3 | bellard | extern BlockDriver bdrv_raw;
|
552 | 19cb3738 | bellard | extern BlockDriver bdrv_host_device;
|
553 | ea2384d3 | bellard | extern BlockDriver bdrv_cow;
|
554 | ea2384d3 | bellard | extern BlockDriver bdrv_qcow;
|
555 | ea2384d3 | bellard | extern BlockDriver bdrv_vmdk;
|
556 | 3c56521b | bellard | extern BlockDriver bdrv_cloop;
|
557 | 585d0ed9 | bellard | extern BlockDriver bdrv_dmg;
|
558 | a8753c34 | bellard | extern BlockDriver bdrv_bochs;
|
559 | 6a0f9e82 | bellard | extern BlockDriver bdrv_vpc;
|
560 | de167e41 | bellard | extern BlockDriver bdrv_vvfat;
|
561 | faea38e7 | bellard | extern BlockDriver bdrv_qcow2;
|
562 | faea38e7 | bellard | |
563 | faea38e7 | bellard | typedef struct BlockDriverInfo { |
564 | faea38e7 | bellard | /* in bytes, 0 if irrelevant */
|
565 | faea38e7 | bellard | int cluster_size;
|
566 | faea38e7 | bellard | /* offset at which the VM state can be saved (0 if not possible) */
|
567 | faea38e7 | bellard | int64_t vm_state_offset; |
568 | faea38e7 | bellard | } BlockDriverInfo; |
569 | faea38e7 | bellard | |
570 | faea38e7 | bellard | typedef struct QEMUSnapshotInfo { |
571 | faea38e7 | bellard | char id_str[128]; /* unique snapshot id */ |
572 | faea38e7 | bellard | /* the following fields are informative. They are not needed for
|
573 | faea38e7 | bellard | the consistency of the snapshot */
|
574 | faea38e7 | bellard | char name[256]; /* user choosen name */ |
575 | faea38e7 | bellard | uint32_t vm_state_size; /* VM state info size */
|
576 | faea38e7 | bellard | uint32_t date_sec; /* UTC date of the snapshot */
|
577 | faea38e7 | bellard | uint32_t date_nsec; |
578 | faea38e7 | bellard | uint64_t vm_clock_nsec; /* VM clock relative to boot */
|
579 | faea38e7 | bellard | } QEMUSnapshotInfo; |
580 | ea2384d3 | bellard | |
581 | 83f64091 | bellard | #define BDRV_O_RDONLY 0x0000 |
582 | 83f64091 | bellard | #define BDRV_O_RDWR 0x0002 |
583 | 83f64091 | bellard | #define BDRV_O_ACCESS 0x0003 |
584 | 83f64091 | bellard | #define BDRV_O_CREAT 0x0004 /* create an empty file */ |
585 | 83f64091 | bellard | #define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */ |
586 | 83f64091 | bellard | #define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to |
587 | 83f64091 | bellard | use a disk image format on top of
|
588 | 83f64091 | bellard | it (default for
|
589 | 83f64091 | bellard | bdrv_file_open()) */
|
590 | 83f64091 | bellard | |
591 | ea2384d3 | bellard | void bdrv_init(void); |
592 | ea2384d3 | bellard | BlockDriver *bdrv_find_format(const char *format_name); |
593 | ea2384d3 | bellard | int bdrv_create(BlockDriver *drv,
|
594 | ea2384d3 | bellard | const char *filename, int64_t size_in_sectors, |
595 | ea2384d3 | bellard | const char *backing_file, int flags); |
596 | c4b1fcc0 | bellard | BlockDriverState *bdrv_new(const char *device_name); |
597 | c4b1fcc0 | bellard | void bdrv_delete(BlockDriverState *bs);
|
598 | 83f64091 | bellard | int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags); |
599 | 83f64091 | bellard | int bdrv_open(BlockDriverState *bs, const char *filename, int flags); |
600 | 83f64091 | bellard | int bdrv_open2(BlockDriverState *bs, const char *filename, int flags, |
601 | ea2384d3 | bellard | BlockDriver *drv); |
602 | fc01f7e7 | bellard | void bdrv_close(BlockDriverState *bs);
|
603 | fc01f7e7 | bellard | int bdrv_read(BlockDriverState *bs, int64_t sector_num,
|
604 | fc01f7e7 | bellard | uint8_t *buf, int nb_sectors);
|
605 | fc01f7e7 | bellard | int bdrv_write(BlockDriverState *bs, int64_t sector_num,
|
606 | fc01f7e7 | bellard | const uint8_t *buf, int nb_sectors); |
607 | 83f64091 | bellard | int bdrv_pread(BlockDriverState *bs, int64_t offset,
|
608 | 83f64091 | bellard | void *buf, int count); |
609 | 83f64091 | bellard | int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
|
610 | 83f64091 | bellard | const void *buf, int count); |
611 | 83f64091 | bellard | int bdrv_truncate(BlockDriverState *bs, int64_t offset);
|
612 | 83f64091 | bellard | int64_t bdrv_getlength(BlockDriverState *bs); |
613 | fc01f7e7 | bellard | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
|
614 | 33e3963e | bellard | int bdrv_commit(BlockDriverState *bs);
|
615 | 77fef8c1 | bellard | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
616 | 83f64091 | bellard | /* async block I/O */
|
617 | 83f64091 | bellard | typedef struct BlockDriverAIOCB BlockDriverAIOCB; |
618 | 83f64091 | bellard | typedef void BlockDriverCompletionFunc(void *opaque, int ret); |
619 | 83f64091 | bellard | |
620 | ce1a14dc | pbrook | BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num, |
621 | ce1a14dc | pbrook | uint8_t *buf, int nb_sectors,
|
622 | ce1a14dc | pbrook | BlockDriverCompletionFunc *cb, void *opaque);
|
623 | ce1a14dc | pbrook | BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num, |
624 | ce1a14dc | pbrook | const uint8_t *buf, int nb_sectors, |
625 | ce1a14dc | pbrook | BlockDriverCompletionFunc *cb, void *opaque);
|
626 | 83f64091 | bellard | void bdrv_aio_cancel(BlockDriverAIOCB *acb);
|
627 | 83f64091 | bellard | |
628 | 83f64091 | bellard | void qemu_aio_init(void); |
629 | 83f64091 | bellard | void qemu_aio_poll(void); |
630 | 6192bc37 | pbrook | void qemu_aio_flush(void); |
631 | 83f64091 | bellard | void qemu_aio_wait_start(void); |
632 | 83f64091 | bellard | void qemu_aio_wait(void); |
633 | 83f64091 | bellard | void qemu_aio_wait_end(void); |
634 | 83f64091 | bellard | |
635 | 7a6cba61 | pbrook | /* Ensure contents are flushed to disk. */
|
636 | 7a6cba61 | pbrook | void bdrv_flush(BlockDriverState *bs);
|
637 | 33e3963e | bellard | |
638 | c4b1fcc0 | bellard | #define BDRV_TYPE_HD 0 |
639 | c4b1fcc0 | bellard | #define BDRV_TYPE_CDROM 1 |
640 | c4b1fcc0 | bellard | #define BDRV_TYPE_FLOPPY 2 |
641 | 4dbb0f50 | ths | #define BIOS_ATA_TRANSLATION_AUTO 0 |
642 | 4dbb0f50 | ths | #define BIOS_ATA_TRANSLATION_NONE 1 |
643 | 4dbb0f50 | ths | #define BIOS_ATA_TRANSLATION_LBA 2 |
644 | 4dbb0f50 | ths | #define BIOS_ATA_TRANSLATION_LARGE 3 |
645 | 4dbb0f50 | ths | #define BIOS_ATA_TRANSLATION_RECHS 4 |
646 | c4b1fcc0 | bellard | |
647 | c4b1fcc0 | bellard | void bdrv_set_geometry_hint(BlockDriverState *bs,
|
648 | c4b1fcc0 | bellard | int cyls, int heads, int secs); |
649 | c4b1fcc0 | bellard | void bdrv_set_type_hint(BlockDriverState *bs, int type); |
650 | 46d4767d | bellard | void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
651 | c4b1fcc0 | bellard | void bdrv_get_geometry_hint(BlockDriverState *bs,
|
652 | c4b1fcc0 | bellard | int *pcyls, int *pheads, int *psecs); |
653 | c4b1fcc0 | bellard | int bdrv_get_type_hint(BlockDriverState *bs);
|
654 | 46d4767d | bellard | int bdrv_get_translation_hint(BlockDriverState *bs);
|
655 | c4b1fcc0 | bellard | int bdrv_is_removable(BlockDriverState *bs);
|
656 | c4b1fcc0 | bellard | int bdrv_is_read_only(BlockDriverState *bs);
|
657 | c4b1fcc0 | bellard | int bdrv_is_inserted(BlockDriverState *bs);
|
658 | 19cb3738 | bellard | int bdrv_media_changed(BlockDriverState *bs);
|
659 | c4b1fcc0 | bellard | int bdrv_is_locked(BlockDriverState *bs);
|
660 | c4b1fcc0 | bellard | void bdrv_set_locked(BlockDriverState *bs, int locked); |
661 | 19cb3738 | bellard | void bdrv_eject(BlockDriverState *bs, int eject_flag); |
662 | c4b1fcc0 | bellard | void bdrv_set_change_cb(BlockDriverState *bs,
|
663 | c4b1fcc0 | bellard | void (*change_cb)(void *opaque), void *opaque); |
664 | ea2384d3 | bellard | void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
665 | c4b1fcc0 | bellard | void bdrv_info(void); |
666 | c4b1fcc0 | bellard | BlockDriverState *bdrv_find(const char *name); |
667 | 82c643ff | bellard | void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
668 | ea2384d3 | bellard | int bdrv_is_encrypted(BlockDriverState *bs);
|
669 | ea2384d3 | bellard | int bdrv_set_key(BlockDriverState *bs, const char *key); |
670 | ea2384d3 | bellard | void bdrv_iterate_format(void (*it)(void *opaque, const char *name), |
671 | ea2384d3 | bellard | void *opaque);
|
672 | ea2384d3 | bellard | const char *bdrv_get_device_name(BlockDriverState *bs); |
673 | faea38e7 | bellard | int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
|
674 | faea38e7 | bellard | const uint8_t *buf, int nb_sectors); |
675 | faea38e7 | bellard | int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
|
676 | c4b1fcc0 | bellard | |
677 | 83f64091 | bellard | void bdrv_get_backing_filename(BlockDriverState *bs,
|
678 | 83f64091 | bellard | char *filename, int filename_size); |
679 | faea38e7 | bellard | int bdrv_snapshot_create(BlockDriverState *bs,
|
680 | faea38e7 | bellard | QEMUSnapshotInfo *sn_info); |
681 | faea38e7 | bellard | int bdrv_snapshot_goto(BlockDriverState *bs,
|
682 | faea38e7 | bellard | const char *snapshot_id); |
683 | faea38e7 | bellard | int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id); |
684 | faea38e7 | bellard | int bdrv_snapshot_list(BlockDriverState *bs,
|
685 | faea38e7 | bellard | QEMUSnapshotInfo **psn_info); |
686 | faea38e7 | bellard | char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn); |
687 | faea38e7 | bellard | |
688 | faea38e7 | bellard | char *get_human_readable_size(char *buf, int buf_size, int64_t size); |
689 | 83f64091 | bellard | int path_is_absolute(const char *path); |
690 | 83f64091 | bellard | void path_combine(char *dest, int dest_size, |
691 | 83f64091 | bellard | const char *base_path, |
692 | 83f64091 | bellard | const char *filename); |
693 | ea2384d3 | bellard | |
694 | ea2384d3 | bellard | #ifndef QEMU_TOOL
|
695 | 54fa5af5 | bellard | |
696 | 54fa5af5 | bellard | typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, |
697 | 54fa5af5 | bellard | int boot_device,
|
698 | 54fa5af5 | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
699 | 54fa5af5 | bellard | const char *kernel_filename, const char *kernel_cmdline, |
700 | 94fc95cd | j_mayer | const char *initrd_filename, const char *cpu_model); |
701 | 54fa5af5 | bellard | |
702 | 54fa5af5 | bellard | typedef struct QEMUMachine { |
703 | 54fa5af5 | bellard | const char *name; |
704 | 54fa5af5 | bellard | const char *desc; |
705 | 54fa5af5 | bellard | QEMUMachineInitFunc *init; |
706 | 54fa5af5 | bellard | struct QEMUMachine *next;
|
707 | 54fa5af5 | bellard | } QEMUMachine; |
708 | 54fa5af5 | bellard | |
709 | 54fa5af5 | bellard | int qemu_register_machine(QEMUMachine *m);
|
710 | 54fa5af5 | bellard | |
711 | 54fa5af5 | bellard | typedef void SetIRQFunc(void *opaque, int irq_num, int level); |
712 | 54fa5af5 | bellard | |
713 | 94fc95cd | j_mayer | #if defined(TARGET_PPC)
|
714 | 94fc95cd | j_mayer | void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); |
715 | 94fc95cd | j_mayer | #endif
|
716 | 94fc95cd | j_mayer | |
717 | 33d68b5f | ths | #if defined(TARGET_MIPS)
|
718 | 33d68b5f | ths | void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); |
719 | 33d68b5f | ths | #endif
|
720 | 33d68b5f | ths | |
721 | d537cf6c | pbrook | #include "hw/irq.h" |
722 | d537cf6c | pbrook | |
723 | 26aa7d72 | bellard | /* ISA bus */
|
724 | 26aa7d72 | bellard | |
725 | 26aa7d72 | bellard | extern target_phys_addr_t isa_mem_base;
|
726 | 26aa7d72 | bellard | |
727 | 26aa7d72 | bellard | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); |
728 | 26aa7d72 | bellard | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); |
729 | 26aa7d72 | bellard | |
730 | 26aa7d72 | bellard | int register_ioport_read(int start, int length, int size, |
731 | 26aa7d72 | bellard | IOPortReadFunc *func, void *opaque);
|
732 | 26aa7d72 | bellard | int register_ioport_write(int start, int length, int size, |
733 | 26aa7d72 | bellard | IOPortWriteFunc *func, void *opaque);
|
734 | 69b91039 | bellard | void isa_unassign_ioport(int start, int length); |
735 | 69b91039 | bellard | |
736 | aef445bd | pbrook | void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
|
737 | aef445bd | pbrook | |
738 | 69b91039 | bellard | /* PCI bus */
|
739 | 69b91039 | bellard | |
740 | 69b91039 | bellard | extern target_phys_addr_t pci_mem_base;
|
741 | 69b91039 | bellard | |
742 | 46e50e9d | bellard | typedef struct PCIBus PCIBus; |
743 | 69b91039 | bellard | typedef struct PCIDevice PCIDevice; |
744 | 69b91039 | bellard | |
745 | 69b91039 | bellard | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
746 | 69b91039 | bellard | uint32_t address, uint32_t data, int len);
|
747 | 69b91039 | bellard | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
|
748 | 69b91039 | bellard | uint32_t address, int len);
|
749 | 69b91039 | bellard | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
750 | 69b91039 | bellard | uint32_t addr, uint32_t size, int type);
|
751 | 69b91039 | bellard | |
752 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_MEM 0x00 |
753 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_IO 0x01 |
754 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 |
755 | 69b91039 | bellard | |
756 | 69b91039 | bellard | typedef struct PCIIORegion { |
757 | 5768f5ac | bellard | uint32_t addr; /* current PCI mapping address. -1 means not mapped */
|
758 | 69b91039 | bellard | uint32_t size; |
759 | 69b91039 | bellard | uint8_t type; |
760 | 69b91039 | bellard | PCIMapIORegionFunc *map_func; |
761 | 69b91039 | bellard | } PCIIORegion; |
762 | 69b91039 | bellard | |
763 | 8a8696a3 | bellard | #define PCI_ROM_SLOT 6 |
764 | 8a8696a3 | bellard | #define PCI_NUM_REGIONS 7 |
765 | 502a5395 | pbrook | |
766 | 502a5395 | pbrook | #define PCI_DEVICES_MAX 64 |
767 | 502a5395 | pbrook | |
768 | 502a5395 | pbrook | #define PCI_VENDOR_ID 0x00 /* 16 bits */ |
769 | 502a5395 | pbrook | #define PCI_DEVICE_ID 0x02 /* 16 bits */ |
770 | 502a5395 | pbrook | #define PCI_COMMAND 0x04 /* 16 bits */ |
771 | 502a5395 | pbrook | #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ |
772 | 502a5395 | pbrook | #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ |
773 | 502a5395 | pbrook | #define PCI_CLASS_DEVICE 0x0a /* Device class */ |
774 | 502a5395 | pbrook | #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ |
775 | 502a5395 | pbrook | #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ |
776 | 502a5395 | pbrook | #define PCI_MIN_GNT 0x3e /* 8 bits */ |
777 | 502a5395 | pbrook | #define PCI_MAX_LAT 0x3f /* 8 bits */ |
778 | 502a5395 | pbrook | |
779 | 69b91039 | bellard | struct PCIDevice {
|
780 | 69b91039 | bellard | /* PCI config space */
|
781 | 69b91039 | bellard | uint8_t config[256];
|
782 | 69b91039 | bellard | |
783 | 69b91039 | bellard | /* the following fields are read only */
|
784 | 46e50e9d | bellard | PCIBus *bus; |
785 | 69b91039 | bellard | int devfn;
|
786 | 69b91039 | bellard | char name[64]; |
787 | 8a8696a3 | bellard | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
788 | 69b91039 | bellard | |
789 | 69b91039 | bellard | /* do not access the following fields */
|
790 | 69b91039 | bellard | PCIConfigReadFunc *config_read; |
791 | 69b91039 | bellard | PCIConfigWriteFunc *config_write; |
792 | 502a5395 | pbrook | /* ??? This is a PC-specific hack, and should be removed. */
|
793 | 5768f5ac | bellard | int irq_index;
|
794 | d2b59317 | pbrook | |
795 | d537cf6c | pbrook | /* IRQ objects for the INTA-INTD pins. */
|
796 | d537cf6c | pbrook | qemu_irq *irq; |
797 | d537cf6c | pbrook | |
798 | d2b59317 | pbrook | /* Current IRQ levels. Used internally by the generic PCI code. */
|
799 | d2b59317 | pbrook | int irq_state[4]; |
800 | 69b91039 | bellard | }; |
801 | 69b91039 | bellard | |
802 | 46e50e9d | bellard | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
803 | 46e50e9d | bellard | int instance_size, int devfn, |
804 | 69b91039 | bellard | PCIConfigReadFunc *config_read, |
805 | 69b91039 | bellard | PCIConfigWriteFunc *config_write); |
806 | 69b91039 | bellard | |
807 | 69b91039 | bellard | void pci_register_io_region(PCIDevice *pci_dev, int region_num, |
808 | 69b91039 | bellard | uint32_t size, int type,
|
809 | 69b91039 | bellard | PCIMapIORegionFunc *map_func); |
810 | 69b91039 | bellard | |
811 | 5768f5ac | bellard | uint32_t pci_default_read_config(PCIDevice *d, |
812 | 5768f5ac | bellard | uint32_t address, int len);
|
813 | 5768f5ac | bellard | void pci_default_write_config(PCIDevice *d,
|
814 | 5768f5ac | bellard | uint32_t address, uint32_t val, int len);
|
815 | 89b6b508 | bellard | void pci_device_save(PCIDevice *s, QEMUFile *f);
|
816 | 89b6b508 | bellard | int pci_device_load(PCIDevice *s, QEMUFile *f);
|
817 | 5768f5ac | bellard | |
818 | d537cf6c | pbrook | typedef void (*pci_set_irq_fn)(qemu_irq *pic, int irq_num, int level); |
819 | d2b59317 | pbrook | typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); |
820 | d2b59317 | pbrook | PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, |
821 | d537cf6c | pbrook | qemu_irq *pic, int devfn_min, int nirq); |
822 | 502a5395 | pbrook | |
823 | abcebc7e | ths | void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn); |
824 | 502a5395 | pbrook | void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); |
825 | 502a5395 | pbrook | uint32_t pci_data_read(void *opaque, uint32_t addr, int len); |
826 | 502a5395 | pbrook | int pci_bus_num(PCIBus *s);
|
827 | 80b3ada7 | pbrook | void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d)); |
828 | 9995c51f | bellard | |
829 | 5768f5ac | bellard | void pci_info(void); |
830 | 80b3ada7 | pbrook | PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
|
831 | 80b3ada7 | pbrook | pci_map_irq_fn map_irq, const char *name); |
832 | 26aa7d72 | bellard | |
833 | 502a5395 | pbrook | /* prep_pci.c */
|
834 | d537cf6c | pbrook | PCIBus *pci_prep_init(qemu_irq *pic); |
835 | 77d4bc34 | bellard | |
836 | 502a5395 | pbrook | /* grackle_pci.c */
|
837 | d537cf6c | pbrook | PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic); |
838 | 502a5395 | pbrook | |
839 | 502a5395 | pbrook | /* unin_pci.c */
|
840 | d537cf6c | pbrook | PCIBus *pci_pmac_init(qemu_irq *pic); |
841 | 502a5395 | pbrook | |
842 | 502a5395 | pbrook | /* apb_pci.c */
|
843 | 502a5395 | pbrook | PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base, |
844 | d537cf6c | pbrook | qemu_irq *pic); |
845 | 502a5395 | pbrook | |
846 | d537cf6c | pbrook | PCIBus *pci_vpb_init(qemu_irq *pic, int irq, int realview); |
847 | 502a5395 | pbrook | |
848 | 502a5395 | pbrook | /* piix_pci.c */
|
849 | d537cf6c | pbrook | PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic); |
850 | f00fc47c | bellard | void i440fx_set_smm(PCIDevice *d, int val); |
851 | 8f1c91d8 | ths | int piix3_init(PCIBus *bus, int devfn); |
852 | f00fc47c | bellard | void i440fx_init_memory_mappings(PCIDevice *d);
|
853 | a41b2ff2 | pbrook | |
854 | 5856de80 | ths | int piix4_init(PCIBus *bus, int devfn); |
855 | 5856de80 | ths | |
856 | 28b9b5af | bellard | /* openpic.c */
|
857 | e9df014c | j_mayer | /* OpenPIC have 5 outputs per CPU connected and one IRQ out single output */
|
858 | 47103572 | j_mayer | enum {
|
859 | e9df014c | j_mayer | OPENPIC_OUTPUT_INT = 0, /* IRQ */ |
860 | e9df014c | j_mayer | OPENPIC_OUTPUT_CINT, /* critical IRQ */
|
861 | e9df014c | j_mayer | OPENPIC_OUTPUT_MCK, /* Machine check event */
|
862 | e9df014c | j_mayer | OPENPIC_OUTPUT_DEBUG, /* Inconditional debug event */
|
863 | e9df014c | j_mayer | OPENPIC_OUTPUT_RESET, /* Core reset event */
|
864 | e9df014c | j_mayer | OPENPIC_OUTPUT_NB, |
865 | 47103572 | j_mayer | }; |
866 | e9df014c | j_mayer | qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, |
867 | e9df014c | j_mayer | qemu_irq **irqs, qemu_irq irq_out); |
868 | 28b9b5af | bellard | |
869 | 54fa5af5 | bellard | /* heathrow_pic.c */
|
870 | d537cf6c | pbrook | qemu_irq *heathrow_pic_init(int *pmem_index);
|
871 | 54fa5af5 | bellard | |
872 | fde7d5bd | ths | /* gt64xxx.c */
|
873 | d537cf6c | pbrook | PCIBus *pci_gt64120_init(qemu_irq *pic); |
874 | fde7d5bd | ths | |
875 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
876 | 6a36d84e | bellard | struct soundhw {
|
877 | 6a36d84e | bellard | const char *name; |
878 | 6a36d84e | bellard | const char *descr; |
879 | 6a36d84e | bellard | int enabled;
|
880 | 6a36d84e | bellard | int isa;
|
881 | 6a36d84e | bellard | union {
|
882 | d537cf6c | pbrook | int (*init_isa) (AudioState *s, qemu_irq *pic);
|
883 | 6a36d84e | bellard | int (*init_pci) (PCIBus *bus, AudioState *s);
|
884 | 6a36d84e | bellard | } init; |
885 | 6a36d84e | bellard | }; |
886 | 6a36d84e | bellard | |
887 | 6a36d84e | bellard | extern struct soundhw soundhw[]; |
888 | 6a36d84e | bellard | #endif
|
889 | 6a36d84e | bellard | |
890 | 313aa567 | bellard | /* vga.c */
|
891 | 313aa567 | bellard | |
892 | 74a14f22 | bellard | #define VGA_RAM_SIZE (8192 * 1024) |
893 | 313aa567 | bellard | |
894 | 82c643ff | bellard | struct DisplayState {
|
895 | 313aa567 | bellard | uint8_t *data; |
896 | 313aa567 | bellard | int linesize;
|
897 | 313aa567 | bellard | int depth;
|
898 | d3079cd2 | bellard | int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */ |
899 | 82c643ff | bellard | int width;
|
900 | 82c643ff | bellard | int height;
|
901 | 24236869 | bellard | void *opaque;
|
902 | 24236869 | bellard | |
903 | 313aa567 | bellard | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
904 | 313aa567 | bellard | void (*dpy_resize)(struct DisplayState *s, int w, int h); |
905 | 313aa567 | bellard | void (*dpy_refresh)(struct DisplayState *s); |
906 | d34cab9f | ths | void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, |
907 | d34cab9f | ths | int dst_x, int dst_y, int w, int h); |
908 | d34cab9f | ths | void (*dpy_fill)(struct DisplayState *s, int x, int y, |
909 | d34cab9f | ths | int w, int h, uint32_t c); |
910 | d34cab9f | ths | void (*mouse_set)(int x, int y, int on); |
911 | d34cab9f | ths | void (*cursor_define)(int width, int height, int bpp, int hot_x, int hot_y, |
912 | d34cab9f | ths | uint8_t *image, uint8_t *mask); |
913 | 82c643ff | bellard | }; |
914 | 313aa567 | bellard | |
915 | 313aa567 | bellard | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) |
916 | 313aa567 | bellard | { |
917 | 313aa567 | bellard | s->dpy_update(s, x, y, w, h); |
918 | 313aa567 | bellard | } |
919 | 313aa567 | bellard | |
920 | 313aa567 | bellard | static inline void dpy_resize(DisplayState *s, int w, int h) |
921 | 313aa567 | bellard | { |
922 | 313aa567 | bellard | s->dpy_resize(s, w, h); |
923 | 313aa567 | bellard | } |
924 | 313aa567 | bellard | |
925 | 89b6b508 | bellard | int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
926 | 89b6b508 | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
927 | 89b6b508 | bellard | int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
928 | 89b6b508 | bellard | unsigned long vga_ram_offset, int vga_ram_size, |
929 | 89b6b508 | bellard | unsigned long vga_bios_offset, int vga_bios_size); |
930 | 313aa567 | bellard | |
931 | d6bfa22f | bellard | /* cirrus_vga.c */
|
932 | 46e50e9d | bellard | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
933 | d6bfa22f | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
934 | d6bfa22f | bellard | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
935 | d6bfa22f | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
936 | d6bfa22f | bellard | |
937 | d34cab9f | ths | /* vmware_vga.c */
|
938 | d34cab9f | ths | void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
939 | d34cab9f | ths | unsigned long vga_ram_offset, int vga_ram_size); |
940 | d34cab9f | ths | |
941 | 313aa567 | bellard | /* sdl.c */
|
942 | 43523e93 | ths | void sdl_display_init(DisplayState *ds, int full_screen, int no_frame); |
943 | 313aa567 | bellard | |
944 | da4dbf74 | bellard | /* cocoa.m */
|
945 | da4dbf74 | bellard | void cocoa_display_init(DisplayState *ds, int full_screen); |
946 | da4dbf74 | bellard | |
947 | 24236869 | bellard | /* vnc.c */
|
948 | 73fc9742 | ths | void vnc_display_init(DisplayState *ds, const char *display); |
949 | a9ce8590 | bellard | void do_info_vnc(void); |
950 | 24236869 | bellard | |
951 | 6070dd07 | ths | /* x_keymap.c */
|
952 | 6070dd07 | ths | extern uint8_t _translate_keycode(const int key); |
953 | 6070dd07 | ths | |
954 | 5391d806 | bellard | /* ide.c */
|
955 | 5391d806 | bellard | #define MAX_DISKS 4 |
956 | 5391d806 | bellard | |
957 | faea38e7 | bellard | extern BlockDriverState *bs_table[MAX_DISKS + 1]; |
958 | a1bb27b1 | pbrook | extern BlockDriverState *sd_bdrv;
|
959 | 5391d806 | bellard | |
960 | d537cf6c | pbrook | void isa_ide_init(int iobase, int iobase2, qemu_irq irq, |
961 | 69b91039 | bellard | BlockDriverState *hd0, BlockDriverState *hd1); |
962 | 54fa5af5 | bellard | void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
|
963 | 54fa5af5 | bellard | int secondary_ide_enabled);
|
964 | d537cf6c | pbrook | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, |
965 | d537cf6c | pbrook | qemu_irq *pic); |
966 | d537cf6c | pbrook | int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq);
|
967 | 5391d806 | bellard | |
968 | 2e5d83bb | pbrook | /* cdrom.c */
|
969 | 2e5d83bb | pbrook | int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track); |
970 | 2e5d83bb | pbrook | int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num); |
971 | 2e5d83bb | pbrook | |
972 | 9542611a | ths | /* ds1225y.c */
|
973 | 9542611a | ths | typedef struct ds1225y_t ds1225y_t; |
974 | 9542611a | ths | ds1225y_t *ds1225y_init(target_ulong mem_base, const char *filename); |
975 | 9542611a | ths | |
976 | 1d14ffa9 | bellard | /* es1370.c */
|
977 | c0fe3827 | bellard | int es1370_init (PCIBus *bus, AudioState *s);
|
978 | 1d14ffa9 | bellard | |
979 | fb065187 | bellard | /* sb16.c */
|
980 | d537cf6c | pbrook | int SB16_init (AudioState *s, qemu_irq *pic);
|
981 | fb065187 | bellard | |
982 | fb065187 | bellard | /* adlib.c */
|
983 | d537cf6c | pbrook | int Adlib_init (AudioState *s, qemu_irq *pic);
|
984 | fb065187 | bellard | |
985 | fb065187 | bellard | /* gus.c */
|
986 | d537cf6c | pbrook | int GUS_init (AudioState *s, qemu_irq *pic);
|
987 | 27503323 | bellard | |
988 | 27503323 | bellard | /* dma.c */
|
989 | 85571bc7 | bellard | typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
990 | 27503323 | bellard | int DMA_get_channel_mode (int nchan); |
991 | 85571bc7 | bellard | int DMA_read_memory (int nchan, void *buf, int pos, int size); |
992 | 85571bc7 | bellard | int DMA_write_memory (int nchan, void *buf, int pos, int size); |
993 | 27503323 | bellard | void DMA_hold_DREQ (int nchan); |
994 | 27503323 | bellard | void DMA_release_DREQ (int nchan); |
995 | 16f62432 | bellard | void DMA_schedule(int nchan); |
996 | 27503323 | bellard | void DMA_run (void); |
997 | 28b9b5af | bellard | void DMA_init (int high_page_enable); |
998 | 27503323 | bellard | void DMA_register_channel (int nchan, |
999 | 85571bc7 | bellard | DMA_transfer_handler transfer_handler, |
1000 | 85571bc7 | bellard | void *opaque);
|
1001 | 7138fcfb | bellard | /* fdc.c */
|
1002 | 7138fcfb | bellard | #define MAX_FD 2 |
1003 | 7138fcfb | bellard | extern BlockDriverState *fd_table[MAX_FD];
|
1004 | 7138fcfb | bellard | |
1005 | baca51fa | bellard | typedef struct fdctrl_t fdctrl_t; |
1006 | baca51fa | bellard | |
1007 | d537cf6c | pbrook | fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, |
1008 | baca51fa | bellard | uint32_t io_base, |
1009 | baca51fa | bellard | BlockDriverState **fds); |
1010 | baca51fa | bellard | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); |
1011 | 7138fcfb | bellard | |
1012 | 663e8e51 | ths | /* eepro100.c */
|
1013 | 663e8e51 | ths | |
1014 | 663e8e51 | ths | void pci_i82551_init(PCIBus *bus, NICInfo *nd, int devfn); |
1015 | 663e8e51 | ths | void pci_i82557b_init(PCIBus *bus, NICInfo *nd, int devfn); |
1016 | 663e8e51 | ths | void pci_i82559er_init(PCIBus *bus, NICInfo *nd, int devfn); |
1017 | 663e8e51 | ths | |
1018 | 80cabfad | bellard | /* ne2000.c */
|
1019 | 80cabfad | bellard | |
1020 | d537cf6c | pbrook | void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd); |
1021 | abcebc7e | ths | void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn); |
1022 | 80cabfad | bellard | |
1023 | a41b2ff2 | pbrook | /* rtl8139.c */
|
1024 | a41b2ff2 | pbrook | |
1025 | abcebc7e | ths | void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn); |
1026 | a41b2ff2 | pbrook | |
1027 | e3c2613f | bellard | /* pcnet.c */
|
1028 | e3c2613f | bellard | |
1029 | abcebc7e | ths | void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn); |
1030 | 67e999be | bellard | void pcnet_h_reset(void *opaque); |
1031 | d537cf6c | pbrook | void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque, qemu_irq irq); |
1032 | 67e999be | bellard | |
1033 | 548df2ac | ths | /* vmmouse.c */
|
1034 | 548df2ac | ths | void *vmmouse_init(void *m); |
1035 | e3c2613f | bellard | |
1036 | 80cabfad | bellard | /* pckbd.c */
|
1037 | 80cabfad | bellard | |
1038 | d537cf6c | pbrook | void i8042_init(qemu_irq kdb_irq, qemu_irq mouse_irq, uint32_t io_base);
|
1039 | 80cabfad | bellard | |
1040 | 80cabfad | bellard | /* mc146818rtc.c */
|
1041 | 80cabfad | bellard | |
1042 | 8a7ddc38 | bellard | typedef struct RTCState RTCState; |
1043 | 80cabfad | bellard | |
1044 | d537cf6c | pbrook | RTCState *rtc_init(int base, qemu_irq irq);
|
1045 | 8a7ddc38 | bellard | void rtc_set_memory(RTCState *s, int addr, int val); |
1046 | 8a7ddc38 | bellard | void rtc_set_date(RTCState *s, const struct tm *tm); |
1047 | 80cabfad | bellard | |
1048 | 80cabfad | bellard | /* serial.c */
|
1049 | 80cabfad | bellard | |
1050 | c4b1fcc0 | bellard | typedef struct SerialState SerialState; |
1051 | d537cf6c | pbrook | SerialState *serial_init(int base, qemu_irq irq, CharDriverState *chr);
|
1052 | d537cf6c | pbrook | SerialState *serial_mm_init (target_ulong base, int it_shift,
|
1053 | d537cf6c | pbrook | qemu_irq irq, CharDriverState *chr, |
1054 | a4bc3afc | ths | int ioregister);
|
1055 | a4bc3afc | ths | uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr);
|
1056 | a4bc3afc | ths | void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value); |
1057 | a4bc3afc | ths | uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr);
|
1058 | a4bc3afc | ths | void serial_mm_writew (void *opaque, target_phys_addr_t addr, uint32_t value); |
1059 | a4bc3afc | ths | uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr);
|
1060 | a4bc3afc | ths | void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value); |
1061 | 80cabfad | bellard | |
1062 | 6508fe59 | bellard | /* parallel.c */
|
1063 | 6508fe59 | bellard | |
1064 | 6508fe59 | bellard | typedef struct ParallelState ParallelState; |
1065 | d537cf6c | pbrook | ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr);
|
1066 | 6508fe59 | bellard | |
1067 | 80cabfad | bellard | /* i8259.c */
|
1068 | 80cabfad | bellard | |
1069 | 3de388f6 | bellard | typedef struct PicState2 PicState2; |
1070 | 3de388f6 | bellard | extern PicState2 *isa_pic;
|
1071 | 80cabfad | bellard | void pic_set_irq(int irq, int level); |
1072 | 54fa5af5 | bellard | void pic_set_irq_new(void *opaque, int irq, int level); |
1073 | d537cf6c | pbrook | qemu_irq *i8259_init(qemu_irq parent_irq); |
1074 | d592d303 | bellard | void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
|
1075 | d592d303 | bellard | void *alt_irq_opaque);
|
1076 | 3de388f6 | bellard | int pic_read_irq(PicState2 *s);
|
1077 | 3de388f6 | bellard | void pic_update_irq(PicState2 *s);
|
1078 | 3de388f6 | bellard | uint32_t pic_intack_read(PicState2 *s); |
1079 | c20709aa | bellard | void pic_info(void); |
1080 | 4a0fb71e | bellard | void irq_info(void); |
1081 | 80cabfad | bellard | |
1082 | c27004ec | bellard | /* APIC */
|
1083 | d592d303 | bellard | typedef struct IOAPICState IOAPICState; |
1084 | d592d303 | bellard | |
1085 | c27004ec | bellard | int apic_init(CPUState *env);
|
1086 | c27004ec | bellard | int apic_get_interrupt(CPUState *env);
|
1087 | d592d303 | bellard | IOAPICState *ioapic_init(void);
|
1088 | d592d303 | bellard | void ioapic_set_irq(void *opaque, int vector, int level); |
1089 | c27004ec | bellard | |
1090 | 80cabfad | bellard | /* i8254.c */
|
1091 | 80cabfad | bellard | |
1092 | 80cabfad | bellard | #define PIT_FREQ 1193182 |
1093 | 80cabfad | bellard | |
1094 | ec844b96 | bellard | typedef struct PITState PITState; |
1095 | ec844b96 | bellard | |
1096 | d537cf6c | pbrook | PITState *pit_init(int base, qemu_irq irq);
|
1097 | ec844b96 | bellard | void pit_set_gate(PITState *pit, int channel, int val); |
1098 | ec844b96 | bellard | int pit_get_gate(PITState *pit, int channel); |
1099 | fd06c375 | bellard | int pit_get_initial_count(PITState *pit, int channel); |
1100 | fd06c375 | bellard | int pit_get_mode(PITState *pit, int channel); |
1101 | ec844b96 | bellard | int pit_get_out(PITState *pit, int channel, int64_t current_time); |
1102 | 80cabfad | bellard | |
1103 | fd06c375 | bellard | /* pcspk.c */
|
1104 | fd06c375 | bellard | void pcspk_init(PITState *);
|
1105 | d537cf6c | pbrook | int pcspk_audio_init(AudioState *, qemu_irq *pic);
|
1106 | fd06c375 | bellard | |
1107 | 3fffc223 | ths | #include "hw/smbus.h" |
1108 | 3fffc223 | ths | |
1109 | 6515b203 | bellard | /* acpi.c */
|
1110 | 6515b203 | bellard | extern int acpi_enabled; |
1111 | 502a5395 | pbrook | void piix4_pm_init(PCIBus *bus, int devfn); |
1112 | 3fffc223 | ths | void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
|
1113 | 6515b203 | bellard | void acpi_bios_init(void); |
1114 | 6515b203 | bellard | |
1115 | 3fffc223 | ths | /* smbus_eeprom.c */
|
1116 | 3fffc223 | ths | SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf); |
1117 | 3fffc223 | ths | |
1118 | 80cabfad | bellard | /* pc.c */
|
1119 | 54fa5af5 | bellard | extern QEMUMachine pc_machine;
|
1120 | 3dbbdc25 | bellard | extern QEMUMachine isapc_machine;
|
1121 | 52ca8d6a | bellard | extern int fd_bootchk; |
1122 | 80cabfad | bellard | |
1123 | 6a00d601 | bellard | void ioport_set_a20(int enable); |
1124 | 6a00d601 | bellard | int ioport_get_a20(void); |
1125 | 6a00d601 | bellard | |
1126 | 26aa7d72 | bellard | /* ppc.c */
|
1127 | 54fa5af5 | bellard | extern QEMUMachine prep_machine;
|
1128 | 54fa5af5 | bellard | extern QEMUMachine core99_machine;
|
1129 | 54fa5af5 | bellard | extern QEMUMachine heathrow_machine;
|
1130 | 54fa5af5 | bellard | |
1131 | 6af0bf9c | bellard | /* mips_r4k.c */
|
1132 | 6af0bf9c | bellard | extern QEMUMachine mips_machine;
|
1133 | 6af0bf9c | bellard | |
1134 | 5856de80 | ths | /* mips_malta.c */
|
1135 | 5856de80 | ths | extern QEMUMachine mips_malta_machine;
|
1136 | 5856de80 | ths | |
1137 | 4de9b249 | ths | /* mips_int */
|
1138 | d537cf6c | pbrook | extern void cpu_mips_irq_init_cpu(CPUState *env); |
1139 | 4de9b249 | ths | |
1140 | e16fe40c | ths | /* mips_timer.c */
|
1141 | e16fe40c | ths | extern void cpu_mips_clock_init(CPUState *); |
1142 | e16fe40c | ths | extern void cpu_mips_irqctrl_init (void); |
1143 | e16fe40c | ths | |
1144 | 27c7ca7e | bellard | /* shix.c */
|
1145 | 27c7ca7e | bellard | extern QEMUMachine shix_machine;
|
1146 | 27c7ca7e | bellard | |
1147 | 8cc43fef | bellard | #ifdef TARGET_PPC
|
1148 | 47103572 | j_mayer | /* PowerPC hardware exceptions management helpers */
|
1149 | 8cc43fef | bellard | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); |
1150 | 8cc43fef | bellard | #endif
|
1151 | 64201201 | bellard | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
1152 | 77d4bc34 | bellard | |
1153 | 77d4bc34 | bellard | extern CPUWriteMemoryFunc *PPC_io_write[];
|
1154 | 77d4bc34 | bellard | extern CPUReadMemoryFunc *PPC_io_read[];
|
1155 | 54fa5af5 | bellard | void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
1156 | 26aa7d72 | bellard | |
1157 | e95c8d51 | bellard | /* sun4m.c */
|
1158 | e0353fe2 | blueswir1 | extern QEMUMachine ss5_machine, ss10_machine;
|
1159 | e95c8d51 | bellard | |
1160 | e95c8d51 | bellard | /* iommu.c */
|
1161 | e80cfcfc | bellard | void *iommu_init(uint32_t addr);
|
1162 | 67e999be | bellard | void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr, |
1163 | a917d384 | pbrook | uint8_t *buf, int len, int is_write); |
1164 | 67e999be | bellard | static inline void sparc_iommu_memory_read(void *opaque, |
1165 | 67e999be | bellard | target_phys_addr_t addr, |
1166 | 67e999be | bellard | uint8_t *buf, int len)
|
1167 | 67e999be | bellard | { |
1168 | 67e999be | bellard | sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
|
1169 | 67e999be | bellard | } |
1170 | e95c8d51 | bellard | |
1171 | 67e999be | bellard | static inline void sparc_iommu_memory_write(void *opaque, |
1172 | 67e999be | bellard | target_phys_addr_t addr, |
1173 | 67e999be | bellard | uint8_t *buf, int len)
|
1174 | 67e999be | bellard | { |
1175 | 67e999be | bellard | sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
|
1176 | 67e999be | bellard | } |
1177 | e95c8d51 | bellard | |
1178 | e95c8d51 | bellard | /* tcx.c */
|
1179 | 95219897 | pbrook | void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
|
1180 | 6f7e9aec | bellard | unsigned long vram_offset, int vram_size, int width, int height); |
1181 | e80cfcfc | bellard | |
1182 | e80cfcfc | bellard | /* slavio_intctl.c */
|
1183 | 52cc07d0 | blueswir1 | void pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); |
1184 | e0353fe2 | blueswir1 | void *slavio_intctl_init(uint32_t addr, uint32_t addrg,
|
1185 | d537cf6c | pbrook | const uint32_t *intbit_to_level,
|
1186 | d537cf6c | pbrook | qemu_irq **irq); |
1187 | ba3c64fb | bellard | void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env); |
1188 | e80cfcfc | bellard | void slavio_pic_info(void *opaque); |
1189 | e80cfcfc | bellard | void slavio_irq_info(void *opaque); |
1190 | e95c8d51 | bellard | |
1191 | 5fe141fd | bellard | /* loader.c */
|
1192 | 5fe141fd | bellard | int get_image_size(const char *filename); |
1193 | 5fe141fd | bellard | int load_image(const char *filename, uint8_t *addr); |
1194 | 74287114 | ths | int load_elf(const char *filename, int64_t virt_to_phys_addend, |
1195 | 74287114 | ths | uint64_t *pentry, uint64_t *lowaddr, uint64_t *highaddr); |
1196 | e80cfcfc | bellard | int load_aout(const char *filename, uint8_t *addr); |
1197 | 1c7b3754 | pbrook | int load_uboot(const char *filename, target_ulong *ep, int *is_linux); |
1198 | e80cfcfc | bellard | |
1199 | e80cfcfc | bellard | /* slavio_timer.c */
|
1200 | 52cc07d0 | blueswir1 | void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu, |
1201 | 52cc07d0 | blueswir1 | void *intctl);
|
1202 | 8d5f07fa | bellard | |
1203 | e80cfcfc | bellard | /* slavio_serial.c */
|
1204 | d537cf6c | pbrook | SerialState *slavio_serial_init(int base, qemu_irq irq, CharDriverState *chr1,
|
1205 | d537cf6c | pbrook | CharDriverState *chr2); |
1206 | d537cf6c | pbrook | void slavio_serial_ms_kbd_init(int base, qemu_irq); |
1207 | e95c8d51 | bellard | |
1208 | 3475187d | bellard | /* slavio_misc.c */
|
1209 | d537cf6c | pbrook | void *slavio_misc_init(uint32_t base, qemu_irq irq);
|
1210 | 3475187d | bellard | void slavio_set_power_fail(void *opaque, int power_failing); |
1211 | 3475187d | bellard | |
1212 | 6f7e9aec | bellard | /* esp.c */
|
1213 | fa1fb14c | ths | void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id); |
1214 | 67e999be | bellard | void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque); |
1215 | 67e999be | bellard | void esp_reset(void *opaque); |
1216 | 67e999be | bellard | |
1217 | 67e999be | bellard | /* sparc32_dma.c */
|
1218 | d537cf6c | pbrook | void *sparc32_dma_init(uint32_t daddr, qemu_irq espirq, qemu_irq leirq,
|
1219 | d537cf6c | pbrook | void *iommu);
|
1220 | 67e999be | bellard | void ledma_set_irq(void *opaque, int isr); |
1221 | 9b94dc32 | bellard | void ledma_memory_read(void *opaque, target_phys_addr_t addr, |
1222 | 9b94dc32 | bellard | uint8_t *buf, int len, int do_bswap); |
1223 | 9b94dc32 | bellard | void ledma_memory_write(void *opaque, target_phys_addr_t addr, |
1224 | 9b94dc32 | bellard | uint8_t *buf, int len, int do_bswap); |
1225 | 67e999be | bellard | void espdma_raise_irq(void *opaque); |
1226 | 67e999be | bellard | void espdma_clear_irq(void *opaque); |
1227 | 67e999be | bellard | void espdma_memory_read(void *opaque, uint8_t *buf, int len); |
1228 | 67e999be | bellard | void espdma_memory_write(void *opaque, uint8_t *buf, int len); |
1229 | 67e999be | bellard | void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque, |
1230 | 67e999be | bellard | void *lance_opaque);
|
1231 | 6f7e9aec | bellard | |
1232 | b8174937 | bellard | /* cs4231.c */
|
1233 | b8174937 | bellard | void cs_init(target_phys_addr_t base, int irq, void *intctl); |
1234 | b8174937 | bellard | |
1235 | 3475187d | bellard | /* sun4u.c */
|
1236 | 3475187d | bellard | extern QEMUMachine sun4u_machine;
|
1237 | 3475187d | bellard | |
1238 | 64201201 | bellard | /* NVRAM helpers */
|
1239 | 64201201 | bellard | #include "hw/m48t59.h" |
1240 | 64201201 | bellard | |
1241 | 64201201 | bellard | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
|
1242 | 64201201 | bellard | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); |
1243 | 64201201 | bellard | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
|
1244 | 64201201 | bellard | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); |
1245 | 64201201 | bellard | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
|
1246 | 64201201 | bellard | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); |
1247 | 64201201 | bellard | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
|
1248 | 64201201 | bellard | const unsigned char *str, uint32_t max); |
1249 | 64201201 | bellard | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); |
1250 | 64201201 | bellard | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
|
1251 | 64201201 | bellard | uint32_t start, uint32_t count); |
1252 | 64201201 | bellard | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
|
1253 | 64201201 | bellard | const unsigned char *arch, |
1254 | 64201201 | bellard | uint32_t RAM_size, int boot_device,
|
1255 | 64201201 | bellard | uint32_t kernel_image, uint32_t kernel_size, |
1256 | 28b9b5af | bellard | const char *cmdline, |
1257 | 64201201 | bellard | uint32_t initrd_image, uint32_t initrd_size, |
1258 | 28b9b5af | bellard | uint32_t NVRAM_image, |
1259 | 28b9b5af | bellard | int width, int height, int depth); |
1260 | 64201201 | bellard | |
1261 | 63066f4f | bellard | /* adb.c */
|
1262 | 63066f4f | bellard | |
1263 | 63066f4f | bellard | #define MAX_ADB_DEVICES 16 |
1264 | 63066f4f | bellard | |
1265 | e2733d20 | bellard | #define ADB_MAX_OUT_LEN 16 |
1266 | 63066f4f | bellard | |
1267 | e2733d20 | bellard | typedef struct ADBDevice ADBDevice; |
1268 | 63066f4f | bellard | |
1269 | e2733d20 | bellard | /* buf = NULL means polling */
|
1270 | e2733d20 | bellard | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, |
1271 | e2733d20 | bellard | const uint8_t *buf, int len); |
1272 | 12c28fed | bellard | typedef int ADBDeviceReset(ADBDevice *d); |
1273 | 12c28fed | bellard | |
1274 | 63066f4f | bellard | struct ADBDevice {
|
1275 | 63066f4f | bellard | struct ADBBusState *bus;
|
1276 | 63066f4f | bellard | int devaddr;
|
1277 | 63066f4f | bellard | int handler;
|
1278 | e2733d20 | bellard | ADBDeviceRequest *devreq; |
1279 | 12c28fed | bellard | ADBDeviceReset *devreset; |
1280 | 63066f4f | bellard | void *opaque;
|
1281 | 63066f4f | bellard | }; |
1282 | 63066f4f | bellard | |
1283 | 63066f4f | bellard | typedef struct ADBBusState { |
1284 | 63066f4f | bellard | ADBDevice devices[MAX_ADB_DEVICES]; |
1285 | 63066f4f | bellard | int nb_devices;
|
1286 | e2733d20 | bellard | int poll_index;
|
1287 | 63066f4f | bellard | } ADBBusState; |
1288 | 63066f4f | bellard | |
1289 | e2733d20 | bellard | int adb_request(ADBBusState *s, uint8_t *buf_out,
|
1290 | e2733d20 | bellard | const uint8_t *buf, int len); |
1291 | e2733d20 | bellard | int adb_poll(ADBBusState *s, uint8_t *buf_out);
|
1292 | 63066f4f | bellard | |
1293 | 63066f4f | bellard | ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
|
1294 | e2733d20 | bellard | ADBDeviceRequest *devreq, |
1295 | 12c28fed | bellard | ADBDeviceReset *devreset, |
1296 | 63066f4f | bellard | void *opaque);
|
1297 | 63066f4f | bellard | void adb_kbd_init(ADBBusState *bus);
|
1298 | 63066f4f | bellard | void adb_mouse_init(ADBBusState *bus);
|
1299 | 63066f4f | bellard | |
1300 | 63066f4f | bellard | /* cuda.c */
|
1301 | 63066f4f | bellard | |
1302 | 63066f4f | bellard | extern ADBBusState adb_bus;
|
1303 | d537cf6c | pbrook | int cuda_init(qemu_irq irq);
|
1304 | 63066f4f | bellard | |
1305 | bb36d470 | bellard | #include "hw/usb.h" |
1306 | bb36d470 | bellard | |
1307 | a594cfbf | bellard | /* usb ports of the VM */
|
1308 | a594cfbf | bellard | |
1309 | 0d92ed30 | pbrook | void qemu_register_usb_port(USBPort *port, void *opaque, int index, |
1310 | 0d92ed30 | pbrook | usb_attachfn attach); |
1311 | a594cfbf | bellard | |
1312 | 0d92ed30 | pbrook | #define VM_USB_HUB_SIZE 8 |
1313 | a594cfbf | bellard | |
1314 | a594cfbf | bellard | void do_usb_add(const char *devname); |
1315 | a594cfbf | bellard | void do_usb_del(const char *devname); |
1316 | a594cfbf | bellard | void usb_info(void); |
1317 | a594cfbf | bellard | |
1318 | 2e5d83bb | pbrook | /* scsi-disk.c */
|
1319 | 4d611c9a | pbrook | enum scsi_reason {
|
1320 | 4d611c9a | pbrook | SCSI_REASON_DONE, /* Command complete. */
|
1321 | 4d611c9a | pbrook | SCSI_REASON_DATA /* Transfer complete, more data required. */
|
1322 | 4d611c9a | pbrook | }; |
1323 | 4d611c9a | pbrook | |
1324 | 2e5d83bb | pbrook | typedef struct SCSIDevice SCSIDevice; |
1325 | a917d384 | pbrook | typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag, |
1326 | a917d384 | pbrook | uint32_t arg); |
1327 | 2e5d83bb | pbrook | |
1328 | 2e5d83bb | pbrook | SCSIDevice *scsi_disk_init(BlockDriverState *bdrv, |
1329 | a917d384 | pbrook | int tcq,
|
1330 | 2e5d83bb | pbrook | scsi_completionfn completion, |
1331 | 2e5d83bb | pbrook | void *opaque);
|
1332 | 2e5d83bb | pbrook | void scsi_disk_destroy(SCSIDevice *s);
|
1333 | 2e5d83bb | pbrook | |
1334 | 0fc5c15a | pbrook | int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
|
1335 | 4d611c9a | pbrook | /* SCSI data transfers are asynchrnonous. However, unlike the block IO
|
1336 | 4d611c9a | pbrook | layer the completion routine may be called directly by
|
1337 | 4d611c9a | pbrook | scsi_{read,write}_data. */
|
1338 | a917d384 | pbrook | void scsi_read_data(SCSIDevice *s, uint32_t tag);
|
1339 | a917d384 | pbrook | int scsi_write_data(SCSIDevice *s, uint32_t tag);
|
1340 | a917d384 | pbrook | void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
|
1341 | a917d384 | pbrook | uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag); |
1342 | 2e5d83bb | pbrook | |
1343 | 7d8406be | pbrook | /* lsi53c895a.c */
|
1344 | 7d8406be | pbrook | void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id); |
1345 | 7d8406be | pbrook | void *lsi_scsi_init(PCIBus *bus, int devfn); |
1346 | 7d8406be | pbrook | |
1347 | b5ff1b31 | bellard | /* integratorcp.c */
|
1348 | 3371d272 | pbrook | extern QEMUMachine integratorcp_machine;
|
1349 | b5ff1b31 | bellard | |
1350 | cdbdb648 | pbrook | /* versatilepb.c */
|
1351 | cdbdb648 | pbrook | extern QEMUMachine versatilepb_machine;
|
1352 | 16406950 | pbrook | extern QEMUMachine versatileab_machine;
|
1353 | cdbdb648 | pbrook | |
1354 | e69954b9 | pbrook | /* realview.c */
|
1355 | e69954b9 | pbrook | extern QEMUMachine realview_machine;
|
1356 | e69954b9 | pbrook | |
1357 | daa57963 | bellard | /* ps2.c */
|
1358 | daa57963 | bellard | void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); |
1359 | daa57963 | bellard | void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); |
1360 | daa57963 | bellard | void ps2_write_mouse(void *, int val); |
1361 | daa57963 | bellard | void ps2_write_keyboard(void *, int val); |
1362 | daa57963 | bellard | uint32_t ps2_read_data(void *);
|
1363 | daa57963 | bellard | void ps2_queue(void *, int b); |
1364 | f94f5d71 | pbrook | void ps2_keyboard_set_translation(void *opaque, int mode); |
1365 | 548df2ac | ths | void ps2_mouse_fake_event(void *opaque); |
1366 | daa57963 | bellard | |
1367 | 80337b66 | bellard | /* smc91c111.c */
|
1368 | d537cf6c | pbrook | void smc91c111_init(NICInfo *, uint32_t, qemu_irq);
|
1369 | 80337b66 | bellard | |
1370 | bdd5003a | pbrook | /* pl110.c */
|
1371 | d537cf6c | pbrook | void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq, int); |
1372 | bdd5003a | pbrook | |
1373 | cdbdb648 | pbrook | /* pl011.c */
|
1374 | d537cf6c | pbrook | void pl011_init(uint32_t base, qemu_irq irq, CharDriverState *chr);
|
1375 | cdbdb648 | pbrook | |
1376 | cdbdb648 | pbrook | /* pl050.c */
|
1377 | d537cf6c | pbrook | void pl050_init(uint32_t base, qemu_irq irq, int is_mouse); |
1378 | cdbdb648 | pbrook | |
1379 | cdbdb648 | pbrook | /* pl080.c */
|
1380 | d537cf6c | pbrook | void *pl080_init(uint32_t base, qemu_irq irq, int nchannels); |
1381 | cdbdb648 | pbrook | |
1382 | a1bb27b1 | pbrook | /* pl181.c */
|
1383 | a1bb27b1 | pbrook | void pl181_init(uint32_t base, BlockDriverState *bd,
|
1384 | d537cf6c | pbrook | qemu_irq irq0, qemu_irq irq1); |
1385 | a1bb27b1 | pbrook | |
1386 | cdbdb648 | pbrook | /* pl190.c */
|
1387 | d537cf6c | pbrook | qemu_irq *pl190_init(uint32_t base, qemu_irq irq, qemu_irq fiq); |
1388 | cdbdb648 | pbrook | |
1389 | cdbdb648 | pbrook | /* arm-timer.c */
|
1390 | d537cf6c | pbrook | void sp804_init(uint32_t base, qemu_irq irq);
|
1391 | d537cf6c | pbrook | void icp_pit_init(uint32_t base, qemu_irq *pic, int irq); |
1392 | cdbdb648 | pbrook | |
1393 | e69954b9 | pbrook | /* arm_sysctl.c */
|
1394 | e69954b9 | pbrook | void arm_sysctl_init(uint32_t base, uint32_t sys_id);
|
1395 | e69954b9 | pbrook | |
1396 | e69954b9 | pbrook | /* arm_gic.c */
|
1397 | d537cf6c | pbrook | qemu_irq *arm_gic_init(uint32_t base, qemu_irq parent_irq); |
1398 | e69954b9 | pbrook | |
1399 | 16406950 | pbrook | /* arm_boot.c */
|
1400 | 16406950 | pbrook | |
1401 | daf90626 | pbrook | void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, |
1402 | 16406950 | pbrook | const char *kernel_cmdline, const char *initrd_filename, |
1403 | 16406950 | pbrook | int board_id);
|
1404 | 16406950 | pbrook | |
1405 | 27c7ca7e | bellard | /* sh7750.c */
|
1406 | 27c7ca7e | bellard | struct SH7750State;
|
1407 | 27c7ca7e | bellard | |
1408 | 008a8818 | pbrook | struct SH7750State *sh7750_init(CPUState * cpu);
|
1409 | 27c7ca7e | bellard | |
1410 | 27c7ca7e | bellard | typedef struct { |
1411 | 27c7ca7e | bellard | /* The callback will be triggered if any of the designated lines change */
|
1412 | 27c7ca7e | bellard | uint16_t portamask_trigger; |
1413 | 27c7ca7e | bellard | uint16_t portbmask_trigger; |
1414 | 27c7ca7e | bellard | /* Return 0 if no action was taken */
|
1415 | 27c7ca7e | bellard | int (*port_change_cb) (uint16_t porta, uint16_t portb,
|
1416 | 27c7ca7e | bellard | uint16_t * periph_pdtra, |
1417 | 27c7ca7e | bellard | uint16_t * periph_portdira, |
1418 | 27c7ca7e | bellard | uint16_t * periph_pdtrb, |
1419 | 27c7ca7e | bellard | uint16_t * periph_portdirb); |
1420 | 27c7ca7e | bellard | } sh7750_io_device; |
1421 | 27c7ca7e | bellard | |
1422 | 27c7ca7e | bellard | int sh7750_register_io_device(struct SH7750State *s, |
1423 | 27c7ca7e | bellard | sh7750_io_device * device); |
1424 | 27c7ca7e | bellard | /* tc58128.c */
|
1425 | 27c7ca7e | bellard | int tc58128_init(struct SH7750State *s, char *zone1, char *zone2); |
1426 | 27c7ca7e | bellard | |
1427 | 29133e9a | bellard | /* NOR flash devices */
|
1428 | 29133e9a | bellard | typedef struct pflash_t pflash_t; |
1429 | 29133e9a | bellard | |
1430 | 29133e9a | bellard | pflash_t *pflash_register (target_ulong base, ram_addr_t off, |
1431 | 29133e9a | bellard | BlockDriverState *bs, |
1432 | 29133e9a | bellard | target_ulong sector_len, int nb_blocs, int width, |
1433 | 29133e9a | bellard | uint16_t id0, uint16_t id1, |
1434 | 29133e9a | bellard | uint16_t id2, uint16_t id3); |
1435 | 29133e9a | bellard | |
1436 | 4046d913 | pbrook | #include "gdbstub.h" |
1437 | 4046d913 | pbrook | |
1438 | ea2384d3 | bellard | #endif /* defined(QEMU_TOOL) */ |
1439 | ea2384d3 | bellard | |
1440 | c4b1fcc0 | bellard | /* monitor.c */
|
1441 | 82c643ff | bellard | void monitor_init(CharDriverState *hd, int show_banner); |
1442 | ea2384d3 | bellard | void term_puts(const char *str); |
1443 | ea2384d3 | bellard | void term_vprintf(const char *fmt, va_list ap); |
1444 | 40c3bac3 | bellard | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
1445 | fef30743 | ths | void term_print_filename(const char *filename); |
1446 | c4b1fcc0 | bellard | void term_flush(void); |
1447 | c4b1fcc0 | bellard | void term_print_help(void); |
1448 | ea2384d3 | bellard | void monitor_readline(const char *prompt, int is_password, |
1449 | ea2384d3 | bellard | char *buf, int buf_size); |
1450 | ea2384d3 | bellard | |
1451 | ea2384d3 | bellard | /* readline.c */
|
1452 | ea2384d3 | bellard | typedef void ReadLineFunc(void *opaque, const char *str); |
1453 | ea2384d3 | bellard | |
1454 | ea2384d3 | bellard | extern int completion_index; |
1455 | ea2384d3 | bellard | void add_completion(const char *str); |
1456 | ea2384d3 | bellard | void readline_handle_byte(int ch); |
1457 | ea2384d3 | bellard | void readline_find_completion(const char *cmdline); |
1458 | ea2384d3 | bellard | const char *readline_get_history(unsigned int index); |
1459 | ea2384d3 | bellard | void readline_start(const char *prompt, int is_password, |
1460 | ea2384d3 | bellard | ReadLineFunc *readline_func, void *opaque);
|
1461 | c4b1fcc0 | bellard | |
1462 | 5e6ad6f9 | bellard | void kqemu_record_dump(void); |
1463 | 5e6ad6f9 | bellard | |
1464 | fc01f7e7 | bellard | #endif /* VL_H */ |