Revision e9df014c hw/ppc.c
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/* |
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* QEMU generic PPC hardware System Emulator |
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* QEMU generic PowerPC hardware System Emulator
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* |
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* Copyright (c) 2003-2007 Jocelyn Mayer |
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* |
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#include "vl.h" |
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#include "m48t59.h" |
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//#define PPC_DEBUG_IRQ |
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extern FILE *logfile; |
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extern int loglevel; |
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/*****************************************************************************/ |
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/* PowerPC internal fake IRQ controller |
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* used to manage multiple sources hardware events |
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*/ |
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static void ppc_set_irq (void *opaque, int n_IRQ, int level) |
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void ppc_set_irq (CPUState *env, int n_IRQ, int level) |
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{
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CPUState *env; |
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env = opaque; |
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if (level) {
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env->pending_interrupts |= 1 << n_IRQ; |
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cpu_interrupt(env, CPU_INTERRUPT_HARD); |
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if (env->pending_interrupts == 0) |
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cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
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} |
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#if 0
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#if defined(PPC_DEBUG_IRQ)
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printf("%s: %p n_IRQ %d level %d => pending %08x req %08x\n", __func__,
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env, n_IRQ, level, env->pending_interrupts, env->interrupt_request); |
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#endif |
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} |
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void cpu_ppc_irq_init_cpu(CPUState *env) |
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/* PowerPC 6xx / 7xx internal IRQ controller */ |
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static void ppc6xx_set_irq (void *opaque, int pin, int level) |
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{
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qemu_irq *qi;
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int i;
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CPUState *env = opaque;
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int cur_level;
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qi = qemu_allocate_irqs(ppc_set_irq, env, 32); |
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for (i = 0; i < 32; i++) {
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env->irq[i] = qi[i]; |
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#if defined(PPC_DEBUG_IRQ) |
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printf("%s: env %p pin %d level %d\n", __func__, env, pin, level);
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#endif |
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cur_level = (env->irq_input_state >> pin) & 1; |
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/* Don't generate spurious events */ |
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if ((cur_level == 1 && level == 0) || (cur_level == 0 && level != 0) || 0) {
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switch (pin) {
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case PPC_INPUT_INT: |
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/* Level sensitive - asserted high */ |
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#if defined(PPC_DEBUG_IRQ) |
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printf("%s: set the external IRQ state to %d\n", __func__, level);
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#endif |
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ppc_set_irq(env, PPC_INTERRUPT_EXT, level); |
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break; |
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case PPC_INPUT_SMI: |
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/* Level sensitive - active high */ |
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#if defined(PPC_DEBUG_IRQ) |
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printf("%s: set the SMI IRQ state to %d\n", __func__, level);
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#endif |
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ppc_set_irq(env, PPC_INTERRUPT_SMI, level); |
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break; |
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case PPC_INPUT_MCP: |
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/* Negative edge sensitive */ |
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/* XXX: TODO: actual reaction may depends on HID0 status |
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* 603/604/740/750: check HID0[EMCP] |
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*/ |
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if (cur_level == 1 && level == 0) {
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#if defined(PPC_DEBUG_IRQ) |
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printf("%s: raise machine check state\n", __func__);
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#endif |
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ppc_set_irq(env, PPC_INTERRUPT_MCK, 1); |
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} |
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break; |
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case PPC_INPUT_CKSTP_IN: |
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/* Level sensitive - active low */ |
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/* XXX: TODO: relay the signal to CKSTP_OUT pin */ |
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if (level) {
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#if defined(PPC_DEBUG_IRQ) |
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printf("%s: stop the CPU\n", __func__);
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#endif |
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env->halted = 1; |
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} else {
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#if defined(PPC_DEBUG_IRQ) |
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printf("%s: restart the CPU\n", __func__);
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#endif |
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env->halted = 0; |
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} |
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break; |
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case PPC_INPUT_HRESET: |
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/* Level sensitive - active low */ |
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if (level) {
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#if 0 // XXX: TOFIX |
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#if defined(PPC_DEBUG_IRQ) |
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printf("%s: reset the CPU\n", __func__);
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#endif |
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cpu_reset(env); |
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#endif |
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} |
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break; |
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case PPC_INPUT_SRESET: |
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#if defined(PPC_DEBUG_IRQ) |
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printf("%s: set the RESET IRQ state to %d\n", __func__, level);
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#endif |
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ppc_set_irq(env, PPC_INTERRUPT_RESET, level); |
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break; |
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default: |
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/* Unknown pin - do nothing */ |
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#if defined(PPC_DEBUG_IRQ) |
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printf("%s: unknown IRQ pin %d\n", __func__, pin);
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#endif |
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return; |
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} |
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if (level) |
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env->irq_input_state |= 1 << pin; |
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else |
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env->irq_input_state &= ~(1 << pin); |
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} |
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} |
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/* External IRQ callback from OpenPIC IRQ controller */ |
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void ppc_openpic_irq (void *opaque, int n_IRQ, int level) |
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void ppc6xx_irq_init (CPUState *env) |
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{
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switch (n_IRQ) {
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case OPENPIC_EVT_INT: |
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n_IRQ = PPC_INTERRUPT_EXT; |
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break; |
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case OPENPIC_EVT_CINT: |
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/* On PowerPC BookE, critical input use vector 0 */ |
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n_IRQ = PPC_INTERRUPT_RESET; |
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break; |
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case OPENPIC_EVT_MCK: |
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n_IRQ = PPC_INTERRUPT_MCK; |
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break; |
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case OPENPIC_EVT_DEBUG: |
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n_IRQ = PPC_INTERRUPT_DEBUG; |
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break; |
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case OPENPIC_EVT_RESET: |
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qemu_system_reset_request(); |
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return; |
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} |
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ppc_set_irq(opaque, n_IRQ, level); |
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env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, env, 6); |
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} |
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/*****************************************************************************/ |
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/* PPC time base and decrementer emulation */ |
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/* PowerPC time base and decrementer emulation */
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//#define DEBUG_TB |
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struct ppc_tb_t {
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